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📄 m64.lst

📁 数字舵机(1) 数字脉宽检测 数字脉宽检测
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__start:
__text_start:
      5A EFCF      LDI	R28,0xFF
      5B E1D0      LDI	R29,0x10
      5C BFCD      OUT	0x3D,R28
      5D BFDE      OUT	0x3E,R29
      5E 51CE      SUBI	R28,0x1E
      5F 40D0      SBCI	R29,0
      60 EA0A      LDI	R16,0xAA
      61 8308      STD	Y+0,R16
      62 2400      CLR	R0
      63 E2E8      LDI	R30,0x28
      64 E0F1      LDI	R31,1
      65 E011      LDI	R17,1
      66 32E8      CPI	R30,0x28
      67 07F1      CPC	R31,R17
      68 F011      BEQ	0x006B
      69 9201      ST	R0,Z+
      6A CFFB      RJMP	0x0066
      6B 8300      STD	Z+0,R16
      6C E8EC      LDI	R30,0x8C
      6D E0F0      LDI	R31,0
      6E E0A0      LDI	R26,0
      6F E0B1      LDI	R27,1
      70 E010      LDI	R17,0
      71 E000      LDI	R16,0
      72 BF0B      OUT	0x3B,R16
      73 3BE4      CPI	R30,0xB4
      74 07F1      CPC	R31,R17
      75 F021      BEQ	0x007A
      76 95C8      LPM
      77 9631      ADIW	R30,1
      78 920D      ST	R0,X+
      79 CFF9      RJMP	0x0073
      7A 940E 0506 CALL	_main
_exit:
      7C CFFF      RJMP	_exit
FILE: C:\DOCUME~1\ZDH\桌面\JOHU_2~1.180\digital_duoji\main.c
(0001) //////////////////////////////
(0002) //////////////////////////////   61493为近似180度
(0003) 
(0004) #include <iom64v.h>
(0005) #include <macros.h>
(0006) 
(0007) #define PREVSONG   BIT(2)
(0008) #define NEXTSONG   BIT(3)
(0009) #define VOLDOWN    BIT(4)
(0010) #define VOLUP      BIT(5)
(0011) #define STOP       BIT(6)
(0012) 
(0013) #define R_pwm0       BIT(4)
(0014) #define R_pwm1       BIT(5)
(0015) #define L_pwm0       BIT(6)
(0016) #define L_pwm1       BIT(7)
(0017) 
(0018) 
(0019) long ADCjohu=0;
(0020) int ms=0;
(0021) long xx=0;
(0022) int adc=0;
(0023) 
(0024) #define REF 483
(0025) unsigned char lvbo=0;
(0026) long lvbo_num=0;
(0027) 
(0028) unsigned char pwm_pingjun=100;//平均速度
(0029) unsigned char Rpwm0=0;
(0030) unsigned char Rpwm1=0;
(0031) unsigned char Lpwm0=0;
(0032) unsigned char Lpwm1=0;
(0033) unsigned char all=0, a=0,b=0,c=0,d=0,e=0,f=0;
(0034) #define CIR 1
(0035) #define LINE 2
(0036) long jiaodu=0,juli=0;
(0037) int time=0;
(0038) unsigned char sec=0;
(0039) 
(0040) 
(0041) 
(0042) void port_init(void)
(0043) {
(0044)  PORTA = 0x00;
_port_init:
      7D 2422      CLR	R2
      7E BA2B      OUT	0x1B,R2
(0045)  DDRA  = 0x00;
      7F BA2A      OUT	0x1A,R2
(0046)  PORTB = 0x00;
      80 BA28      OUT	0x18,R2
(0047)  DDRB  = 0x00;
      81 BA27      OUT	0x17,R2
(0048)  PORTC = 0x00; //m103 output only
      82 BA25      OUT	0x15,R2
(0049)  DDRC  = 0x00;
      83 BA24      OUT	0x14,R2
(0050)  PORTD = 0x00;
      84 BA22      OUT	0x12,R2
(0051)  DDRD  = 0x00;
      85 BA21      OUT	0x11,R2
(0052)  PORTE = 0x00;
      86 B823      OUT	0x03,R2
(0053)  DDRE  = 0x00;
      87 B822      OUT	0x02,R2
(0054)  PORTF = 0x00;
      88 9220 0062 STS	0x0062,R2
(0055)  DDRF  = 0x00;
      8A 9220 0061 STS	0x0061,R2
(0056)  PORTG = 0x00;
      8C 9220 0065 STS	0x0065,R2
(0057)  DDRG  = 0x00;
      8E 9220 0064 STS	0x0064,R2
      90 9508      RET
(0058) }
(0059) 
(0060) //TIMER2 initialize - prescale:64
(0061) // WGM: Normal
(0062) // desired value: 1mSec
(0063) // actual value:  1.000mSec (0.0%)
(0064) void timer2_init(void)
(0065) {
(0066)  TCCR2 = 0x00; //stop
_timer2_init:
      91 2422      CLR	R2
      92 BC25      OUT	0x25,R2
(0067)  TCNT2 = 0x83; //setup
      93 E883      LDI	R24,0x83
      94 BD84      OUT	0x24,R24
(0068)  OCR2  = 0x7D;
      95 E78D      LDI	R24,0x7D
      96 BD83      OUT	0x23,R24
(0069)  TCCR2 = 0x03; //start
      97 E083      LDI	R24,3
      98 BD85      OUT	0x25,R24
      99 9508      RET
_timer0_ovf_isr:
      9A 920A      ST	R0,-Y
      9B 921A      ST	R1,-Y
      9C 922A      ST	R2,-Y
      9D 923A      ST	R3,-Y
      9E 924A      ST	R4,-Y
      9F 925A      ST	R5,-Y
      A0 926A      ST	R6,-Y
      A1 927A      ST	R7,-Y
      A2 928A      ST	R8,-Y
      A3 929A      ST	R9,-Y
      A4 930A      ST	R16,-Y
      A5 931A      ST	R17,-Y
      A6 932A      ST	R18,-Y
      A7 933A      ST	R19,-Y
      A8 938A      ST	R24,-Y
      A9 939A      ST	R25,-Y
      AA B60F      IN	R0,0x3F
      AB 920A      ST	R0,-Y
      AC 940E 077C CALL	push_xgsetF00C
(0070) }
(0071) 
(0072) 
(0073) #pragma interrupt_handler timer0_ovf_isr:11
(0074) void timer0_ovf_isr(void)
(0075) {
(0076)  TCNT0 = 0x83; //reload counter value
      AE E883      LDI	R24,0x83
      AF BF82      OUT	0x32,R24
(0077)  if (time>500){sec++;time=0;}
      B0 EF84      LDI	R24,0xF4
      B1 E091      LDI	R25,1
      B2 9020 0125 LDS	R2,time
      B4 9030 0126 LDS	R3,time+1
      B6 1582      CP	R24,R2
      B7 0593      CPC	R25,R3
      B8 F45C      BGE	0x00C4
      B9 9180 0127 LDS	R24,sec
      BB 5F8F      SUBI	R24,0xFF
      BC 9380 0127 STS	sec,R24
      BE 2422      CLR	R2
      BF 2433      CLR	R3
      C0 9230 0126 STS	time+1,R3
      C2 9220 0125 STS	time,R2
(0078)  time++;
      C4 9180 0125 LDS	R24,time
      C6 9190 0126 LDS	R25,time+1
      C8 9601      ADIW	R24,1
      C9 9390 0126 STS	time+1,R25
      CB 9380 0125 STS	time,R24
(0079)  ADCjohu=ADCL;
      CD B024      IN	R2,0x04
      CE 2433      CLR	R3
      CF 2444      CLR	R4
      D0 2455      CLR	R5
      D1 9230 0101 STS	ADCjohu+1,R3
      D3 9220 0100 STS	ADCjohu,R2
      D5 9250 0103 STS	ADCjohu+3,R5
      D7 9240 0102 STS	ADCjohu+2,R4
(0080)  ADCjohu|=ADCH << 8;
      D9 B025      IN	R2,0x05
      DA 2433      CLR	R3
      DB 2C32      MOV	R3,R2
      DC 2422      CLR	R2
      DD 2444      CLR	R4
      DE FC37      SBRC	R3,7
      DF 9440      COM	R4
      E0 2455      CLR	R5
      E1 FC47      SBRC	R4,7
      E2 9450      COM	R5
      E3 9080 0102 LDS	R8,ADCjohu+2
      E5 9090 0103 LDS	R9,ADCjohu+3
      E7 9060 0100 LDS	R6,ADCjohu
      E9 9070 0101 LDS	R7,ADCjohu+1
      EB 2862      OR	R6,R2
      EC 2873      OR	R7,R3
      ED 2884      OR	R8,R4
      EE 2895      OR	R9,R5
      EF 9270 0101 STS	ADCjohu+1,R7
      F1 9260 0100 STS	ADCjohu,R6
      F3 9290 0103 STS	ADCjohu+3,R9
      F5 9280 0102 STS	ADCjohu+2,R8
(0081) ///////////////////////////////////////////////////////////////////平均值滤波  1毫秒采样滤波,10毫秒输出
(0082)  if (lvbo==0) {lvbo_num=ADCjohu/2;lvbo++;return;}
      F7 9020 010C LDS	R2,lvbo
      F9 2022      TST	R2
      FA F4D1      BNE	0x0115
      FB E042      LDI	R20,2
      FC E050      LDI	R21,0
      FD E060      LDI	R22,0
      FE E070      LDI	R23,0
      FF 0183      MOVW	R16,R6
     100 0194      MOVW	R18,R8
     101 937A      ST	R23,-Y
     102 936A      ST	R22,-Y
     103 935A      ST	R21,-Y
     104 934A      ST	R20,-Y
     105 940E 0708 CALL	div32s
     107 9310 010E STS	lvbo_num+1,R17
     109 9300 010D STS	lvbo_num,R16
     10B 9330 0110 STS	lvbo_num+3,R19
     10D 9320 010F STS	lvbo_num+2,R18
     10F 9180 010C LDS	R24,lvbo
     111 5F8F      SUBI	R24,0xFF
     112 9380 010C STS	lvbo,R24
     114 C077      RJMP	0x018C
(0083)  if (lvbo<10) {lvbo_num+=ADCjohu/2;lvbo++;return;}
     115 9180 010C LDS	R24,lvbo
     117 308A      CPI	R24,0xA
     118 F560      BCC	0x0145
     119 E042      LDI	R20,2
     11A E050      LDI	R21,0
     11B E060      LDI	R22,0
     11C E070      LDI	R23,0
     11D 9120 0102 LDS	R18,ADCjohu+2
     11F 9130 0103 LDS	R19,ADCjohu+3
     121 9100 0100 LDS	R16,ADCjohu
     123 9110 0101 LDS	R17,ADCjohu+1
     125 937A      ST	R23,-Y
     126 936A      ST	R22,-Y
     127 935A      ST	R21,-Y
     128 934A      ST	R20,-Y
     129 940E 0708 CALL	div32s
     12B 9040 010F LDS	R4,lvbo_num+2
     12D 9050 0110 LDS	R5,lvbo_num+3
     12F 9020 010D LDS	R2,lvbo_num
     131 9030 010E LDS	R3,lvbo_num+1
     133 0E20      ADD	R2,R16
     134 1E31      ADC	R3,R17
     135 1E42      ADC	R4,R18
     136 1E53      ADC	R5,R19
     137 9230 010E STS	lvbo_num+1,R3
     139 9220 010D STS	lvbo_num,R2
     13B 9250 0110 STS	lvbo_num+3,R5
     13D 9240 010F STS	lvbo_num+2,R4
     13F 9180 010C LDS	R24,lvbo
     141 5F8F      SUBI	R24,0xFF
     142 9380 010C STS	lvbo,R24
     144 C047      RJMP	0x018C
(0084)  	else lvbo=0;/**/
     145 2422      CLR	R2
     146 9220 010C STS	lvbo,R2
(0085) //////////////////////////////////////////////////////////////////////////////
(0086)  if ( (ADCjohu<REF-6) || (ADCjohu>REF+6))
     148 ED4D      LDI	R20,0xDD
     149 E051      LDI	R21,1
     14A E060      LDI	R22,0
     14B E070      LDI	R23,0
     14C 9040 0102 LDS	R4,ADCjohu+2
     14E 9050 0103 LDS	R5,ADCjohu+3
     150 9020 0100 LDS	R2,ADCjohu
     152 9030 0101 LDS	R3,ADCjohu+1
     154 1624      CP	R2,R20
     155 0635      CPC	R3,R21
     156 0646      CPC	R4,R22
     157 0657      CPC	R5,R23
     158 F04C      BLT	0x0162
     159 EE49      LDI	R20,0xE9
     15A E051      LDI	R21,1
     15B E060      LDI	R22,0
     15C E070      LDI	R23,0
     15D 1542      CP	R20,R2
     15E 0553      CPC	R21,R3
     15F 0564      CPC	R22,R4
     160 0575      CPC	R23,R5
     161 F524      BGE	0x0186
(0087)  	{
(0088) 	 //ADCjohu-=511-10;//-511+31-3.27371     -10
(0089)  	 xx=xx+ADCjohu-REF;//
     162 9040 0102 LDS	R4,ADCjohu+2
     164 9050 0103 LDS	R5,ADCjohu+3
     166 9020 0100 LDS	R2,ADCjohu
     168 9030 0101 LDS	R3,ADCjohu+1
     16A 9080 0108 LDS	R8,xx+2
     16C 9090 0109 LDS	R9,xx+3
     16E 9060 0106 LDS	R6,xx
     170 9070 0107 LDS	R7,xx+1
     172 0C62      ADD	R6,R2
     173 1C73      ADC	R7,R3
     174 1C84      ADC	R8,R4
     175 1C95      ADC	R9,R5
     176 EE43      LDI	R20,0xE3
     177 E051      LDI	R21,1
     178 E060      LDI	R22,0
     179 E070      LDI	R23,0
     17A 1A64      SUB	R6,R20
     17B 0A75      SBC	R7,R21
     17C 0A86      SBC	R8,R22
     17D 0A97      SBC	R9,R23
     17E 9270 0107 STS	xx+1,R7
     180 9260 0106 STS	xx,R6
     182 9290 0109 STS	xx+3,R9
     184 9280 0108 STS	xx+2,R8
(0090) 	}
(0091)  ms=1;
     186 E081      LDI	R24,1
     187 E090      LDI	R25,0
     188 9390 0105 STS	ms+1,R25
     18A 9380 0104 STS	ms,R24
     18C 940E 0783 CALL	pop_xgsetF00C
     18E 9009      LD	R0,Y+
     18F BE0F      OUT	0x3F,R0
     190 9199      LD	R25,Y+
     191 9189      LD	R24,Y+
     192 9139      LD	R19,Y+
     193 9129      LD	R18,Y+
     194 9119      LD	R17,Y+
     195 9109      LD	R16,Y+
     196 9099      LD	R9,Y+
     197 9089      LD	R8,Y+
     198 9079      LD	R7,Y+
     199 9069      LD	R6,Y+
     19A 9059      LD	R5,Y+
     19B 9049      LD	R4,Y+
     19C 9039      LD	R3,Y+
     19D 9029      LD	R2,Y+
     19E 9019      LD	R1,Y+
     19F 9009      LD	R0,Y+
     1A0 9518      RETI
(0092) //ADCjohu==ADCL;
(0093) //PORTD=ADCjohu;
(0094) }
(0095) 
(0096) //ADC initialize
(0097) // Conversion time: 3uS
(0098) void adc_init(void)
(0099) {
(0100)  ADCSRA = 0x00; //disable adc
_adc_init:
     1A1 2422      CLR	R2
     1A2 B826      OUT	0x06,R2
(0101)  ADMUX = 0x01; //select adc input 0
     1A3 E081      LDI	R24,1
     1A4 B987      OUT	0x07,R24
(0102)  ACSR  = 0x80;
     1A5 E880      LDI	R24,0x80
     1A6 B988      OUT	0x08,R24
(0103) // ADCSRB = 0x00;
(0104)  ADCSRA = 0xEf;
     1A7 EE8F      LDI	R24,0xEF
     1A8 B986      OUT	0x06,R24
     1A9 9508      RET
_adc_isr:
     1AA 922A      ST	R2,-Y
     1AB B62F      IN	R2,0x3F
     1AC 922A      ST	R2,-Y
(0105) }
(0106) 
(0107) #pragma interrupt_handler adc_isr:22
(0108) void adc_isr(void)
(0109) {
(0110)  //conversion complete, read value (int) using...
(0111)  // value=ADCL;            //Read 8 low bits first (important)
(0112)  // value|=(int)ADCH << 8; //read 2 high bits and shift into top byte
(0113)  //ADCjohu==ADCL;
(0114)  //ADCjohu|=(int)ADCH << 8;
(0115)  //PORTD=ADCjohu;
(0116)  //adc=1;
(0117)  PORTA=ADCL;
     1AD B024      IN	R2,0x04
     1AE BA2B      OUT	0x1B,R2
     1AF 9029      LD	R2,Y+
     1B0 BE2F      OUT	0x3F,R2
     1B1 9029      LD	R2,Y+
     1B2 9518      RETI
(0118) 
(0119) }
(0120) 
(0121) //call this routine to initialize all peripherals
(0122) void init_devices(void)
(0123) {
(0124)  //stop errant interrupts until set up
(0125)  CLI(); //disable all interrupts
_init_devices:
     1B3 94F8      BCLR	7
(0126)  XDIV  = 0x00; //xtal divider
     1B4 2422      CLR	R2
     1B5 BE2C      OUT	0x3C,R2
(0127)  XMCRA = 0x00; //external memory
     1B6 9220 006D STS	0x006D,R2
(0128)  port_init();
     1B8 DEC4      RCALL	_port_init
(0129)  timer2_init(); 
     1B9 DED7      RCALL	_timer2_init
(0130) 
(0131) adc_init();uart1_init();
     1BA DFE6      RCALL	_adc_init
     1BB D00C      RCALL	_uart1_init

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