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📄 readme.design

📁 The OpenGPSRec receiver software runs on the real time operating system RTAI-Linux. It compiles with
💻 DESIGN
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=======================================================================                    Design Concepts of OpenGPSRec                    *****************************=======================================================================              >>> This document is work in progress! <<<=======================================================================Changes:- 05.12.03  MULTISAT mode=======================================================================S/W design----------OpenGPSRec consists of the following parts:1) real-time (RT) process (ogrt_proc.c)- access GP2021 correlator registers every 0.505 msec- check if DUMP event has occurred- read NCO values (carrier and code phase) every TIC (100 msec)- extract time information from subframe headers2) user space process (ogr_main.c and friends)- calculate navigation solution- display data on screen- write data to disk3) user space process (gpsplot.c and friends)- graphical visualization of in- and quad-phase datah/w access to the PROTO-3 ports are restricted to the RT process.Data exchange between ogrt_module and ogr_main:- shared memory regions (struct Chan[])- FIFOs (nav bits, I/Q data)=======================================================================Operating modes:----------------1) standard (navigation) mode: ------------------------------Track signals of all visible satellites and find navigation solution.2) MONOSAT mode: -----------------One master channels tracks the direct signal, the remaining 11 slave channels follow the master channel in code and doppler space with predefined spacing. I.e. the tracking function controlling the master channels writes simultaneously all 12 DCOs. (FIXME: How does this work, if the channels differ in doppler as well?)In code space: phase difference is set during initialization,code frequency changes are applied simultaneous. Since code phase cannot be set directly, we have to adjustcode frequency until the desired code phase offset appears.That is accomplished in functions "ch_*_follow_TIC()".Carrier and code DCO adjustements are set simultaneouslyfor all channels using the "all_carrier()" / "all_code()" calls.3) MULTISAT mode: -----------------*** TBI (to be implemented) ***similar to MONOSAT mode, except there are N>1 master channels.Each controls M slave channels in open-loop. (E.g. N=2, M=5; N=3, M=3; N=4, M=2. If N=4, receiver could determine navigation solution as well.)4) Track rising/setting satellites: -----------------------------------Sats within a predefined elevation angle range are scheduledto be tracked in MONOSAT mode, i.e. all 12 correlatorstrack one PRN. Code phase changes are determined by taking into account 24 correlator outputs (12 prompt and 12 early values). Carrier phase changes are taken from the line-of-sight optical path length. I/Q are saved to data file 'output/rst-WWWW-SSSSSS-PRN.dat' every 20 ms.Code tracking:Code phase error of leading channel is calculated from all 12 correlator outputs (weighted mean). Trailing channels arekept at predefined code offset w.r.t. leading correlator.Carrier tracking:Carrier phase error of leading channel is calculated from all 12 correlator outputs (weighted mean). Trailing channels arekept in sync with leading correlator.Problem: we get info on code/carrier phase only at TIC (100 ms).Thus, update trailing code by 1/5 and carrier by 1/100 of actual phase error (synchronization).(*** FIXME: currently only setting events are tracked ***)=======================================================================GP2021 correlator:------------------carrier DCOCounter of carrier cycles, 2^27 corresponds to 1/1.405 MHz =  0.712 usec(1.405 MHz is down-converted carrier frq, sampling frq is 5.714 MHz).Nominally, counter is incremented by (nominally)                2^27 * 1.405 MHz / 5.714 MHz = 33010105; frequency resolution: 1.405 MHz / 33010105 = 42.6 mHz                    2222222211111111110000000000                    7654321098765432109876543210                     ----------------------------                    ABBBCCCCCCCCCCCCCCCCCCCCCCCCBBB (bits 24-26) is index into sin/cos 8-phase look-up table   sin[8] = [-1 +1 +2 +2 +1 -1 -2 -2]   cos[8] = [+2 +2 +1 -1 -2 -2 -1 +1]------------------------------------------------------------------------code DCOCounter of code cycles, 2^26 corresponds to 1/2.046 MHz =  0.488 usec.Counter is incremented by (nominally)                2^26 * 2.046 MHz / 5.714 MHz = 24028328; frq. resolution: 2.046 MHz / 24028328 = 85.15 mHz          33333333222222222211111111110000000000          76543210987654321098765432109876543210           --------------------------------------          ABBBBBBBBBBBCCCCCCCCCCCCCCCCCCCCCCCCCCBBBBBBBBBBB (bits 26-36) is index into 2046 halfchip table------------------------------------------------------------------------timing signals:DUMP event occurs in each correlator channel after 1023 chips (2046 halfchips), about 1 msec. I.e. DUMP events are _not_ synchronized.TIC event occurs every 0.0999999 sec (simultaneous for all 12 channels) At TIC current state of following registers are read:  carr_cycle_l    : full carrier cycles (low 2 bytes)  carr_cycle_h    : full carrier cycles (high 2 bytes)  carr_dco_phase  : fractional carrier cycles                     (0,...,1023), resolution: 2pi/1024  code_slew       : code slew after next DUMP (0,...,2047)  code_phase      : code phase counter on TIC (0,...,2046)  code_dco_phase  : fractional code phase,                     (0,...,1023), resolution: 2pi/1024  epoch           : 1 msec (0,...,19) and 20 msec (0,...,49)                    epoch counterAt each DUMP the following registers are read:  i_dith   : in-phase, dither  q_dith   : quad-phase, dither  i_prompt : in-phase, prompt  q_prompt : quad-phase, promptTechnical data:  sampling (clock) frequency            : 40/7 MHz = 5.714 MHz  down-converted carrier frq. (nominal) : 1.405 MHz  carrier DCO step (nominal)            : 0x1f7b1b9 = 33010105  code DCO step (nominal)               : 0x16ea4a8 = 24028328  unit step                             : 175 nsec (40/7 MHz)  carrier DCO                           : 2^27 = 1 carrier cyc.  code DCO                              : 2^26 = 1/2 chipCarrier and code loops:-----------------------OpenSourceGPS default values:  i_sum = i_prompt + i_early  q_sum = q_prompt + q_early  prompt_mag = rss( i_prompt_20ms, q_prompt_20ms);  early_mag  = rss( i_early_20ms,   q_early_20ms);carrier PLL:  trk_carr_k = -9  trk_carr_d = 21  carfrq_inc = -trk_carr_k *       ( q_sum << 14) * sign( i_sum) / rss( i_sum, q_sum);  dcarfrq = carfrq_inc + trk_carr_d * (carfrq_inc - carfrq_inc_prv)          = (trk_carr_d+1) * carfrq_inc - trk_carr_d * carfrq_inc_prv  carfrq = carfrq + dcarfrq >> 14;note: carfrq given in units of 1.405 MHz / 33010105 = 42.574 mHz not Hz! code PLL:  trk_code_k = 25  trk_code_d =  3  codfrq_inc = earlylate * trk_code_k *         (prompt_mag - 2 * early_mag);  dcodfrq = codfrq_inc + trk_code_d * (codfrq_inc - codfrq_inc_prv);          = (trk_code_d+1) * codfrq_inc - trk_code_d * codfrq_inc_prv;  trk_div = 19643  codfrq = codfrq + dcodfrq / trk_div;Parameters used in rcvr_par.dat:--------------------------------pul_cod_dampratio        :       0.707pul_cod_loopgain         :       0.05pul_cod_bandwidth        :       2.0pul_car_dampratio        :       0.707pul_car_loopgain         :       1.25pul_car_bandwidth        :      50.0trk_cod_dampratio        :       0.707trk_cod_loopgain         :       0.05trk_cod_bandwidth        :       1.0trk_car_dampratio        :       0.707 trk_car_loopgain         :       1.25trk_car_bandwidth        :      25.0=======================================================================Theory of 2nd order PLL:------------------------  Zeta      : damping ratio; Zeta = 0.707 is critically damped  TUpd      : update period is 1 ms   wn        : natural frequency  BandWidth : loop bandwidth  Gain      : loop gain  Zeta = 0.707  wn   = 2 * BandWidth / (Zeta + 1/(4*Zeta));       = 1.8856 * BandWidth  wT   = wn * TUpd;  C1 = 1/Gain * 8 * Zeta*wT / (4 + 4*Zeta*wT + wT^2);  C2 = 1/Gain * 4 * wT^2    / (4 + 4*Zeta*wT + wT^2);  DscCarPhs(i) = atan2( Qp(i), Ip(i)) / (2*pi)  DeltaPhs  = (C1 + C2) * DscCarPhs(i) - C1 * DscCarPhs(i-1);  CarFrqOfs = DeltaPhs / TUpd;thus  wT = 2 * 0.707 * C2 / C1  wn = wT / TUpd  BW = wn / 1.8856     = 0.74989 * C2 / C1 / TUpd  G  = 1 / (C1+C2) * (4*wT^2 + 8*Zeta*wT) / (4+4*Zeta*wT+wT^2)with   carrier:   C1 = 21 * 1e-3             C2 =  1 * 1e-3  code:      C1 =  3 * 0.02             C2 =  1 * 0.02we obtain for the carrier PLL:  BandWidth BW = 35.5 Hz  Gain      G  = 4.3and for the code PLL:  BandWidth BW = 12.5 Hz  Gain      G  = 0.0004Tsui, Fundamentals of GPS receivers [2001] recommends:  carrier:   BW = 20 Hz             G  = 2*pi*0.2 = 1.2566  code:      BW = 1 Hz             G  = 0.05=======================================================================Fixed point arithmetics:Represent numbers between -2^16 and 2^16 (= 65536) with resolution of 2^-14 as long  0x00000001L <=> 2^(-14)  0x00004000L <=> 1  0x40000000L <=> 2^(+16)=======================================================================

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