init_ddr.inc

来自「Redboot, boot-loader of Linux for Freesc」· INC 代码 · 共 107 行

clearbreak
bexec 0x00000000
wait = on
reset
pause 2

setreg @CP15_CONTROL=0x00050078
// configuring CP15 for enabling the pripheral bus
setreg @CP15_PERIP_MEM_REMAP=0x40000015

// SPBA setup
setmem /32 0x5003C000 =0x7
setmem /32 0x5003C004 =0x7
setmem /32 0x5003C008 =0x7
setmem /32 0x5003C00C =0x7
setmem /32 0x5003C010 =0x7
setmem /32 0x5003C014 =0x7
setmem /32 0x5003C018 =0x7
setmem /32 0x5003C01C =0x7
setmem /32 0x5003C020 =0x7
setmem /32 0x5003C024 =0x7
setmem /32 0x5003C028 =0x7
setmem /32 0x5003C02C =0x7
setmem /32 0x5003C030 =0x7
setmem /32 0x5003C034 =0x7
setmem /32 0x5003C038 =0x7

wait = on

; --------------------------------------------------------------
;	Configure SDRAM Chip Select (CSD0)
; --------------------------------------------------------------
;	Initialize 32bit DDR SDRAM (cacheable region)
; --------------------------------------------------------------

; Configure ESDMISC, Set to DDR Mode 
setmem /32 0xB8001010 =0x00000004

pause 1 

; Configure CSD0 ESDCFG0
; XP=2 RP=1 MRD=1 RAS=6 CAS=3 Clocks
setmem /32 0xB8001004 =0x0075E73A


;****************************************************
; The following sequence is required to startup SDRAM
; Do NOT modify or rearrange please
;****************************************************

; Configure SDRAM Operating mode to Precharge Command
; MODE=PRECHARGE ALL.
; PRECHARGE ALL (A10=1). 
; ROW/COL Muxing NOT used outside NORMAL Mode.

setmem /32 0xB8001000 =0x92216080
setmem /16 0x80000400 =0x0000

; Configure SDRAM Operating mode to Auto-Refresh Command
; AUTO REFRESH, AUTO REFRESH..

setmem /32 0xB8001000 =0xA2216080
setmem /16 0x80000000 =0x0000
setmem /16 0x80000000 =0x0000

; Configure SDRAM Operating mode to Load Mode Register Command
; MODE=LODE MODE REGISTER.
; Self Refresh Coverage = 4 Banks, Driver Strength = Full strength.  
;(Program MODE EXTENDED REGISTER, (BA1/A24=1).)

setmem /32 0xB8001000 =0xB2216080
setmem /8 0x80000033  =0x00
setmem /16 0x81000000 =0x0000

; Configure CSD0 ESDCTL0 and go into Normal Read/Write Mode
; 16-bit;  BL=8; row=13; col=9; MODE=Normal.
	; Dummy Write.

setmem /32 0xB8001000 =0x82216080
setmem /16 0x80000000 =0x0000

// ldr r1, =0xFF80051C	  /* HCLK=52MHz, IPG=52MHz */
// str r1, [r0, #CRM_MCU_MPDR0]
//setmem /32  0x53F80004 =0xFF80051C


// This is to turn on the secret bit for BE access to CPLD
//setmem /32 0x50030030 =0x00020000

// CS0 setup
setmem /32 0xB8002000 =0x0000D346
setmem /32 0xB8002004 =0x444A4D21
setmem /32 0xB8002008 =0x44443302
// CS4 setup
setmem /32 0xB8002040 =0x0000DCF6
setmem /32 0xB8002044 =0x444A4541
setmem /32 0xB8002048 =0x44443302

setmem /32 0x5001C808 =0x00000000   // Set DSP to LE
setmem /32 0x43F84024 =0x00000010   // Put DSP in reset
pause 1
setmem /32 0x43F84024 =0x00000000   // Put DSP out of reset

readfile,raw,gui "r:\tftp\i30030evb_redboot.bin"=0x83F00000
setreg @R15=0x83F0000C