generic_flash_programming.c

Redboot, boot-loader of Linux for Freescale ARM family.

			error=0;
		} else {
			error+=1;
			if(error>1){
				ub_reset();
				return 0;
			}
		}
	}
	ub_reset();
	return 1;
}

/*****/

/*** Erasure Commands ***/

/* Chip Erase */

// The Fifth Horseman of the Apocalypse. Nothing will survive.
// Note that this takes some time to occur, 2-3 minutes
// Returns: 1 on succesful erase, null on failure

int erase_chip(void){
//	volatile unsigned int intermediate;
	reset();
	if(!UBM){
		unlock();
	}
	*(CS_BASE + 0x555)=0x00800080;
	if(!UBM){
		unlock();
	}
	*(CS_BASE + 0x555)=0x00100010;
	
	// Polling for completion
	while(((*CS_BASE^0x00800080)&DQ7)!=0){
		if((*CS_BASE&DQ5)==DQ5){
			if(((*CS_BASE^0x00800080)&DQ7)==0){
				return 1;
			} else {
				return 0;
			}
		}
	}

	return 1;
}

/*****/

/* Sector Erase */

// Practices a less wanton destruction, erasing only a specific sector.
// Parameters:	int sector = either the negative # of the sector to be erased,
//				            or a flash or system address within the sector to be erased
//				valid range: [0:-269], [0:0x7FFFFF] or [(CS_BASE) + 4 * (0:0x7FFFFF)]
// Returns: 1 on succesful erase, null on failure

int erase_sector(int sector){
	volatile unsigned int * sector_p=sector_bcalc(sector);
	sector_p+=0x555;
	reset();
	if(!UBM){
		unlock();
	}
	*(CS_BASE + 0x555)=0x00800080;
	if(!UBM){
		unlock();
	}
	*sector_p=0x00300030;
	// Polling for completion
	while(((*sector_p^0x00800080)&DQ7)!=0){
		if((*sector_p&DQ5)==DQ5){
			if(((*sector_p^0x00800080)&DQ7)==0){
				return 1;
			} else {
				return 0;
			}
		}
	}

	return 1;
}

/*****/

/* Erase Suspend */

// Valid only during a sector erase.
// Allows erase to be temporarily suspended so data can be read from a different sector.
// Parameter: 	int sector = preferably the same input used to initialize the erase.
//				technically, it only needs to be a sector # (negative) or address in the same bank
//				as the sector being currently erased. constants BANK_A to BANK_D will
//				also function correctly as inputs

void erase_suspend(int sector){
	*sector_bcalc(sector)=0x00B000B0;
	reset();
}

/*****/

/* Erase Resume */

// Valid only during erase suspend mode, resumes suspended erase.
// Parameter: identical to erase suspend

void erase_resume(int sector){
	reset();
	*sector_bcalc(sector)=0x00300030;
}

/*** End of Erasure Commands ***/

/*****/

/* Set Configuration Register */

// Command not valid during program/write, erase, or sector lock

// Parameter: unsigned char config = detailed bit-wise:
//		[7]	Set Device Read Mode (1 = Async, 0 = Synchronous)
//		[6]	RDY signal (1 = active with data, 0 = active one clock cycle before data)
//		[5]	Clock (1 = output triggers on rising edge, 0 = output triggers on falling edge)
//		[4:3]	Read Mode:
//					00 = Continous
//					01 = 8-word linear with wrap around
//					10 = 16-word linear with wrap around
//					11 = 32-word linear with wrap around
//		[2:0]	Programmable Wait State:
//					Data is valid on the [...] active CLK edge after AVD# transition to Vih
//					000 = 2nd
//					001 = 3rd
//					010 = 4th
//					011 = 5th
//					100 = 6th
//					101 = 7th
//					110 = <reserved>
//					111 = <reserved>
					
void set_config(unsigned int build_address){
	build_address = build_address << 12;
	build_address += 0x555;
	unlock();
	(*(volatile unsigned int *)(CS_BASE + build_address))=0x00C000C0;
}

void Enable_I_cache (void)
{
    __asm
    {
	   	mrc p15,0,r0,c1,c0,0
	    mov r0, #0x00001000
   		mcr p15,0,r0,c1,c0,0 
	}
}

/*****/

/****************************
******   The Program   ******
****************************/


int main(void){
	
	/***********************
	** Setting up the MX1 **
	***********************/
	
	//counter
	volatile unsigned int q;
	uint32_t pattern;

		
	// using a 32.768kHz crystal produces a 16.777MHz Pre-Multiplier
	// settings for the MCU and System PLL (for latest Tahiti spec) 
	// dictate that the default output of the PLL with a 32.768MHz
	// crystal is 264.24MHz.  
	// BCLK set to divide-by-five will produce a 52.8MHz HCLK
//	*(p_uint32_t)CRM_CSCR &= 0xFFFFC3FF;		
//	*(p_uint32_t)CRM_CSCR |= 0x00001000;
		
/*
	DDIR_A = 0x00007FF0;
	GIUS_A = 0x00007FF0;	// configure outputs as general purpose
	OCR1_A = 0xFFFFFFFF;
	OCR2_A = 0xFFFFFFFF;
	DR_A = 0x00007FF0;
	DDIR_C = 0xFFFFE1FF;
	GIUS_C = 0xFFFFE1FF;	//configure UART1
	OCR1_C = 0xFFFFFFFF;
	OCR2_C = 0xFFFFFFFF;
	EIM = 0x00000000;	//BCLK only during access
	FMCR = 0x00000000;	//CS2 and CS3 are non-SDRAM
*/
	

	SysInit();
	MemInit();
	
	//set to async mode, random access time 55ns, assuming HCLK = 88.08MHz
	*(p_uint32_t)WEIM_CS0U = 0x00000801;	//chip select 0 upper register
	*(p_uint32_t)WEIM_CS0L = 0x00000E01;	//chip select 0 lower register

//	Enable_I_cache();
	
	/********************************************************************
	** Test 1: Verify manufacturer and device code for AMD Am29BDS128H **
	********************************************************************/
	
	if(auto_manu_id()){
		printf("Manufacturer ID is correct!\n");
	} else {
		printf("**Manufacturer ID is incorrect**\n");
	}	
	if(auto_dev_id()){
		printf("Device ID is correct!\n");
	} else {
		printf("**Device ID is incorrect**\n");
	}


	/**********************************
	** Test 2: Flash Erase and Write **
	**********************************/

	#ifdef SDRAM_EIM_MEMCPY_TEST	// use this for memcpy test of SDRAM and EIM
		// Erase all of BANK D
		for (q = 0; q <= 38; q++){
			if(erase_sector(-q)){
				printf("Sector %d", q);
				printf(" Erased\n");
			} else {
				printf("Sector %d", q); 
				printf(" Erase failed.\n");
			}
		}
		reset();

		printf("Now, writing known data values into flash.\n");
		pattern = 0;	// initilaize apttern variable
		// now write to entire flash, just a test to ensure we can write to the entire flash
		for (q = 0; q < 1024*1024*2; q++)	// 2MB of flash programming
		{
			// data written to each address is the address that the data is written to
			// int write(int address,int data)
			// write(q,q);
			write(q,pattern);
			
			pattern += 0x11112222;
		}
		
		gFailCount = 0;	// initialize 
		pattern = 0;
		// now let's read the entire flash content to ensure the writes took
		for (q = 0; q < 1024*1024*2; q++)
		{
			if(read(q) != pattern)
			{
				printf("Failure, write didn't take!, Address = 0x%x\n", q); 
				gFailCount++;
			}
			pattern += 0x11112222;
		}
		
		if (gFailCount ==0)
		{
			printf("Write test passed!\n");
		}
		
	#else		// use this for the intensive DMA and memcpy test
		// Erase all of BANK D
		for (q = 0; q <= 38; q++){
			if(erase_sector(-q)){
				printf("Sector %d", q);
				printf(" Erased\n");
			} else {
				printf("Sector %d", q); 
				printf(" Erase failed.\n");
			}
		}
		reset();
		
		// address starting at first MB of flash
		printf("Now, writing known data values into flash.\n");
		pattern = 0;	// initilaize apttern variable
		// now write to entire flash, just a test to ensure we can write to the entire flash
		for (q = 0; q < 1024*1024*1; q++)	// 1MB of flash programming, for memcpy
		{
			// data written to each address is the address that the data is written to
			// int write(int address,int data)
			// write(q,q);
			write(q,pattern);
			
			pattern += 0x11112222;
		}
		
		// address starting at second MB of flash
		pattern = 0;
		for (q = 0x100000; q <= 0x100100; q++)	// 256 bytes of flash programming, for DMA transfer
		{
			// data written to each address is the address that the data is written to
			// int write(int address,int data)
			// write(q,q);
			write(q,pattern);
			
			pattern = (q + 1);
		}
		
		
		
		gFailCount = 0;	// initialize 
		pattern = 0;
		// now let's read the entire flash content to ensure the writes took
		for (q = 0; q < 1024*1024*2; q++)
		{
			if(read(q) != pattern)
			{
				printf("Failure, write didn't take!, Address = 0x%x\n", q); 
				gFailCount++;
			}
			pattern += 0x11112222;
		}
		
		if (gFailCount ==0)
		{
			printf("Write test passed!\n");
		}	
	
	#endif
	
	reset();


	return (0);
}