📄 sram_test.c
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#include "davincievm_emif.h"
/* ------------------------------------------------------------------------ *
* *
* sram_init( ) *
* Configure pinmux and wait states *
* *
* ------------------------------------------------------------------------ */
Int16 sram_init( )
{
/*------------------------------------------------------------------*
* SRAM CHIP TIMEOUT @ 594 MHz *
* *
* AEMIF.CLK freq = PLL1/6 = 594/6 = 99 MHz *
* AEMIF.CLK period = 1/99 MHz = 10.1 ns *
* *
*------------------------------------------------------------------*/
Uint32 acfg2 = 0
| ( 0 << 31 ) // selectStrobe
| ( 0 << 30 ) // extWait
| ( 0 << 26 ) // writeSetup // 0 ns
| ( 9 << 20 ) // writeStrobe // 85 ns
| ( 0 << 17 ) // writeHold // 0 ns
| ( 0 << 13 ) // readSetup // 0 ns
| ( 6 << 7 ) // readStrobe // 60 ns
| ( 0 << 4 ) // readHold // 0 ns
| ( 1 << 2 ) // turnAround // 10 ns
| ( 1 << 0 ) // asyncSize // 16-bit bus
;
DAVINCIEVM_EMIF_config( acfg2,
AEMIF_MAX_TIMEOUT_16BIT,
AEMIF_MAX_TIMEOUT_16BIT,
AEMIF_MAX_TIMEOUT_16BIT );
AEMIF_NANDFCR = 0x00000000;
DAVINCIEVM_PMX_clear( 0x00030000, 0);
return 0;
}
extern memfill32( Uint32 start, Uint32 len, Uint32 val );
extern memaddr32( Uint32 start, Uint32 len );
extern meminvaddr32( Uint32 start, Uint32 len );
/* ------------------------------------------------------------------------ *
* *
* sram_test( ) *
* *
* ------------------------------------------------------------------------ */
Uint32 sram_test( void )
{
Uint32 retcode = 0;
Uint32 SRAM_BASE = 0x02000000;
Uint32 SRAM_SIZE = 0x00200000;
/* Initialize SRAM */
sram_init( );
retcode |= memfill32( SRAM_BASE, SRAM_SIZE, 0xFFFFFFFF );
retcode |= memfill32( SRAM_BASE, SRAM_SIZE, 0xAAAAAAAA );
retcode |= memfill32( SRAM_BASE, SRAM_SIZE, 0x55555555 );
retcode |= memfill32( SRAM_BASE, SRAM_SIZE, 0x00000000 );
retcode |= memaddr32( SRAM_BASE, SRAM_SIZE );
retcode |= meminvaddr32( SRAM_BASE, SRAM_SIZE );
return retcode;
}
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