csilib.c

MX21 CSI driver user mode library * * This program is free software you can redistribute it and/

/*
 * MX21 CSI driver user mode library
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 * Copyright (C) 2004 Motorola Semiconductors Hong Kong.
 *
 */
#include <linux/config.h>
#include <stdlib.h>
#include <sys/ioctl.h>
#include <stdio.h>
#include <fcntl.h>
#include <unistd.h>
#include <asm/mman.h>
#include <string.h>	//memset...

#include "csi.h"
#include "csilib.h"

//global
static int g_fd_csi = 0;


void csi_open(void)
{
	g_fd_csi = open("/dev/csi", O_RDWR);
	if(g_fd_csi < 0)
	{
		printf("Device csi open error !\n");
		exit(-1);
	}
	
	return;
}


void csi_close(void)
{
	close(g_fd_csi);	
	return;
}


void csi_config(CSI_CFG * _cfg)
{
	ioctl(g_fd_csi, IOCTL_CSI_CONFIG, (unsigned long)_cfg);
	return;
}


void csi_read_config(CSI_CFG * _cfg)
{
	ioctl(g_fd_csi, IOCTL_CSI_READ_CONFIG, (unsigned long)_cfg);
	return;
}


void csi_dump_config(void)
{
	CSI_CFG cfg;
	
	csi_read_config(&cfg);
	
	printf("\nCSI CONFIGURATION\n\n");
	
	printf("-- control reg 1 --\n");
	printf("swap16_en = %d\n", cfg.swap16_en);
	printf("ext_vsync = %d\n", cfg.ext_vsync);
	printf("eof_int_en = %d\n", cfg.eof_int_en);
	printf("prp_if_en = %d\n", cfg.prp_if_en);
	printf("ccir_mode = %d\n", cfg.ccir_mode);
	printf("cof_int_en = %d\n", cfg.cof_int_en);
	printf("sf_or_inten = %d\n", cfg.sf_or_inten);
	printf("rf_or_inten = %d\n", cfg.rf_or_inten);
	printf("statff_level = %d\n", cfg.statff_level);
	printf("staff_inten = %d\n", cfg.staff_inten);
	printf("rxff_level = %d\n", cfg.rxff_level);
	printf("rxff_inten = %d\n", cfg.rxff_inten);
	printf("sof_pol = %d\n", cfg.sof_pol);
	printf("sof_inten = %d\n", cfg.sof_inten);
	printf("mclkdiv = %d\n", cfg.mclkdiv);
	printf("hsync_pol = %d\n", cfg.hsync_pol);
	printf("ccir_en = %d\n", cfg.ccir_en);
	printf("mclken = %d\n", cfg.mclken);
	printf("fcc = %d\n", cfg.fcc);
	printf("pack_dir = %d\n", cfg.pack_dir);
	printf("gclk_mode = %d\n", cfg.gclk_mode);
	printf("inv_data = %d\n", cfg.inv_data);
	printf("inv_pclk = %d\n", cfg.inv_pclk);
	printf("redge = %d\n", cfg.redge);
	
	printf("-- control reg 3 --\n");
	printf("csi_sup: %d\n", cfg.csi_sup);
	printf("zero_pack_en: %d\n", cfg.zero_pack_en);
	printf("ecc_int_en: %d\n", cfg.ecc_int_en);
	printf("ecc_auto_en: %d\n", cfg.ecc_auto_en);

	printf("-- rxcnt reg --\n");
	printf("rxcnt: %d\n", cfg.rxcnt);
	
	printf("-- system config --\n");
	printf("module_irq_enable = %d\n", cfg.module_irq_enable);
	
	return;
}


//read a frame by polling
void csi_read(unsigned int * _buf, int byte_size)
{
	read(g_fd_csi, _buf, byte_size);

	return;
}


void csi_read_status(CSI_STATUS * _status)
{
	ioctl(g_fd_csi, IOCTL_CSI_READ_STATUS, (unsigned long)_status);
	return;
}


void csi_dump_status(void)
{
	CSI_STATUS status;
	
	csi_read_status(&status);
	
	printf("##############\n");
	printf("# csi status #\n");
	printf("##############\n");
	printf("sff_or_int = %d\n", status.sff_or_int);
	printf("rff_or_int = %d\n", status.rff_or_int);
	printf("statff_int = %d\n", status.statff_int);
	printf("rxff_int = %d\n", status.rxff_int);
	printf("eof_int = %d\n", status.eof_int);
	printf("sof_int = %d\n", status.sof_int);
	printf("f2_int = %d\n", status.f2_int);
	printf("f1_int = %d\n", status.f1_int);
	printf("cof_int = %d\n", status.cof_int);
	printf("ecc_int = %d\n", status.ecc_int);
	printf("drdy = %d\n", status.drdy);

	return;
}


void csi_reset_frame_count(void)
{
	ioctl(g_fd_csi, IOCTL_CSI_RST_FRMCNT, 0);
	return;
}


int csi_get_frame_count(void)
{
	int count;
	ioctl(g_fd_csi, IOCTL_CSI_GET_FRMCNT, &count);
	return count;
}


void csi_select_config(int config, CSI_CFG *_cfg)
{
	memset(_cfg, 0, sizeof(CSI_CFG));
	
	switch(config)
	{
		case TIMING_IMAGIC_RGB_POLL:
		{
		//for imagic sensor
		//polling, rgb
			_cfg->swap16_en = 1;
			_cfg->ext_vsync = 1;
			_cfg->eof_int_en = 0;
			_cfg->prp_if_en = 0;
			_cfg->ccir_mode = 0;
			_cfg->cof_int_en = 0;
			_cfg->sf_or_inten = 0;
			_cfg->rf_or_inten = 0;
			_cfg->statff_level = 16;
			_cfg->staff_inten = 0;
			_cfg->rxff_level = 8;
			_cfg->rxff_inten = 0;
			_cfg->sof_pol = 1;
			_cfg->sof_inten = 0;
			#ifdef CONFIG_FRQ_350
			_cfg->mclkdiv = 8;             //changed 4->8, for support 350M, Lisa
			#else
			_cfg->mclkdiv = 4;
			#endif
			_cfg->hsync_pol = 1;
			_cfg->ccir_en = 0;
			_cfg->mclken = 1;
			_cfg->fcc = 1;
			_cfg->pack_dir = 1;
			_cfg->gclk_mode = 1;
			_cfg->inv_data = 0;
			_cfg->inv_pclk = 0;
			_cfg->redge = 1;
			
			_cfg->module_irq_enable = 0;

			_cfg->csi_sup = 0;
			_cfg->zero_pack_en = 0;
			_cfg->ecc_int_en = 0;
			_cfg->ecc_auto_en = 0;
	
			break;
		}
		case TIMING_IMAGIC_RGB_PRP:
		{
		//for imagic sensor
		//prp, rgb
//			_cfg->swap16_en = 0;
_cfg->swap16_en = 1;
			_cfg->ext_vsync = 1;
			_cfg->eof_int_en = 0;
			_cfg->prp_if_en = 1;
			_cfg->ccir_mode = 0;
			_cfg->cof_int_en = 0;
			_cfg->sf_or_inten = 0;
			_cfg->rf_or_inten = 0;
			_cfg->statff_level = 16;
			_cfg->staff_inten = 0;
			_cfg->rxff_level = 8;
			_cfg->rxff_inten = 0;
			_cfg->sof_pol = 1;
			_cfg->sof_inten = 0;
			_cfg->mclkdiv = 8;
			_cfg->hsync_pol = 1;
			_cfg->ccir_en = 0;
			_cfg->mclken = 1;
			_cfg->fcc = 1;
			_cfg->pack_dir = 0;
			_cfg->gclk_mode = 1;
			_cfg->inv_data = 0;
			_cfg->inv_pclk = 0;
			_cfg->redge = 1;
			
			_cfg->module_irq_enable = 0;

			_cfg->csi_sup = 0;
			_cfg->zero_pack_en = 0;
			_cfg->ecc_int_en = 0;
			_cfg->ecc_auto_en = 0;
	
			break;
		}
		case TIMING_PHILIPS_POLL:
		{
		//for philips tvin
		//polling, yuv422
			_cfg->swap16_en = 0;
			_cfg->ext_vsync = 1;
			_cfg->eof_int_en = 0;
			_cfg->prp_if_en = 0;
			_cfg->ccir_mode = 1;	//interlace mode
			_cfg->cof_int_en = 0;
			_cfg->sf_or_inten = 0;
			_cfg->rf_or_inten = 0;
			_cfg->statff_level = 16;
			_cfg->staff_inten = 0;
			_cfg->rxff_level = 8;
			_cfg->rxff_inten = 0;
			_cfg->sof_pol = 1;
			_cfg->sof_inten = 0;
			_cfg->mclkdiv = 8;
			_cfg->hsync_pol = 1;
			_cfg->ccir_en = 1;
			_cfg->mclken = 0;
			_cfg->fcc = 1;
			_cfg->pack_dir = 0;
			_cfg->gclk_mode = 0;
			_cfg->inv_data = 0;
			_cfg->inv_pclk = 0;
			_cfg->redge = 1;
			
			_cfg->module_irq_enable = 0;

			_cfg->csi_sup = 0;
			_cfg->zero_pack_en = 0;
			_cfg->ecc_int_en = 0;
			_cfg->ecc_auto_en = 0;
	
			break;
		}
		case TIMING_PHILIPS_PRP:
		{
		//for philips tvin
		//prp, yuv422
			_cfg->swap16_en = 0;
			_cfg->ext_vsync = 1;
			_cfg->eof_int_en = 0;
			_cfg->prp_if_en = 1;
			_cfg->ccir_mode = 1;	//interlace mode
			_cfg->cof_int_en = 0;
			_cfg->sf_or_inten = 0;
			_cfg->rf_or_inten = 0;
			_cfg->statff_level = 16;
			_cfg->staff_inten = 0;
			_cfg->rxff_level = 8;
			_cfg->rxff_inten = 0;
			_cfg->sof_pol = 1;
			_cfg->sof_inten = 0;
			_cfg->mclkdiv = 8;
			_cfg->hsync_pol = 1;
			_cfg->ccir_en = 1;
			_cfg->mclken = 0;
			_cfg->fcc = 1;
			_cfg->pack_dir = 0;
			_cfg->gclk_mode = 0;
			_cfg->inv_data = 0;
			_cfg->inv_pclk = 0;
			_cfg->redge = 1;
			
			_cfg->module_irq_enable = 0;

			_cfg->csi_sup = 0;
			_cfg->zero_pack_en = 0;
			_cfg->ecc_int_en = 0;
			_cfg->ecc_auto_en = 0;
	
			break;
		}
	}
	
	return;
}


//wait until eof is detected
//block mode
void csi_poll_eof(int rxcnt)
{
	ioctl(g_fd_csi, IOCTL_CSI_POLL_EOF, rxcnt);
	
	return;
}


//wait until sof is detected
//block mode
void csi_poll_sof(int rxcnt)
{
	ioctl(g_fd_csi, IOCTL_CSI_POLL_SOF, 0);
	
	return;
}


//hw reset
void csi_reset()
{
	ioctl(g_fd_csi, IOCTL_CSI_RESET, 0);
	
	return;
}