at91sam7s256.h

专业汽车级嵌入式操作系统OSEK的源代码

//  ----------------------------------------------------------------------------
//          ATMEL Microcontroller Software Support  -  ROUSSET  -
//  ----------------------------------------------------------------------------
//  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
//  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
//  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
//  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
//  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
//  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
//  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
//  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
//  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//  ----------------------------------------------------------------------------
// File Name           : AT91SAM7S256.h
// Object              : AT91SAM7S256 definitions
// Generated           : AT91 SW Application Group  03/08/2005 (15:46:13)
//
// CVS Reference       : /AT91SAM7S256.pl/1.8/Wed Feb  9 15:29:26 2005//
// CVS Reference       : /SYS_SAM7S.pl/1.2/Tue Feb  1 17:01:52 2005//
// CVS Reference       : /MC_SAM7S.pl/1.2/Tue Feb  1 17:01:00 2005//
// CVS Reference       : /PMC_SAM7S_USB.pl/1.4/Tue Feb  8 13:58:22 2005//
// CVS Reference       : /RSTC_SAM7S.pl/1.1/Tue Feb  1 16:16:35 2005//
// CVS Reference       : /RTTC_6081A.pl/1.2/Tue Nov  9 14:43:58 2004//
// CVS Reference       : /PITC_6079A.pl/1.2/Tue Nov  9 14:43:56 2004//
// CVS Reference       : /WDTC_6080A.pl/1.3/Tue Nov  9 14:44:00 2004//
// CVS Reference       : /VREG_6085B.pl/1.1/Tue Feb  1 16:05:48 2005//
// CVS Reference       : /UDP_6083C.pl/1.1/Mon Jan 31 13:01:46 2005//
// CVS Reference       : /AIC_6075A.pl/1.1/Fri Jun 28 10:36:48 2002//
// CVS Reference       : /PIO_6057A.pl/1.2/Thu Feb  3 10:18:28 2005//
// CVS Reference       : /DBGU_6059D.pl/1.1/Mon Jan 31 13:15:32 2005//
// CVS Reference       : /US_6089C.pl/1.1/Mon Jul 12 18:23:26 2004//
// CVS Reference       : /SPI_6088D.pl/1.2/Mon Feb 14 07:24:18 2005//
// CVS Reference       : /SSC_6078A.pl/1.1/Tue Jul 13 07:45:40 2004//
// CVS Reference       : /TC_6082A.pl/1.6/Fri Feb 18 13:53:30 2005//
// CVS Reference       : /TWI_6061A.pl/1.1/Tue Jul 13 07:38:06 2004//
// CVS Reference       : /PDC_6074C.pl/1.2/Thu Feb  3 08:48:54 2005//
// CVS Reference       : /ADC_6051C.pl/1.1/Fri Oct 17 09:12:38 2003//
// CVS Reference       : /PWM_6044D.pl/1.1/Tue Apr 27 14:53:52 2004//
//  ----------------------------------------------------------------------------

#ifndef AT91SAM7S256_H
#  define AT91SAM7S256_H

typedef volatile unsigned int AT91_REG;	// Hardware register definition


// *****************************************************************************
//              SOFTWARE API DEFINITION  FOR System Peripherals
// *****************************************************************************
  typedef struct _AT91S_SYS {
  
AT91_REG AIC_SMR[32];	// Source Mode Register
  AT91_REG AIC_SVR[32];		// Source Vector Register
  AT91_REG AIC_IVR;		// IRQ Vector Register
  AT91_REG AIC_FVR;		// FIQ Vector Register
  AT91_REG AIC_ISR;		// Interrupt Status Register
  AT91_REG AIC_IPR;		// Interrupt Pending Register
  AT91_REG AIC_IMR;		// Interrupt Mask Register
  AT91_REG AIC_CISR;		// Core Interrupt Status Register
  AT91_REG Reserved0[2];	//
  AT91_REG AIC_IECR;		// Interrupt Enable Command Register
  AT91_REG AIC_IDCR;		// Interrupt Disable Command Register
  AT91_REG AIC_ICCR;		// Interrupt Clear Command Register
  AT91_REG AIC_ISCR;		// Interrupt Set Command Register
  AT91_REG AIC_EOICR;		// End of Interrupt Command Register
  AT91_REG AIC_SPU;		// Spurious Vector Register
  AT91_REG AIC_DCR;		// Debug Control Register (Protect)
  AT91_REG Reserved1[1];	//
  AT91_REG AIC_FFER;		// Fast Forcing Enable Register
  AT91_REG AIC_FFDR;		// Fast Forcing Disable Register
  AT91_REG AIC_FFSR;		// Fast Forcing Status Register
  AT91_REG Reserved2[45];	//
  AT91_REG DBGU_CR;		// Control Register
  AT91_REG DBGU_MR;		// Mode Register
  AT91_REG DBGU_IER;		// Interrupt Enable Register
  AT91_REG DBGU_IDR;		// Interrupt Disable Register
  AT91_REG DBGU_IMR;		// Interrupt Mask Register
  AT91_REG DBGU_CSR;		// Channel Status Register
  AT91_REG DBGU_RHR;		// Receiver Holding Register
  AT91_REG DBGU_THR;		// Transmitter Holding Register
  AT91_REG DBGU_BRGR;		// Baud Rate Generator Register
  AT91_REG Reserved3[7];	//
  AT91_REG DBGU_CIDR;		// Chip ID Register
  AT91_REG DBGU_EXID;		// Chip ID Extension Register
  AT91_REG DBGU_FNTR;		// Force NTRST Register
  AT91_REG Reserved4[45];	//
  AT91_REG DBGU_RPR;		// Receive Pointer Register
  AT91_REG DBGU_RCR;		// Receive Counter Register
  AT91_REG DBGU_TPR;		// Transmit Pointer Register
  AT91_REG DBGU_TCR;		// Transmit Counter Register
  AT91_REG DBGU_RNPR;		// Receive Next Pointer Register
  AT91_REG DBGU_RNCR;		// Receive Next Counter Register
  AT91_REG DBGU_TNPR;		// Transmit Next Pointer Register
  AT91_REG DBGU_TNCR;		// Transmit Next Counter Register
  AT91_REG DBGU_PTCR;		// PDC Transfer Control Register
  AT91_REG DBGU_PTSR;		// PDC Transfer Status Register
  AT91_REG Reserved5[54];	//
  AT91_REG PIOA_PER;		// PIO Enable Register
  AT91_REG PIOA_PDR;		// PIO Disable Register
  AT91_REG PIOA_PSR;		// PIO Status Register
  AT91_REG Reserved6[1];	//
  AT91_REG PIOA_OER;		// Output Enable Register
  AT91_REG PIOA_ODR;		// Output Disable Registerr
  AT91_REG PIOA_OSR;		// Output Status Register
  AT91_REG Reserved7[1];	//
  AT91_REG PIOA_IFER;		// Input Filter Enable Register
  AT91_REG PIOA_IFDR;		// Input Filter Disable Register
  AT91_REG PIOA_IFSR;		// Input Filter Status Register
  AT91_REG Reserved8[1];	//
  AT91_REG PIOA_SODR;		// Set Output Data Register
  AT91_REG PIOA_CODR;		// Clear Output Data Register
  AT91_REG PIOA_ODSR;		// Output Data Status Register
  AT91_REG PIOA_PDSR;		// Pin Data Status Register
  AT91_REG PIOA_IER;		// Interrupt Enable Register
  AT91_REG PIOA_IDR;		// Interrupt Disable Register
  AT91_REG PIOA_IMR;		// Interrupt Mask Register
  AT91_REG PIOA_ISR;		// Interrupt Status Register
  AT91_REG PIOA_MDER;		// Multi-driver Enable Register
  AT91_REG PIOA_MDDR;		// Multi-driver Disable Register
  AT91_REG PIOA_MDSR;		// Multi-driver Status Register
  AT91_REG Reserved9[1];	//
  AT91_REG PIOA_PPUDR;		// Pull-up Disable Register
  AT91_REG PIOA_PPUER;		// Pull-up Enable Register
  AT91_REG PIOA_PPUSR;		// Pull-up Status Register
  AT91_REG Reserved10[1];	//
  AT91_REG PIOA_ASR;		// Select A Register
  AT91_REG PIOA_BSR;		// Select B Register
  AT91_REG PIOA_ABSR;		// AB Select Status Register
  AT91_REG Reserved11[9];	//
  AT91_REG PIOA_OWER;		// Output Write Enable Register
  AT91_REG PIOA_OWDR;		// Output Write Disable Register
  AT91_REG PIOA_OWSR;		// Output Write Status Register
  AT91_REG Reserved12[469];	//
  AT91_REG PMC_SCER;		// System Clock Enable Register
  AT91_REG PMC_SCDR;		// System Clock Disable Register
  AT91_REG PMC_SCSR;		// System Clock Status Register
  AT91_REG Reserved13[1];	//
  AT91_REG PMC_PCER;		// Peripheral Clock Enable Register
  AT91_REG PMC_PCDR;		// Peripheral Clock Disable Register
  AT91_REG PMC_PCSR;		// Peripheral Clock Status Register
  AT91_REG Reserved14[1];	//
  AT91_REG PMC_MOR;		// Main Oscillator Register
  AT91_REG PMC_MCFR;		// Main Clock  Frequency Register
  AT91_REG Reserved15[1];	//
  AT91_REG PMC_PLLR;		// PLL Register
  AT91_REG PMC_MCKR;		// Master Clock Register
  AT91_REG Reserved16[3];	//
  AT91_REG PMC_PCKR[3];		// Programmable Clock Register
  AT91_REG Reserved17[5];	//
  AT91_REG PMC_IER;		// Interrupt Enable Register
  AT91_REG PMC_IDR;		// Interrupt Disable Register
  AT91_REG PMC_SR;		// Status Register
  AT91_REG PMC_IMR;		// Interrupt Mask Register
  AT91_REG Reserved18[36];	//
  AT91_REG RSTC_RCR;		// Reset Control Register
  AT91_REG RSTC_RSR;		// Reset Status Register
  AT91_REG RSTC_RMR;		// Reset Mode Register
  AT91_REG Reserved19[5];	//
  AT91_REG RTTC_RTMR;		// Real-time Mode Register
  AT91_REG RTTC_RTAR;		// Real-time Alarm Register
  AT91_REG RTTC_RTVR;		// Real-time Value Register
  AT91_REG RTTC_RTSR;		// Real-time Status Register
  AT91_REG PITC_PIMR;		// Period Interval Mode Register
  AT91_REG PITC_PISR;		// Period Interval Status Register
  AT91_REG PITC_PIVR;		// Period Interval Value Register
  AT91_REG PITC_PIIR;		// Period Interval Image Register
  AT91_REG WDTC_WDCR;		// Watchdog Control Register
  AT91_REG WDTC_WDMR;		// Watchdog Mode Register
  AT91_REG WDTC_WDSR;		// Watchdog Status Register
  AT91_REG Reserved20[5];	//
  AT91_REG VREG_MR;		// Voltage Regulator Mode Register
} AT91S_SYS, *AT91PS_SYS;


// *****************************************************************************
//              SOFTWARE API DEFINITION  FOR Advanced Interrupt Controller
// *****************************************************************************
  typedef struct _AT91S_AIC {
  
AT91_REG AIC_SMR[32];	// Source Mode Register
  AT91_REG AIC_SVR[32];		// Source Vector Register
  AT91_REG AIC_IVR;		// IRQ Vector Register
  AT91_REG AIC_FVR;		// FIQ Vector Register
  AT91_REG AIC_ISR;		// Interrupt Status Register
  AT91_REG AIC_IPR;		// Interrupt Pending Register
  AT91_REG AIC_IMR;		// Interrupt Mask Register
  AT91_REG AIC_CISR;		// Core Interrupt Status Register
  AT91_REG Reserved0[2];	//
  AT91_REG AIC_IECR;		// Interrupt Enable Command Register
  AT91_REG AIC_IDCR;		// Interrupt Disable Command Register
  AT91_REG AIC_ICCR;		// Interrupt Clear Command Register