an3042.h

The Lite Evaluation/Demonstration Kit is intended to illustrate use of the AN3042. The AN3042 is c

// AN3042.h

#define TRUE	1
#define FALSE 	0


#ifndef _DWORD_DEFINED
#define _DWORD_DEFINED
typedef unsigned long DWORD;
#endif // !_DWORD_DEFINED


// ********************************************************
//      3042 Defines and Structures


#define  PADAT  ( 0x0956 )			// Port A Data Register (referenced off the IMMR register)

#define DMAcompleteBit 0x00000020

#define FIFO_DEPTH  32


// Chip select addresses...
#define CS1_HI_BASE	   ( 0x0010 )	 			// AN3042
#define CS2_HI_BASE	   ( 0x0020	) 	 			// SRAM
#define CS3_HI_BASE	   ( 0x0030	) 	 			// LED (Hex) Display
#define CS0_HI_BASE	   ( 0xFFF0	) 	 			// FlexROM/Flash

#define CS1_BASE	   ( CS1_HI_BASE << 16 )	 // AN3042
#define CS2_BASE	   ( CS2_HI_BASE << 16 ) 	 // SRAM
#define CS3_BASE	   ( CS3_HI_BASE << 16 ) 	 // LED (Hex) Display
#define CS0_BASE	   ( CS0_HI_BASE << 16 ) 	 // FlexROM/Flash

#define DAHBASEoffset				( 0x460 )


#define DAregionoffset				( 0x2000 )
#define DAregionsize				( 0x2000 )

#define SHAREDMEMregionoffset		( 0x4000 )
#define SHAREDMEMregionsize			( 0x4000 )



// I2O Registers

#define  I2O_HOST_INTERRUPT_STATUS_REG      0x30
#define  I2O_HOST_INTERRUPT_MASK_REG      	0x34
#define  I2O_IOP_INTERRUPT_STATUS_REG      	0x38
#define  I2O_IOP_INTERRUPT_MASK_REG      	0x3C


#define  I2O_INBOUND_POST_FIFO_REG      	0x40	// W	
#define  I2O_INBOUND_FREE_FIFO_REG      	0x40	// R

#define  I2O_OUTBOUND_POST_FIFO_REG      	0x44	// W
#define  I2O_OUTBOUND_FREE_FIFO_REG      	0x44	// W

#define  I2O_INBOUND_POST_FIFO_DEBUG_REG    0x48	// R
#define  I2O_INBOUND_FREE_FIFO_DEBUG_REG    0x48	// W

#define  I2O_OUTBOUND_POST_FIFO_DEBUG_REG   0x4C	// R
#define  I2O_OUTBOUND_FREE_FIFO_DEBUG_REG   0x4C	// R


// Local side I2O structure.
typedef struct _local_i2o_regs_struct
{
   DWORD unused_00;   // 0x00
   DWORD unused_04;
   DWORD unused_08;
   DWORD unused_0c;

   DWORD unused_10;   // 0x10
   DWORD unused_14;
   DWORD unused_18;
   DWORD unused_1c;

   DWORD unused_20;   // 0x20
   DWORD unused_24;
   DWORD unused_28;
   DWORD unused_2c;

   DWORD hisr;        // 0x30
   DWORD himr;
   DWORD lisr;
   DWORD limr;

   // 860-side definitions of the I2O FIFOs
				    // The debug FIFO ports can be used in conjunction with the 'normal' ports
					//  to access all FIFO logic from each side.
   union {            // 0x40
	DWORD ibp_debug;  // ibp_debug = write only 
	DWORD ibf_debug;  //                         ibf_debug = read only
   } fifo40;

   union {            // 0x44
	DWORD obp_debug;  // obp_debug = read only 
	DWORD obf_debug;  //                         obf_debug = write only
   } fifo44;

   union {            // 0x48
	DWORD ibp;        // ibp = read only 
	DWORD ibf;        //                         ibf = write only
   } fifo48;

   union {            // 0x4C
	DWORD obp;        // obp = write only
	DWORD obf;        //                         obf = read only
   } fifo4C;

/*
   DWORD unused_40;   // 0x40
   DWORD unused_44;
   DWORD ibp_ibf;		// ibp = read only     ibf = write only
   DWORD obp_obf;       // obp = write only    obf = read only
*/
} local_i2o_regs_struct;




// Operation registers offsets.

#define  DIRECT_ACCESS_BASE_REG             0x460

#define  I2C_COMMAND_REG                    0x4A0
// #define  I2C_READ_COMMAND_REG            0x4A0
// #define  I2C_WRITE_COMMAND_REG           0x4A0
#define  I2C_READ_DATA_REG                  0x4A4
#define  I2C_STATUS_REG                     0x4A8

#define  DMA_LOCAL_BASE_ADDRESS_REG         0x4B0
#define  DMA_HOST_BASE_ADDRESS_REG          0x4B4
#define  DMA_SIZE_REG                       0x4B8
#define  DMA_CONTROL_REG                    0x4BC


#define  HOST_CONTROL_REG                   0x4E0
#define  HOST_INTERRUPT_CONTROL_STATUS_REG  0x4E4
#define  HOST_TO_LOCAL_DATA_MAILBOX_REG     0x4E8

#define  LOCAL_INTERRUPT_CONTROL_STATUS_REG 0x4F4
#define  LOCAL_TO_HOST_DATA_MAILBOX_REG     0x4F8
#define  LOCAL_BUS_CONFIG_REG               0x4FC


const int OP_REGS_BASE_42 = 0x460;		//  Ops Reg Base for the 3042

typedef struct op_regs_struct_42_t
{
   DWORD dahbase;		// 0x460
   DWORD unused_464;
   DWORD unused_468;
   DWORD unused_46c;

   DWORD unused_470;	// 0x470
   DWORD unused_474;
   DWORD unused_478;
   DWORD unused_47c;

   DWORD unused_480;	// 0x480
   DWORD unused_484;
   DWORD unused_488;
   DWORD unused_48c;

   DWORD unused_490;	// 0x490
   DWORD unused_494;
   DWORD unused_498;
   DWORD unused_49c;

   DWORD nvcmd;			// 0x4A0
   DWORD nvread;
   DWORD nvstat;
   DWORD unused_4Ac;

   DWORD dmalbase;		// 0x4B0
   DWORD dmahbase;
   DWORD dmasize;
//   	DWORD dmactl_dword;

   union dmactl_t {
   	DWORD dmactl_dword;
	unsigned char dmactl_bytes[4];
   } dmactl_v;

   DWORD unused_4C0;	// 0x4C0
   DWORD unused_4C4;
   DWORD unused_4C8;
   DWORD unused_4Cc;

   DWORD unused_4D0;	// 0x4D0
   DWORD unused_4D4;
   DWORD unused_4D8;
   DWORD unused_4Dc;

   DWORD hctl;			// 0x4E0
   DWORD hint;
   DWORD hldata;
   DWORD unused_4Ec;

   DWORD unused_4F0;	// 0x4F0
   DWORD lint;
   DWORD lhdata;
   DWORD lbuscfg;
} op_regs_struct_42_v;


const DWORD dahbaseBASEaddrMSK	= 0xFFFFe000 ;
const DWORD dahbasePCIMSK		= 0x00000006 ;
const DWORD dahbaseMSK = dahbaseBASEaddrMSK + dahbasePCIMSK ;

struct reg_descrip_struct {
  DWORD  offset;	// Offset beyond the base (can be BAR, or other base register).
  DWORD  omask;		// What you read back when you write all ones to the register.
  DWORD  zmask;		// What you read back when you write all zeros to the register.
  char * text;      // String (for textual description)
};




//     End 3042 Defines and Structures
// ********************************************************