mainssav.sav
来自「The Lite Evaluation/Demonstration Kit is」· SAV 代码 · 共 1,534 行 · 第 1/3 页
SAV
1,534 行
#250: regp->dmasize = 0; // This is as small as we can go, but still moves 1 DWORD when DMA is kicked off.
addi r30, r30, 1
.L93:
cmplwi r30, 8
blt .L92
lis r12, %hiadj(regp)
lwz r7, %lo(regp)(r12)
li r0, 0
stw r0, 88(r7)
#251: regp->dmahbase = 0xFFBD8000 + 0x4000; // Point the DMA at the Shared Mem of the 3042 card *not* on the extender.
lis r12, %hiadj(regp)
lwz r11, %lo(regp)(r12)
lis r0, -67
ori r0, r0, 49152
stw r0, 84(r11)
#252: regp->dmalbase = 0; // Point at the base of our SRAM.
lis r12, %hiadj(regp)
lwz r10, %lo(regp)(r12)
li r0, 0
stw r0, 80(r10)
#254: origDMACTL = regp->dmactl_v.dmactl_dword; // Get the original.
lis r12, %hiadj(regp)
lwz r9, %lo(regp)(r12)
lwz r30, 92(r9)
#256: regp->dmactl_v.dmactl_dword = 0; // Write all zeros. This kicks off the DMA setup above.
lis r12, %hiadj(regp)
lwz r8, %lo(regp)(r12)
li r0, 0
stw r0, 92(r8)
#257: tempd = regp->dmactl_v.dmactl_dword; // Read it back.
lis r12, %hiadj(regp)
lwz r7, %lo(regp)(r12)
lwz r11, 92(r7)
#258: if (tempd != 0)
#259: {
cmplwi r11, 0
beq .L105
#260: errorCnt++;
addi r31, r31, 1
#261: errorHandler (errorCnt, FALSE);
mr r3, r31
li r4, 0
bl errorHandler
#262: }
#264: regp->dmactl_v.dmactl_dword = 0xFFFFffff; // Write all ones. This kicks off the DMA setup above.
.L105:
lis r12, %hiadj(regp)
lwz r11, %lo(regp)(r12)
li r0, -1
stw r0, 92(r11)
#265: tempd = regp->dmactl_v.dmactl_dword; // Read it back.
lis r12, %hiadj(regp)
lwz r10, %lo(regp)(r12)
lwz r11, 92(r10)
#266: if (tempd != 0x00000203) // L, PF and W bits set.
#267: {
cmplwi r11, 515
beq .L107
#268: errorCnt++;
addi r31, r31, 1
#269: errorHandler (errorCnt, FALSE);
mr r3, r31
li r4, 0
bl errorHandler
#270: }
#272: regp->dmactl_v.dmactl_dword = origDMACTL; // Write original. This kicks off the DMA setup above.
.L107:
lis r12, %hiadj(regp)
lwz r9, %lo(regp)(r12)
stw r30, 92(r9)
#273: tempd = regp->dmactl_v.dmactl_dword; // Read it back.
lis r12, %hiadj(regp)
lwz r8, %lo(regp)(r12)
lwz r11, 92(r8)
#274: if (tempd != origDMACTL)
#275: {
cmplw r11, r30
beq .L109
#276: errorCnt++;
addi r31, r31, 1
#277: errorHandler (errorCnt, FALSE);
mr r3, r31
li r4, 0
bl errorHandler
#278: }
#281: /*
#282: Original test: byte writes to the DMACTL.
#283: #define LBIT ( 0x2 )
#284: #define PBIT ( 0x1 )
#286: origLP = regp->dmactl_v.dmactl_bytes[1]; // Get the original value.
#288: // Write all ones to the LP byte. The L bit should set. The P bit should not change state.
#289: regp->dmactl_v.dmactl_bytes[1] = 0xFF;
#290: tempc = regp->dmactl_v.dmactl_bytes[1]; // Read it back.
#292: if ( !(((tempc & LBIT) == LBIT) && ((tempc & PBIT) == (origLP & PBIT))) )
#293: {
#294: errorCnt++;
#295: errorHandler (errorCnt, FALSE);
#296: // printf (" dmactl LP bits - P bit should be set. Read %02x. Should be 01. Errs=%d\n",
#297: // tempc, errorCnt);
#298: }
#300: // Write all zeros to the LP byte. The L bit should reset. The P bit should not change state.
#301: regp->dmactl_v.dmactl_bytes[1] = 0;
#302: tempc = regp->dmactl_v.dmactl_bytes[1]; // Read it back.
#304: if ( !(((tempc & LBIT) == 0) && ((tempc & PBIT) == (origLP & PBIT))) )
#305: {
#306: errorCnt++;
#307: errorHandler (errorCnt, FALSE);
#308: // printf (" dmactl LP bits - P bit should be reset. Read %02x. Should be 00. Errs=%d\n",
#309: // tempc, errorCnt);
#310: }
#311: */
#313: } // end testOpRegs
.L109:
# .es
# .ef
addi r11, sp, 40
b _restgpr_25_l
__ghs_eofn_testOpRegs::
.type testOpRegs,@function
.size testOpRegs,$-testOpRegs
.align 2
#function: testOpRegs
#stack frame size: 40
#link area offset: 0
#local storage area offset: 12
#gpr save area offset: 12
#
#errorCnt r31 local
#i r30 local
#regs r26 local
#tempc r11 local
#origLP r11 local
#origDMACTL r30 local
#tempd r11 local
#temp r11 local
#orig r28 local
#theReg r29 local
#theOMask r6 local
#theZMask r25 local
#theText r11 local
#theOffset r27 local
.data
.text
#317: //
#318: // testDMA
#319: //
#320: //
#321: void testDMA (void)
#322: {
.align 2
.align 2
.long 16476 # alloca=1;fmax=0;gmax=5;sp=lr=1;cr=fpscr=0
.globl testDMA
testDMA:
mflr r0
mr r11, sp
stwu sp, -32(sp)
bl _savegpr_27_l
# .bf
#323: DWORD errorCnt = 0;
li r30, 0
#324: DWORD i;
#326: DWORD SMtstBlkSz = SHAREDMEMregionsize;
li r28, 16384
#327: DWORD SMoffset = CS1_BASE + SHAREDMEMregionoffset;
lis r27, 16
ori r27, r27, 16384
#329: struct op_regs_struct_42_t * regp = (struct op_regs_struct_42_t *) (CS1_BASE + OP_REGS_BASE_42);
lis r29, 16
ori r29, r29, 1120
#330: unsigned char tempc, origLP;
#331: DWORD origDMACTL, tempd;
#333: // First, test data moving from the 3042 to host memory.
#335: const DWORD patternStart = 0;
#336: const DWORD patternLen = 0x4000; // In bytes.
#338: #define physAddrMsk ( 0xFFFFf000 ) // Mask in bits 12 to 31.
#340: const DWORD directionToHost = 1;
#341: const DWORD directionTo3042 = 0;
#343: tempd = regp->dmactl_v.dmactl_dword; // Read the original DMACTL (debug).
# .bs
lwz r11, 92(r29)
#345: tempd = regp->lint;
lwz r11, 148(r29)
#346: regp->lint = DMAcompleteBit; // Clear the DMAcompleteBit. Is a Write One Clear bit !!!
li r0, 32
stw r0, 148(r29)
#347: tempd = regp->lint;
lwz r11, 148(r29)
#348:
#349: // Write an address pattern to shared mem.
#350: // Check the non-complement.
#351: for (i = 0; i < SMtstBlkSz/4; i++) // Write address pattern
li r31, 0
#352: {
b .L162
.L161:
#353: ((long *) SMoffset)[i] = ( i | (i << 12) | (i << 24) );
mr r11, r31
slwi r11, r11, 2
add r10, r27, r11
slwi r9, r31, 12
or r8, r31, r9
slwi r7, r31, 24
or r11, r8, r7
stw r11, 0(r10)
#354: }
#356: for (i = 0; i < SMtstBlkSz/4; i++) // Read and check address pattern
addi r31, r31, 1
.L162:
srwi r10, r28, 2
cmplw r31, r10
blt .L161
li r31, 0
#357: {
b .L166
.L165:
#358: DWORD dRead, dWrote;
#360: dWrote = i | (i << 12) | (i << 24);
# .bs
slwi r9, r31, 12
or r8, r31, r9
slwi r7, r31, 24
or r9, r8, r7
#361: if ( (dRead = ((long *) SMoffset)[i]) != dWrote)
#362: {
mr r11, r31
slwi r11, r11, 2
add r10, r27, r11
lwz r11, 0(r10)
cmplw r11, r9
beq .L167
#363: errorCnt++;
addi r30, r30, 1
#364: errorHandler (errorCnt, FALSE);
mr r3, r30
li r4, 0
bl errorHandler
#365: // printf ("R%08xW%08x ", dRead, dWrote);
#366: // if (errorCnt % 4 == 0)
#367: // printf ("\n");
#368: }
#369: }
.L167:
# .es
#371: // Shared Mem address into DMALBASE register.
#372: // (points to the start of the address pattern in 3042's shared mem).
#373: regp->dmalbase = patternStart; // Give it a byte address, but because dmalbase bits 0 and 1 are dead,
addi r31, r31, 1
.L166:
srwi r9, r28, 2
cmplw r31, r9
blt .L165
li r0, 0
stw r0, 80(r29)
#374: // loads a DWORD address.
#376: // Init DMASIZE.
#377: regp->dmasize = patternLen - 0x4; // Give it a byte size, Also, the value written to DMASIZE register
li r0, 16380
stw r0, 88(r29)
#378: // must be reduced by one DWORD.
#380: // Init DMAHBASE register.
#381: regp->dmahbase = 0xFFBD8000 + 0x4000; // Point the DMA at the Shared Mem of the 3042 card *not* on the extender.
lis r0, -67
ori r0, r0, 49152
stw r0, 84(r29)
#383: // Check to make sure that the DMA complete bit is not already set
#384: // (not normally required, but part of a resonable test).
#385: if (regp->lint & DMAcompleteBit)
#386: { errorCnt++;
lwz r7, 148(r29)
andi. r8, r7, 32
cmplwi r8, 0
beq .L169
addi r30, r30, 1
#387: errorHandler (errorCnt, FALSE);
mr r3, r30
li r4, 0
bl errorHandler
#388: // printf ("Error: DMAcompleteBit should not be set. Errs=%d\n", errorCnt);
#389: }
#391: // Write low-order byte of DMACTL to KICK OFF the DMA.
#392: regp->dmactl_v.dmactl_dword = 0x200 | directionToHost; // Claim Local ownership and kick off the DMA. // Temp ???
.L169:
li r0, 513
stw r0, 92(r29)
#393: /* regp->dmactl_v.dmactl_bytes[0] = directionToHost; // 3042 DMA grabs the PCI bus and moves the data from
#394: // 3042 Shared Mem to host mem
#395: */
#397: /*
#398: // In theory, a delay here should should improve performance by having us do our first poll
#399: // of the DMAcompleteBit just after the DMA completes. However, because of host bridge oddities,
#400: // this delay doesn't help.
#401: for (i = 0 ; i < patternLen ; i++) // Delay a bit before we start polling the DMA complete bit.
#402: // (*not* required, but improves performance slightly).
#403: ;
#404: */
#405:
#406: waitDMAComplete();
bl waitDMAComplete
#408: for (i = 0; i < SMtstBlkSz/4; i++) // Write a pattern which is *not* our address pattern
li r31, 0
#409: ((long *) SMoffset)[i] = 0xBAD42BAD;
b .L174
.L173:
mr r11, r31
slwi r11, r11, 2
add r10, r27, r11
lis r0, -17708
ori r0, r0, 11181
stw r0, 0(r10)
#412: regp->dmalbase = patternStart; // Give it a byte address, but because dmalbase bits 0 and 1 are dead,
addi r31, r31, 1
.L174:
srwi r9, r28, 2
cmplw r31, r9
blt .L173
li r0, 0
stw r0, 80(r29)
#413: // loads a DWORD address.
#415: // Init DMASIZE.
#416: regp->dmasize = patternLen - 4; // Give it a DWORD size, Also, the value written to DMASIZE register
li r0, 16380
stw r0, 88(r29)
#417: // must be reduced by one DWORD.
#419: // Init DMAHBASE register.
#420: regp->dmahbase = 0xFFBD8000 + 0x4000; // Point the DMA at the Shared Mem of the 3042 card *not* on the extender.
lis r0, -67
ori r0, r0, 49152
stw r0, 84(r29)
#422: // Check to make sure that the DMA complete bit is not already set
#423: // (not normally required, but part of a resonable test).
#424: if (regp->lint & DMAcompleteBit)
#425: { errorCnt++;
lwz r7, 148(r29)
andi. r8, r7, 32
cmplwi r8, 0
beq .L175
addi r30, r30, 1
#426: errorHandler (errorCnt, FALSE);
mr r3, r30
li r4, 0
bl errorHandler
#427: // printf ("Error: DMAcompleteBit should not be set. Errs=%d\n", errorCnt);
#428: }
#430: // Write low-order byte of DMACTL to KICK OFF the DMA.
#431: regp->dmactl_v.dmactl_dword = 0x200 | directionTo3042; // Claim Local ownership and kick off the DMA. // Temp ???
.L175:
li r0, 512
stw r0, 92(r29)
#433: waitDMAComplete();
bl waitDMAComplete
#435: for (i = 0; i < SMtstBlkSz/4; i++) // Read and check address pattern
li r31, 0
#436: {
b .L180
.L179:
#437: DWORD dRead, dWrote;
#438:
#439: dWrote = i | (i << 12) | (i << 24);
# .bs
slwi r11, r31, 12
or r10, r31, r11
slwi r9, r31, 24
or r10, r10, r9
#440: if ( (dRead = ((long *) SMoffset)[i]) != dWrote)
#441: {
mr r8, r31
slwi r8, r8, 2
add r7, r27, r8
lwz r11, 0(r7)
cmplw r11, r10
beq .L181
#442: errorCnt++;
addi r30, r30, 1
#443: errorHandler (errorCnt, FALSE);
mr r3, r30
li r4, 0
bl errorHandler
#444: // printf ("R%08xW%08x ", dRead, dWrote);
#445: // if (errorCnt % 4 == 0)
#446: // printf ("\n");
#447: }
#448: }
.L181:
# .es
#450: } // end testDMA
addi r31, r31, 1
.L180:
srwi r11, r28, 2
cmplw r31, r11
blt .L179
# .es
# .ef
addi r11, sp, 32
b _restgpr_27_l
__ghs_eofn_testDMA::
.type testDMA,@function
.size testDMA,$-testDMA
.align 2
#function: testDMA
#stack frame size: 32
#link area offset: 0
#local storage area offset: 12
#gpr save area offset: 12
#
#errorCnt r30 local
#i r31 local
#SMtstBlkSz r28 local
#SMoffset r27 local
#regp r29 local
#tempc r11 local
#origLP r11 local
#origDMACTL r11 local
#tempd r11 local
#patternStart r11 local
#patternLen r11 local
#directionToHost r11 local
#directionTo3042 r11 local
#dRead r11 local
#dWrote r9 local
#dRead r11 local
#dWrote r10 local
.data
.text
#454: //
#455: // testSharedMem
#456: //
#457: DWORD testSharedMem (void)
#458: {
.align 2
.align 2
.long 16460 # alloca=1;fmax=0;gmax=4;sp=lr=1;cr=fpscr=0
.globl testSharedMem
testSharedMem:
mflr r0
mr r11, sp
stwu sp, -24(sp)
bl _savegpr_28_l
# .bf
#459: DWORD SMtstBlkSz;
#460: DWORD SMoffset;
#461: DWORD errorCnt = 0;
li r30, 0
#462: DWORD i, dRead, dWrote;
#464: // printf ("Testing Shared Memory (SM)...\n");
#465: // _flushall();
#467: SMtstBlkSz = SHAREDMEMregionsize; // in bytes.
# .bs
li r29, 16384
#468: SMoffset = CS1_BASE + SHAREDMEMregionoffset ; // Offset from start of 860 access space
lis r28, 16
ori r28, r28, 16384
#470: // E??? Speed up to see what the best performance is via target access to 304x.
#472: // printf ("Running Address test.\n");
#474: // Write and test complement first.
#475: // if (errorCnt > 0)
#476: // printf ("\n");
#477: // printf ("Running Address Complement test.\n");
#479: for (i = 0; i < SMtstBlkSz/4; i++) // Write address pattern
li r31, 0
#480: ((long *) SMoffset)[i] = ~(i | (i << 12) | (i << 24));
b .L238
.L237:
mr r11, r31
slwi r11, r11, 2
add r10, r28, r11
slwi r9, r31, 12
or r8, r31, r9
slwi r7, r31, 24
or r11, r8, r7
nor r9, r11, r11
stw r9, 0(r10)
#482: for (i = 0; i < SMtstBlkSz/4; i++) // Read and check address pattern
addi r31, r31, 1
.L238:
srwi r8, r29, 2
cmplw r31, r8
blt .L237
li r31, 0
#483: {
b .L242
.L241:
#484: dWrote = ~(i | (i << 12) | (i << 24) );
slwi r7, r31, 12
or r11, r31, r7
slwi r10, r31, 24
or r9, r11, r10
nor r6, r9, r9
#485: if ( (dRead = ((long *) SMoffset)[i]) != dWrote)
#486: {
mr r8, r31
slwi r8, r8, 2
add r7, r28, r8
lwz r11, 0(r7)
cmplw r11, r6
beq .L240
#487: errorCnt++;
addi r30, r30, 1
#488: errorHandler (errorCnt, FALSE);
mr r3, r30
li r4, 0
bl errorHandler
#489: // printf ("R%08xW%08x ", dRead, dWrote);
#490: // if (errorCnt % 4 == 0)
#491: // printf ("\n");
#492: }
#493: }
.L240:
⌨️ 快捷键说明
复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?