📄 testutil.h
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//////////////////////////////////////////////////////////////////////
// File: TestUtil.h: Header File.
// $Header: /ComemL/Host/Test3042/TestUtil.h 43 11/25/98 11:54a Tpm $
// Copyright (c) 1998-2000 Anchor Chips, Inc. May not be reproduced without permission.
//////////////////////////////////////////////////////////////////////
void report_error(const char *fmt, ...);
void reportErrorCode(DWORD status, char * whereAmI);
// ********************************************************
// 3042 Defines and Structures
// I2O Registers
// All I2O stuff is still not done!!! ???
#define I2O_HOST_INTERRUPT_STATUS_REG 0x30
#define I2O_HOST_INTERRUPT_MASK_REG 0x34
#define I2O_IOP_INTERRUPT_STATUS_REG 0x38
#define I2O_IOP_INTERRUPT_MASK_REG 0x3C
#define I2O_INBOUND_POST_FIFO_REG 0x40 // W
#define I2O_INBOUND_FREE_FIFO_REG 0x40 // R
#define I2O_OUTBOUND_POST_FIFO_REG 0x44 // W
#define I2O_OUTBOUND_FREE_FIFO_REG 0x44 // W
#define I2O_INBOUND_POST_FIFO_DEBUG_REG 0x48 // R
#define I2O_INBOUND_FREE_FIFO_DEBUG_REG 0x48 // W
#define I2O_OUTBOUND_POST_FIFO_DEBUG_REG 0x4C // R
#define I2O_OUTBOUND_FREE_FIFO_DEBUG_REG 0x4C // R
typedef struct _i2o_regs_struct
{
unsigned long unused_00; // 0x00
unsigned long unused_04;
unsigned long unused_08;
unsigned long unused_0c;
unsigned long unused_10; // 0x10
unsigned long unused_14;
unsigned long unused_18;
unsigned long unused_1c;
unsigned long unused_20; // 0x20
unsigned long unused_24;
unsigned long unused_28;
unsigned long unused_2c;
unsigned long i2ohisr; // 0x30
unsigned long i2ohimr;
unsigned long i2iopisr;
unsigned long i2oiopimr;
unsigned long i2oibp; // 0x40
unsigned long i2oibf;
unsigned long i2oobp;
unsigned long i2oobf;
} i2o_regs_struct;
// Operation registers offsets.
#define DIRECT_ACCESS_BASE_REG 0x460
#define I2C_COMMAND_REG 0x4A0
// #define I2C_READ_COMMAND_REG 0x4A0
// #define I2C_WRITE_COMMAND_REG 0x4A0
#define I2C_READ_DATA_REG 0x4A4
#define I2C_STATUS_REG 0x4A8
#define DMA_LOCAL_BASE_ADDRESS_REG 0x4B0
#define DMA_HOST_BASE_ADDRESS_REG 0x4B4
#define DMA_SIZE_REG 0x4B8
#define DMA_CONTROL_REG 0x4BC
#define HOST_CONTROL_REG 0x4E0
#define HOST_INTERRUPT_CONTROL_STATUS_REG 0x4E4
#define HOST_TO_LOCAL_DATA_MAILBOX_REG 0x4E8
#define LOCAL_INTERRUPT_CONTROL_STATUS_REG 0x4F4
#define LOCAL_TO_HOST_DATA_MAILBOX_REG 0x4F8
#define LOCAL_BUS_CONFIG_REG 0x4FC
//const int OP_REGS_BASE_42 = 0x460; // Ops Reg Base for the 3042
const int OP_REGS_BASE_42 = 0x400; // Ops Reg Base for the 3042
typedef struct op_regs_struct_42_t
{
unsigned long dahbase; // 0x460
unsigned long unused_464;
unsigned long unused_468;
unsigned long unused_46c;
unsigned long unused_470; // 0x470
unsigned long unused_474;
unsigned long unused_478;
unsigned long unused_47c;
unsigned long unused_480; // 0x480
unsigned long unused_484;
unsigned long unused_488;
unsigned long unused_48c;
unsigned long unused_490; // 0x490
unsigned long unused_494;
unsigned long unused_498;
unsigned long unused_49c;
unsigned long nvcmd; // 0x4A0
unsigned long nvread;
unsigned long nvstat;
unsigned long unused_4Ac;
unsigned long dmalbase; // 0x4B0
unsigned long dmahbase;
unsigned long dmasize;
// unsigned long dmactl_dword;
union dmactl_t {
unsigned long dmactl_dword;
unsigned char dmactl_bytes[4];
} dmactl_v;
unsigned long unused_4C0; // 0x4C0
unsigned long unused_4C4;
unsigned long unused_4C8;
unsigned long unused_4Cc;
unsigned long unused_4D0; // 0x4D0
unsigned long unused_4D4;
unsigned long unused_4D8;
unsigned long unused_4Dc;
unsigned long hctl; // 0x4E0
unsigned long hint;
unsigned long hldata;
unsigned long unused_4Ec;
unsigned long unused_4F0; // 0x4F0
unsigned long lint;
unsigned long lhdata;
unsigned long lbuscfg;
} op_regs_struct_42_v;
const DWORD dahbaseBASEaddrMSK = 0xFFFFe000 ;
//const DWORD dahbasePCIMSK = 0x00000006 ;
const DWORD dahbasePCIMSK = 0x000000F6 ;
const DWORD dahbaseMSK = dahbaseBASEaddrMSK + dahbasePCIMSK ;
struct reg_descrip_struct {
DWORD offset; // Offset beyond the base (can be BAR, or other base register).
DWORD mask; // What you read back when you write all ones to the register.
char * text; // String (for textual description)
};
//const int NUMopr3042 = 10; // Number of records in the following table...
struct reg_descrip_struct opRegs3042[NUMopr3042] =
{
// offset mask text
{ 0x460, dahbaseMSK, "dahbase " },
// Cannot do read/write test to 3 nv regs.
{ 0x4B0, 0x00003ffc, "dmalbase" },
{ 0x4B4, 0xFFFFfffc, "dmahbase" },
{ 0x4B8, 0x00003ffc, "dmasize " },
// Cannot do read/write test to dmactl reg.
{ 0x4E0, 0x00000003, "hctl " },
{ 0x4E4, 0x03FF0000, "hint " },
{ 0x4E8, 0x0000ffff, "hldata " },
{ 0x4F4, 0x03FF0000, "lint " },
{ 0x4F8, 0x0000ffff, "lhdata " },
{ 0x4FC, 0x0000ff00, "lbuscfg " },
};
// End 3042 Defines and Structures
// ********************************************************
const int CHIP3041 = 0x3041;
const int CHIP3042 = 0x3042;
// prototypes
int chipType (void);
DWORD callGetPCIInfo (PCI_CONFIG_HEADER_0 *pciCfg, DWORD comemID);
DWORD testConfigRegs (DWORD comemID);
DWORD callReadEeprom (DWORD addr, unsigned char *blockptr, DWORD size, DWORD comemID);
DWORD callWriteEeprom (DWORD addr, unsigned char *blockptr, DWORD size, DWORD comemID);
void zeroEEPROM (DWORD comemID);
void initEEPROM (DWORD comemID);
DWORD testEEPROM (DWORD comemID);
DWORD testMemOneZero(DWORD SMtstBlkBase, DWORD SMoffset, DWORD SMtstBlkSz);
DWORD testMemAddr(DWORD SMtstBlkBase, DWORD SMoffset, DWORD SMtstBlkSz);
DWORD testMemAddrComp(DWORD SMtstBlkBase, DWORD SMoffset, DWORD SMtstBlkSz);
DWORD testMemByteEnable(DWORD SMtstBlkBase, DWORD SMoffset, DWORD SMtstBlkSz);
DWORD testSharedMem (DWORD comemID);
DWORD initSharedMem (DWORD patternStart, DWORD patternLen, DWORD patternType, DWORD comemID);
DWORD testOpRegs (DWORD comemID);
DWORD closeDriver(DWORD comemID);
DWORD verifyComemConfig(DWORD comemID);
int InitDriver(DWORD comemID);
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