📄 adsp-bf561.ldf

📁 所用板ADSP-BF561 EZ-KIT Lite
💻 LDF
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上一页 1 23
            INPUT_SECTIONS( $OBJECTS(.gdt) $LIBRARIES(.gdt) )
            INPUT_SECTIONS( $OBJECTS(.gdtl) $LIBRARIES(.gdtl) )
            INPUT_SECTIONS( $OBJECTS(vtbl) $LIBRARIES(vtbl) )
            INPUT_SECTIONS( $OBJECTS(.frt) $LIBRARIES(.frt) )
            INPUT_SECTIONS( $OBJECTS(.frtl) $LIBRARIES(.frtl) )
#endif	/* } */
            INPUT_SECTIONS( $OBJECTS(data1) $LIBRARIES(data1))
            INPUT_SECTIONS( $OBJECTS(cplb_data) $LIBRARIES(cplb_data))
            INPUT_SECTIONS( $OBJECTS(voldata) $LIBRARIES(voldata))
            INPUT_SECTIONS( $OBJECTS(constdata) $LIBRARIES(constdata))
#if defined(__cplusplus) || defined(USER_CRT)   /* { */
            INPUT_SECTIONS( $OBJECTS(.edt) $LIBRARIES(.edt) )
            INPUT_SECTIONS( $OBJECTS(.cht) $LIBRARIES(.cht) )
#endif
        } >MEM_A_L1_DATA_B

        bsz_L1_data_b ZERO_INIT {
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS(bsz) $LIBRARIES(bsz))
        } >MEM_A_L1_DATA_B

        l2_sram_a {
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS(L2_sram_a) $LIBRARIES(L2_sram_a))
            INPUT_SECTIONS( $OBJECTS(noncache_code) $LIBRARIES(noncache_code))
            INPUT_SECTIONS( $OBJECTS(bsz_init) $LIBRARIES(bsz_init))
#if defined(__ADI_MULTICORE) /* { */
             INPUT_SECTIONS( $OBJECTS(mc_data) $LIBRARIES(mc_data))
#endif /* __ADI_MULTICORE } */
            INPUT_SECTIONS( $OBJECTS(program) $LIBRARIES(program))
            INPUT_SECTIONS( $OBJECTS(cplb) $LIBRARIES(cplb))
            INPUT_SECTIONS( $OBJECTS(cplb_code) $LIBRARIES(cplb_code))
            INPUT_SECTIONS($OBJECTS(data1) $LIBRARIES(data1))
            INPUT_SECTIONS($OBJECTS(voldata) $LIBRARIES(voldata))
            INPUT_SECTIONS( $OBJECTS(cplb_data) $LIBRARIES(cplb_data))
#if defined(__cplusplus) || defined(USER_CRT)   /* { */
            INPUT_SECTIONS( $OBJECTS(.edt) $LIBRARIES(.edt) )
            INPUT_SECTIONS( $OBJECTS(.cht) $LIBRARIES(.cht) )
#endif /* } */
            INPUT_SECTIONS($OBJECTS(constdata) $LIBRARIES(constdata))
        } >MEM_L2_SRAM_A
        .meminit { ALIGN(4) } >MEM_L2_SRAM_A

        bsz_L2_sram_a ZERO_INIT {
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS(bsz) $LIBRARIES(bsz))
        } >MEM_L2_SRAM_A

        stack {
            ldf_stack_space = .;
            ldf_stack_end = ldf_stack_space + MEMORY_SIZEOF(MEM_A_L1_STACK);
        } >MEM_A_L1_STACK

#ifndef USE_CACHE
        heap {
            // Allocate a heap for the application
            ldf_heap_space = .;
            ldf_heap_end = ldf_heap_space + MEMORY_SIZEOF(MEM_L2_HEAP_A) - 1;
            ldf_heap_length = ldf_heap_end - ldf_heap_space;        
        } >MEM_L2_HEAP_A
#else
        heap {
            // Allocate a heap for the application
            ldf_heap_space = .;
            ldf_heap_end = ldf_heap_space + MEMORY_SIZEOF(MEM_SDRAM0_BANK0) - 1;
            ldf_heap_length = ldf_heap_end - ldf_heap_space;        
        } >MEM_SDRAM0_BANK0
#endif

        l2_shared {
            // Contains data shared between cores - Requires use of resolve.
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS(l2_shared) $LIBRARIES(l2_shared))

            // Holds control variable used to ensure atomic file I/O
            // Must be in shared memory and NOT cached.
            INPUT_SECTIONS( $LIBRARIES(primio_atomic_lock))
        } >MEM_L2_SRAM

        sdram0_bank1 {
          // Data
          INPUT_SECTION_ALIGN(4)
          INPUT_SECTIONS($OBJECTS(sdram_data) $LIBRARIES(sdram_data))
          INPUT_SECTIONS($OBJECTS(data1) $LIBRARIES(data1))
          INPUT_SECTIONS($OBJECTS(voldata) $LIBRARIES(voldata))
        } >MEM_SDRAM0_BANK1

        sdram0_bank2 {
          // Data
          INPUT_SECTION_ALIGN(4)
          INPUT_SECTIONS($OBJECTS(sdram0) $LIBRARIES(sdram0))
          INPUT_SECTIONS($OBJECTS(constdata) $LIBRARIES(constdata))
        } > MEM_SDRAM0_BANK2

        sdram0_bank2_bsz ZERO_INIT {
          // Bsz
          INPUT_SECTION_ALIGN(4)
          INPUT_SECTIONS($OBJECTS(bsz) $LIBRARIES(bsz))
        } > MEM_SDRAM0_BANK2

        sdram0_bank3 {
          // Program Section
          INPUT_SECTION_ALIGN(4)
          INPUT_SECTIONS( $OBJECTS(program) $LIBRARIES(program))
          INPUT_SECTIONS( $OBJECTS(noncache_code) $LIBRARIES(noncache_code))
        } >MEM_SDRAM0_BANK3

        sdram_shared {
          // Shared section of SDRAM for both cores.
          INPUT_SECTION_ALIGN(4)
          INPUT_SECTIONS( $OBJECTS(sdram_shared))
        } >MEM_SDRAM1_SHARED
    }
}
#endif

/* Core B */
#ifdef COREB
PROCESSOR p1
{
    OUTPUT( $COMMAND_LINE_OUTPUT_FILE )

    /* Following address must match start of MEM_B_L1_PROGRAM */
    RESOLVE(start,0xFF600000)
#ifdef IDDE_ARGS
    RESOLVE(___argv_string,ARGV_START)
#endif
    KEEP(start,_main)

    SECTIONS 
    {
#if defined(__WORKAROUND_AVOID_LDF_BLOCK_BOUNDARIES) /* { */
    /* Workaround for hardware errata 05-00-0189 -
    ** "Speculative (and fetches made at boundary of reserved memory
    ** space) for instruction or data fetches may cause false
    ** protection exceptions".
    **
    ** Done by avoiding use of 76 bytes from at the end of blocks
    ** that are adjacent to reserved memory. Workaround is enabled
    ** for appropriate silicon revisions (-si-revision switch).
    */
    RESERVE(___wabb0=0xFF700FFF - 75,___lb0=76)   /* scratchpad */
#  if !INSTR_CACHE
    RESERVE(___wabb1=0xFF613FFF - 75,___lb1=76)   /* l1 instr sram/cache */
#  endif
    RESERVE(___wabb2=0xFF603FFF - 75,___lb2=76)   /* l1 instr sram */
#  if DATAB_CACHE
    RESERVE(___wabb3=0xFF503FFF - 75,___lb3=76)   /* data B sram */
#  else
    RESERVE(___wabb4=0xFF507FFF - 75,___lb4=76)   /* data B sram/cache */
#  endif
#  if DATAA_CACHE
    RESERVE(___wabb5=0xFF403FFF - 75,___lb5=76)   /* data A sram */
#  else
    RESERVE(___wabb6=0xFF407FFF - 75,___lb6=76)   /* data A sram/cache */
#  endif
    RESERVE(___wabb7=0xFEB1FFFF - 75,___lb7=76)   /* L2 sram */
    RESERVE(___wabb8=0x2FFFFFFF - 75,___lb8=76)   /* async bank 3 */
#  if defined(PARTITION_EZKIT_SDRAM)
    RESERVE(___waba9=0x3FFFFFF - 75,___la9=76)    /* EZ-Kit sdram */
#  elif defined(USE_CACHE) || defined(USE_SDRAM)
    RESERVE(___wabb10=0x7FFFFFF - 75,___lb10=76)  /* sdram */
#  endif
#endif /*} __WORKAROUND_AVOID_LDF_BLOCK_BOUNDARIES */

        l1_code_cache {
            INPUT_SECTION_ALIGN(4)
            __CORE = 1;
            INPUT_SECTIONS( $OBJECTS(L1_code) $LIBRARIES(L1_code))
            INPUT_SECTIONS( $OBJECTS(cplb) $LIBRARIES(cplb))
            INPUT_SECTIONS( $OBJECTS(cplb_code) $LIBRARIES(cplb_code))
            INPUT_SECTIONS( $OBJECTS(noncache_code) $LIBRARIES(noncache_code))
            INPUT_SECTIONS( $OBJECTS(program) $LIBRARIES(program))
        } >MEM_B_L1_CODE

        l1_code {
#if INSTR_CACHE /* { */
            ___l1_code_cache = 1;
#else
            ___l1_code_cache = 0;
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS(L1_code) $LIBRARIES(L1_code))
            INPUT_SECTIONS( $OBJECTS(cplb) $LIBRARIES(cplb))
            INPUT_SECTIONS( $OBJECTS(cplb_code) $LIBRARIES(cplb_code))
            INPUT_SECTIONS( $OBJECTS(program) $LIBRARIES(program))
#endif /* INSTR_CACHE } */
        } >MEM_B_L1_CODE_CACHE

#if DATAA_CACHE /* { */
        l1_data_a_cache {
            INPUT_SECTION_ALIGN(4)
            ___l1_data_cache_a = 1;
        } >MEM_B_L1_DATA_A_CACHE
#endif /* DATAA_CACHE } */

        l1_data_a {
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS(L1_data_a) $LIBRARIES(L1_data_a))
#if !DATAA_CACHE /* { */
            ___l1_data_cache_a = 0;
#endif /* DATAA_CACHE } */
            INPUT_SECTIONS( $OBJECTS(cplb_data) $LIBRARIES(cplb_data))
            INPUT_SECTIONS($OBJECTS(voldata) $LIBRARIES(voldata))
            INPUT_SECTIONS($OBJECTS(constdata) $LIBRARIES(constdata))
            INPUT_SECTIONS($OBJECTS(data1) $LIBRARIES(data1))
#if defined(__cplusplus) || defined(USER_CRT)   /* { */
            INPUT_SECTIONS( $OBJECTS(.edt) $LIBRARIES(.edt) )
            INPUT_SECTIONS( $OBJECTS(.cht) $LIBRARIES(.cht) )
#endif
        } >MEM_B_L1_DATA_A

        bsz_L1_data_a ZERO_INIT {
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS(bsz) $LIBRARIES(bsz))
        } >MEM_B_L1_DATA_A

#if DATAB_CACHE /* { */
        l1_data_b_cache {
            INPUT_SECTION_ALIGN(4)
            ___l1_data_cache_b = 1;
        } >MEM_B_L1_DATA_B_CACHE
#endif /* DATAB_CACHE } */

        l1_data_b {
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS(L1_data_b) $LIBRARIES(L1_data_b))
#if !DATAB_CACHE /* { */
            ___l1_data_cache_b = 0;
#endif /* DATAB_CACHE } */
#if defined(__cplusplus) || defined(USER_CRT)   /* { */
            INPUT_SECTIONS( $OBJECTS(ctor) $LIBRARIES(ctor) )
            INPUT_SECTIONS( $OBJECTS(ctorl) $LIBRARIES(ctorl) )
            INPUT_SECTIONS( $OBJECTS(.gdt) $LIBRARIES(.gdt) )
            INPUT_SECTIONS( $OBJECTS(.gdtl) $LIBRARIES(.gdtl) )
            INPUT_SECTIONS( $OBJECTS(vtbl) $LIBRARIES(vtbl) )
            INPUT_SECTIONS( $OBJECTS(.frt) $LIBRARIES(.frt) )
            INPUT_SECTIONS( $OBJECTS(.frtl) $LIBRARIES(.frtl) )
#endif	/* } */
            INPUT_SECTIONS( $OBJECTS(data1) $LIBRARIES(data1))
            INPUT_SECTIONS( $OBJECTS(cplb_data) $LIBRARIES(cplb_data))
            INPUT_SECTIONS( $OBJECTS(voldata) $LIBRARIES(voldata))
            INPUT_SECTIONS( $OBJECTS(constdata) $LIBRARIES(constdata))
#if defined(__cplusplus) || defined(USER_CRT)   /* { */
            INPUT_SECTIONS( $OBJECTS(.edt) $LIBRARIES(.edt) )
            INPUT_SECTIONS( $OBJECTS(.cht) $LIBRARIES(.cht) )
#endif
        } >MEM_B_L1_DATA_B

        l2_sram_b {
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS(l2_sram_b) $LIBRARIES(l2_sram_b))
            INPUT_SECTIONS( $OBJECTS(bsz_init) $LIBRARIES(bsz_init))
            INPUT_SECTIONS( $OBJECTS(program) $LIBRARIES(program))
        } >MEM_L2_SRAM_B
        .meminit { ALIGN(4) } >MEM_L2_SRAM_B

#ifdef __ADI_MULTICORE
        mc_data {
             INPUT_SECTION_ALIGN(4)
             INPUT_SECTIONS( $OBJECTS(mc_data) $LIBRARIES(mc_data))
        } >MEM_L2_SRAM_B
#endif

        bsz_L2_sram_b ZERO_INIT {
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS(bsz) $LIBRARIES(bsz))
        } >MEM_L2_SRAM_B

        bsz_L1_data_b ZERO_INIT {
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS(bsz) $LIBRARIES(bsz))
        } >MEM_B_L1_DATA_B

        l2_shared {
            // Contains data shared between cores
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS(l2_shared) $LIBRARIES(l2_shared))

            // Holds control variable used to ensure atomic file I/O
            // Must be in shared memory and NOT cached.
            INPUT_SECTIONS( $LIBRARIES(primio_atomic_lock))
        } >MEM_L2_SRAM

        stack {
            ldf_stack_space = .;
            ldf_stack_end = ldf_stack_space + MEMORY_SIZEOF(MEM_B_L1_STACK);
        } >MEM_B_L1_STACK

#ifndef USE_CACHE
        heap {
            // Allocate a heap for the application
            ldf_heap_space = .;
            ldf_heap_end = ldf_heap_space + MEMORY_SIZEOF(MEM_L2_HEAP_B) - 1;
            ldf_heap_length = ldf_heap_end - ldf_heap_space;        
        } >MEM_L2_HEAP_B
#else
        heap {
            // Allocate a heap for the application
            ldf_heap_space = .;
            ldf_heap_end = ldf_heap_space + MEMORY_SIZEOF(MEM_SDRAM1_BANK0) - 1;
            ldf_heap_length = ldf_heap_end - ldf_heap_space;        
        } >MEM_SDRAM1_BANK0
#endif

        sdram1_bank1 {                // Data
          INPUT_SECTION_ALIGN(4)
          INPUT_SECTIONS($OBJECTS(sdram_data) $LIBRARIES(sdram_data))
          INPUT_SECTIONS($OBJECTS(data1) $LIBRARIES(data1))
          INPUT_SECTIONS($OBJECTS(voldata) $LIBRARIES(voldata))
        } >MEM_SDRAM1_BANK1

        sdram1_bank2 {                // Data
          INPUT_SECTION_ALIGN(4)
          INPUT_SECTIONS($OBJECTS(sdram_data) $LIBRARIES(sdram_data))
          INPUT_SECTIONS($OBJECTS(constdata) $LIBRARIES(constdata))
        } > MEM_SDRAM1_BANK2

        sdram1_bank2_bsz ZERO_INIT  { // Bsz
          INPUT_SECTION_ALIGN(4)
          INPUT_SECTIONS($OBJECTS(bsz) $LIBRARIES(bsz))
        } > MEM_SDRAM1_BANK2

        sdram1_bank3 {                // Program Section
          INPUT_SECTION_ALIGN(4)
          INPUT_SECTIONS($OBJECTS(program) $LIBRARIES(program))
          INPUT_SECTIONS($OBJECTS(noncache_code) $LIBRARIES(noncache_code))
        } >MEM_SDRAM1_BANK3

        sdram_shared {                // Shared section of SDRAM for both cores.
          INPUT_SECTION_ALIGN(4)
          INPUT_SECTIONS( $OBJECTS(sdram_shared))
        } >MEM_SDRAM1_SHARED
    }
}
#endif
上一页 1 23
💿 文件大小 41 K
👤 上传用户 cz6891297
📂 所属分类 DSP编程
🏷️ 相关标签

#ADSP-BF #EZ-KIT #Lite #561
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