mottsecdrv.c

freescale mottsec 千兆单元驱动源码

    FUNCPTR miiPhyDuplex; Duplex Status Call Back
    This function pointer is initialized by the BSP and call by the driver.
    The driver calls this function to obtain the status of the duplex
    setting in the phy.
\ce
\cs
    FUNCPTR miiPhySpeed; Speed Status Call Back
    This function pointer is initialized by the BSP and call by the driver.
    The driver calls this function to obtain the status of the speed
    setting in the phy. This interface is hardware specific.
\ce
\cs
    FUNCPTR hbFail; Heart Beat Fail Indicator
    This function pointer is initialized by the BSP and call by the driver.
    The driver calls this function to indicate an TSEC heart beat error.
\ce
\cs
    FUNCPTR intDisc; Disconnect Function
    This function pointer is initialized by the BSP and call by the driver.
    The driver calls this function to indicate an TSEC disconnect error.
\ce

\ie

EXTERNAL SUPPORT REQUIREMENTS
This driver requires several external support functions.
Note: Function pointers _func_xxxxxxxx were removed and replaced with
the TSEC_END_FUNCS structure located in the load string. This is a major
difference between the old zxr10_motTsecEnd driver and this one.
\is
\i sysTsecEnetEnable()
\cs
    STATUS sysTsecEnetEnable (UINT32 immrVal, UINT8 tsecNum);
\ce
This routine is expected to handle any target-specific functions needed
to enable the TSEC. These functions typically include setting the Port B and C
on the MPC8260 so that the MII interface may be used. This routine is
expected to return OK on success, or ERROR. The driver calls this routine,
once per device, from the zxr10_motTsecStart () routine.
\i sysTsecEnetDisable()
\cs
    STATUS sysTsecEnetDisable (UINT32 immrVal, UINT8 tsecNum);
\ce
This routine is expected to perform any target specific functions required
to disable the MII interface to the TSEC.  This involves restoring the
default values for all the Port B and C signals. This routine is expected to
return OK on success, or ERROR. The driver calls this routine from the
zxr10_motTsecStop() routine each time a device is disabled.
\i sysTsecEnetAddrGet()
\cs
    STATUS sysTsecEnetAddrGet (int unit,UCHAR *address);
\ce
The driver expects this routine to provide the six-byte Ethernet hardware
address that is used by this device.  This routine must copy the six-byte
address to the space provided by <enetAddr>.  This routine is expected to
return OK on success, or ERROR.  The driver calls this routine, once per
device, from the zxr10_motTsecEndLoad() routine.
\cs
    STATUS sysTsecMiiBitWr (UINT32 immrVal, UINT8 tsecNum, INT32 bitVal);
\ce
This routine is expected to perform any target specific functions required
to write a single bit value to the MII management interface of a MII-compliant
PHY device. The MII management interface is made up of two lines: management
data clock (MDC) and management data input/output (MDIO). The former provides
the timing reference for transfer of information on the MDIO signal.
The latter is used to transfer control and status information between the
PHY and the TSEC. For this transfer to be successful, the information itself
has to be encoded into a frame format, and both the MDIO and MDC signals have
to comply with certain requirements as described in the 802.3u IEEE Standard.
There is not built-in support in the TSEC for the MII management interface.
This means that the clocking on the MDC line and the framing of the information
on the MDIO signal have to be done in software. Hence, this routine is
expected to write the value in <bitVal> to the MDIO line while properly
sourcing the MDC clock to a PHY, for one bit time.
\cs
    STATUS sysTsecMiiBitRd (UINT32 immrVal, UINT8 tsecNum, INT8 * bitVal);
\ce
This routine is expected to perform any target specific functions required
to read a single bit value from the MII management interface of a MII-compliant
PHY device. The MII management interface is made up of two lines: management
data clock (MDC) and management data input/output (MDIO). The former provides
the timing reference for transfer of information on the MDIO signal.
The latter is used to transfer control and status information between the
PHY and the TSEC. For this transfer to be successful, the information itself
has to be encoded into a frame format, and both the MDIO and MDC signals have
to comply with certain requirements as described in the 802.3u IEEE Standard.
There is not built-in support in the TSEC for the MII management interface.
This means that the clocking on the MDC line and the framing of the information
on the MDIO signal have to be done in software. Hence, this routine is
expected to read the value from the MDIO line in <bitVal>, while properly
sourcing the MDC clock to a PHY, for one bit time.
\ie


SYSTEM RESOURCE USAGE
If the driver allocates the memory for the BDs to share with the TSEC,
it does so by calling the cacheDmaMalloc() routine.  For the default case
of 64 transmit buffers and 32 receive buffers, the total size requested
is 776 bytes, and this includes the 8-byte alignment requirement of the
device.  If a non-cacheable memory region is provided by the user, the
size of this region should be this amount, unless the user has specified
a different number of transmit or receive BDs.

This driver can operate only if this memory region is non-cacheable
or if the hardware implements bus snooping.  The driver cannot maintain
cache coherency for the device because the BDs are asynchronously
modified by both the driver and the device, and these fields share
the same cache line.

If the driver allocates the memory for the data buffers to share with the TSEC,
it does so by calling the memalign () routine.  The driver does not need to
use cache-safe memory for data buffers, since the host CPU and the device are
not allowed to modify buffers asynchronously. The related cache lines
are flushed or invalidated as appropriate. For the default case
of 7 transmit clusters and 32 receive clusters, the total size requested
for this memory region is 112751 bytes, and this includes the 32-byte
alignment and the 32-byte pad-out area per buffer of the device.  If a
non-cacheable memory region is provided by the user, the size of this region
should be this amount, unless the user has specified a different number
of transmit or receive BDs.

TUNING HINTS

The only adjustable parameters are the number of TBDs and RBDs that will be
created at run-time.  These parameters are given to the driver when
zxr10_motTsecEndLoad() is called.  There is one RBD associated with each received
frame whereas a single transmit packet normally uses more than one TBD.  For
memory-limited applications, decreasing the number of RBDs may be
desirable.  Decreasing the number of TBDs below a certain point will
provide substantial performance degradation, and is not recommended. An
adequate number of loaning buffers are also pre-allocated to provide more
buffering before packets are dropped, but this is not configurable.

The relative priority of the netTask and of the other tasks in the system
may heavily affect performance of this driver. Usually the best performance
is achieved when the netTask priority equals that of the other
applications using the driver.

SPECIAL CONSIDERATIONS

SEE ALSO: ifLib,
\tb MPC8260 Fast Ethernet Controller (Supplement to the MPC860 User's Manual)
\tb zxr10_motorola MPC860 User's Manual ,

INCLUDE FILES:

\INTERNAL
This driver contains conditional compilation switch ZXR10_MOT_TSEC_DBG.
If defined, adds debug output routines.  Output is further
selectable at run-time via the zxr10_motTsecEndDbg global variable.
*/

#include "vxWorks.h"
#include "wdLib.h"
#include "iv.h"
#include "vme.h"
#include "net/mbuf.h"
#include "net/unixLib.h"
#include "net/protosw.h"
#include "sys/socket.h"
#include "sys/ioctl.h"
#include "errno.h"
#include "memLib.h"
#include "intLib.h"
#include "net/route.h"
#include "iosLib.h"
#include "errnoLib.h"
#include "vxLib.h"

#include "cacheLib.h"
#include "logLib.h"
#include "netLib.h"
#include "stdio.h"
#include "stdlib.h"
#include "sysLib.h"
#include "taskLib.h"

#include "net/systm.h"
#include "net/if_subr.h"

#undef ETHER_MAP_IP_MULTICAST
#include "etherMultiLib.h"
#include "end.h"

#define    END_MACROS
#include "endLib.h"
#include "miiLib.h"

#include "lstLib.h"
#include "semLib.h"
#include "sys/times.h"
#include "stdarg.h"

#include "net/unixLib.h"
#include "net/if_subr.h"

#ifdef WR_IPV6
#include "adv_net.h"
#endif /* WR_IPV6 */

#include "drv/sio/m8260Cp.h"

#include "config.h"
#include "Driver/drvLib/include/drvLib.h"
#include "motTsecDrv.h"
#include "ros_ex.h"
#include "mux_ex.h"

#ifdef INCLUDE_WINDVIEW
#undef INCLUDE_WINDVIEW
#endif

#undef INCLUDE_WINDVIEW

#ifdef  INCLUDE_WINDVIEW
/* WindView Event numbers */
#define WV_INT_ENTRY(b,l)            wvEvent(1000,b,l)
#define WV_INT_EXIT(b,l)             wvEvent(1001,b,l)
#define WV_INT_RXB_ENTRY(b,l)        wvEvent(1300,b,l)
#define WV_INT_RXF_ENTRY(b,l)        wvEvent(1310,b,l)
#define WV_INT_BSY_ENTRY(b,l)        wvEvent(1320,b,l)
#define WV_INT_BSY_EXIT(b,l)         wvEvent(1321,b,l)
#define WV_INT_RX_EXIT(b,l)          wvEvent(1301,b,l)
#define WV_INT_RXC_ENTRY(b,l)        wvEvent(1400,b,l)
#define WV_INT_RXC_EXIT(b,l)         wvEvent(1401,b,l)
#define WV_INT_TXC_ENTRY(b,l)        wvEvent(1500,b,l)
#define WV_INT_TXC_EXIT(b,l)         wvEvent(1501,b,l)
#define WV_INT_TXB_ENTRY(b,l)        wvEvent(1600,b,l)
#define WV_INT_TXB_EXIT(b,l)         wvEvent(1601,b,l)
#define WV_INT_TXF_ENTRY(b,l)        wvEvent(1620,b,l)
#define WV_INT_TXF_EXIT(b,l)         wvEvent(1621,b,l)
#define WV_INT_TXE_ENTRY(b,l)        wvEvent(1610,b,l)
#define WV_INT_TXE_EXIT(b,l)         wvEvent(1611,b,l)
#define WV_INT_GRA_ENTRY(b,l)        wvEvent(1700,b,l)
#define WV_INT_GRA_EXIT(b,l)         wvEvent(1701,b,l)
#define WV_INT_NETJOBADD_ENTRY(b,l)  wvEvent(1800,b,l)
#define WV_INT_NETJOBADD_EXIT(b,l)   wvEvent(1801,b,l)
#define WV_HANDLER_ENTRY(b,l)        wvEvent(2000,b,l)
#define WV_HANDLER_EXIT(b,l)         wvEvent(2001,b,l)
#define WV_MUX_TX_RESTART_ENTRY(b,l) wvEvent(2100,b,l)
#define WV_MUX_TX_RESTART_EXIT(b,l)  wvEvent(2101,b,l)
#define WV_MUX_ERROR_ENTRY(b,l)      wvEvent(2200,b,l)
#define WV_MUX_ERROR_EXIT(b,l)       wvEvent(2201,b,l)
#define WV_SEND_ENTRY(b,l)           wvEvent(5000,b,l)
#define WV_SEND_EXIT(b,l)            wvEvent(5001,b,l)
#define WV_RECV_ENTRY(b,l)           wvEvent(6000,b,l)
#define WV_RECV_EXIT(b,l)            wvEvent(6001,b,l)
#define WV_CACHE_FLUSH_ENTRY(b,l)    wvEvent(8000,b,l)
#define WV_CACHE_FLUSH_EXIT(b,l)     wvEvent(8001,b,l)
#define WV_CACHE_INVAL_ENTRY(b,l)    wvEvent(8100,b,l)
#define WV_CACHE_INVAL_EXIT(b,l)     wvEvent(8101,b,l)
#define WV_INT_BABR_ENTRY(b,l)       wvEvent(1330,b,l)
#define WV_INT_BABR_EXIT(b,l)        wvEvent(1331,b,l)
#define WV_INT_EBERR_ENTRY(b,l)      wvEvent(1340,b,l)
#define WV_INT_EBERR_EXIT(b,l)       wvEvent(1341,b,l)
#define WV_INT_MSRO_ENTRY(b,l)       wvEvent(1350,b,l)
#define WV_INT_MSRO_EXIT(b,l)        wvEvent(1351,b,l)
#define WV_INT_BABT_ENTRY(b,l)       wvEvent(1360,b,l)
#define WV_INT_BABT_EXIT(b,l)        wvEvent(1361,b,l)
#define WV_INT_LC_ENTRY(b,l)         wvEvent(1370,b,l)
#define WV_INT_LC_EXIT(b,l)          wvEvent(1371,b,l)
#define WV_INT_CRL_ENTRY(b,l)        wvEvent(1380,b,l)
#define WV_INT_CRL_EXIT(b,l)         wvEvent(1381,b,l)
#define WV_INT_XFUN_ENTRY(b,l)       wvEvent(1390,b,l)
#define WV_INT_XFUN_EXIT(b,l)        wvEvent(1391,b,l)
#define WV_INT_GRSC_ENTRY(b,l)       wvEvent(13a0,b,l)
#define WV_INT_GRSC_EXIT(b,l)        wvEvent(13a1,b,l)
#else
#define WV_INT_ENTRY(b,l)
#define WV_INT_EXIT(b,l)
#define WV_INT_RXB_ENTRY(b,l)
#define WV_INT_RXB_EXIT(b,l)
#define WV_INT_RXF_ENTRY(b,l)
#define WV_INT_BSY_ENTRY(b,l)
#define WV_INT_BSY_EXIT(b,l)
#define WV_INT_RX_EXIT(b,l)
#define WV_INT_RXC_ENTRY(b,l)
#define WV_INT_RXC_EXIT(b,l)
#define WV_INT_TXC_ENTRY(b,l)
#define WV_INT_TXC_EXIT(b,l)
#define WV_INT_TXF_ENTRY(b,l)
#define WV_INT_TXF_EXIT(b,l)
#define WV_INT_TXB_ENTRY(b,l)
#define WV_INT_TXB_EXIT(b,l)
#define WV_INT_TXE_ENTRY(b,l)
#define WV_INT_TXE_EXIT(b,l)
#define WV_INT_GRA_ENTRY(b,l)
#define WV_INT_GRA_EXIT(b,l)
#define WV_INT_BABR_ENTRY(b,l)
#define WV_INT_BABR_EXIT(b,l)
#define WV_INT_EBERR_ENTRY(b,l)
#define WV_INT_EBERR_EXIT(b,l)
#define WV_INT_MSRO_ENTRY(b,l)
#define WV_INT_MSRO_EXIT(b,l)
#define WV_INT_BABT_ENTRY(b,l)
#define WV_INT_BABT_EXIT(b,l)
#define WV_INT_LC_ENTRY(b,l)
#define WV_INT_LC_EXIT(b,l)
#define WV_INT_CRL_ENTRY(b,l)
#define WV_INT_CRL_EXIT(b,l)
#define WV_INT_XFUN_ENTRY(b,l)
#define WV_INT_XFUN_EXIT(b,l)
#define WV_INT_GRSC_ENTRY(b,l)
#define WV_INT_GRSC_EXIT(b,l)
#define WV_INT_NETJOBADD_ENTRY(b,l)
#define WV_INT_NETJOBADD_EXIT(b,l)
#define WV_HANDLER_ENTRY(b,l)
#define WV_HANDLER_EXIT(b,l)
#define WV_MUX_TX_RESTART_ENTRY(b,l)
#define WV_MUX_TX_RESTART_EXIT(b,l)
#define WV_MUX_ERROR_ENTRY(b,l)
#define WV_MUX_ERROR_EXIT(b,l)
#define WV_SEND_ENTRY(b,l)
#define WV_SEND_EXIT(b,l)
#define WV_RECV_ENTRY(b,l)
#define WV_RECV_EXIT(b,l)
#define WV_CACHE_FLUSH_ENTRY(b,l)
#define WV_CACHE_FLUSH_EXIT(b,l)
#define WV_CACHE_INVAL_ENTRY(b,l)
#define WV_CACHE_INVAL_EXIT(b,l)
#endif
/* defines */

/* Cache and virtual/physical memory related macros */


#define ZXR10_MOT_TSEC_CACHE_INVAL(address, len)                              \
    CACHE_DRV_INVALIDATE (&pDrvCtrl->bufCacheFuncs, (address), (len));


#define ZXR10_MOT_TSEC_CACHE_FLUSH(address, len)                               \
    CACHE_DRV_FLUSH (&pDrvCtrl->bufCacheFuncs, (address), (len));

#ifndef ZXR10_MOT_TSEC_MS_DELAY
#define ZXR10_MOT_TSEC_MS_DELAY(x)   \
    {                          \
    int loop;                  \
    loop = (x);                \
    while (loop--)             \
        sysDelay();            \
    }
#endif /* ZXR10_MOT_TSEC_MS_DELAY */

/* Flag Macros */