📄 gei82543lib.h
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#define GEI_HADDR(pDrvCtrl) \
(&(pDrvCtrl->drvObj.ifPhysAddress.phyAddress[0]))#define GEI_HADDR_LEN(pDrvCtrl) \
(pDrvCtrl->drvObj.ifPhysAddress.addrLength)
#define GEI_FLAG_CLEAR(clearBits) \
(pDrvCtrl->flags &= ~(clearBits))
#define GEI_FLAG_SET(setBits) \
(pDrvCtrl->flags |= (setBits))#define GEI_FLAG_GET() \
(pDrvCtrl->flags)#define GEI_FLAG_ISSET(setBits) \
(pDrvCtrl->flags & (setBits))
/*
* The offset at which the packet checksum starts.
* Specified this way to handle and IPv6 header immediately
* following an RFC 894 Ethernet header.
*/
#define GEI_RXCSUM_PKT_CSUM_OFF (14 + 40)
/* device structure */
typedef struct end_device
{
DRV_OBJ drvObj; /* the class we inherit from. */
int unit; /* unit number */
UINT32 flags; /* flags for device configuration */
CACHE_FUNCS * pCacheFuncs; /* cache function pointers */
ADAPTOR_INFO adaptor; /* adaptor information */
UINT32 devRegBase; /* virtual base address for registers */
char *pTxDescBase; /* pointer to the TX descriptor base */
char *pEndBufForMng[GEI_DEFAULT_TXDES_NUM];
char *pEndBufForRx[GEI_DEFAULT_RXDES_NUM];
char *pRxDescBase; /* pointer to the RX descriptor base */
volatile int txDescTail; /* index to the TX tail */
volatile int rxDescTail; /* index to the RX tail */
int txDescNum; /* num of TX descriptors */
int rxDescNum; /* num of RX descriptors */
UINT32 rxBufSize; /* RX buffer size */
UINT32 txReqDescNum; /* request number for TX descriptor */
int mtu; /* maximum transfer unit */
volatile int rxtxHandling; /* indicator for RX handling */
volatile BOOL txStall; /* indicator for transmit stall */
char * pRxBufMem; /* allocated Rx Buffer memory pointer*/
UINT32 rxPktSz; /* MRU + offset */
int rxIntDelay; /* delay time for RX interrupt */
int maxRxNumPerInt; /* maximum RX packets processed per Int */
UINT32 multiCastFilterType; /* indicator of multicast table type */
int flowCtrl; /* flow control setting */
volatile UINT32 linkStatus; /* indicator for link status */
BOOL linkMethod; /* indicator for link approaches */
UINT32 txConfigureWord; /* copy of TX configuration word register */
UINT32 devCtrlRegVal; /* control register value */
UINT32 rxCtrlRegVal; /* control register value */
UINT32 phyCtrlRegVal; /* PHY control register value */
UINT32 speed; /* device speed */
UINT32 duplex; /* device duplex mode */
UINT32 offset; /* offset for IP header */
UINT32 cableType; /* cable type (Fiber or Copper) */
BOOL memAllocFlag; /* indicator that the shared memory */
/* was allocated by driver */
char * pMemBase; /* memory base for TX/RX area */
int memSize; /* total memory size for RX/TX area */
PHY_INFO * pPhyInfo; /* pointer to phyInfo structure */
UINT32 phyInitFlags; /* Initial PHY flags for phyInfo */
volatile UINT32 txDescLastCheck; /* index of the last checked TX desc */
volatile UINT32 txDescFreeNum; /* available/usable TX desc number */
BOOL txResoFreeQuick; /* flag to free loaned mBlk quickly */
volatile BOOL attach; /* indicator for drive attach */
volatile BOOL devStartFlag; /* indicator for device start */
#ifdef INCLUDE_TBI_COMPATIBLE
BOOL tbiCompatibility; /* TBI compatibility for HW bug */
#endif
STA_REG staRegs; /* statistic register structure */
UINT32 lastCsumCtx;
UINT32 lastIpHdrLen;
END_STATS statscounters;
FUNCPTR *pFlushRtn;
FUNCPTR *pInvalRtn;
UINT32 rxPktAlloc0Num; /*Rx Setup Alloc endbuf*/
UINT32 rxPktAlloc1Num; /*Rx Receive Alloc endbuf*/
UINT32 txResFreeNum; /*tx free endbuf count*/
UINT32 rxResFreeNum; /*rx free endbuf count*/
UINT32 rxJobAddErr;
UINT32 linkJobAddErr;
UINT32 totalIntNum;
UINT32 rxtxHandlerNum; /* num of rxtx handler calling */
UINT32 rxIntCount; /* receive interrupt count */
UINT32 rxTimerIntCount; /* receive timer interrupt count */
UINT32 linkIntCount; /* receive interrupt count */
UINT32 txIntCount; /* transmit interrupt count */
UINT32 txBDNotOK; /*transmit BD not OK*/
UINT32 rxORunIntCount; /* num of RX overrun interrupt count */
UINT32 rxPacketNum; /* statistic RX packet number */
UINT32 searchNetErr; /* receive search net error */
UINT32 txPacketNum; /* num of tx packet */
UINT32 rxPacketDrvErr ; /* num of RX packet drop due to no resc */
UINT32 noEndBuf; /*no End Buffer allocate*/
UINT32 noPacketEOP;
UINT32 errPacketNum;
UINT32 rxDesDoneErr; /*hardware does not done with the descriptor*/
UINT32 recvPktFailNum;
UINT32 recvRetryFailNum;
UINT32 MDIReadErr;
UINT32 MDIWriteErr;
} END_DEVICE;
/* DEBUG MACROS */
/*
* Define the following MACROs for debugging
* #define DRV_DEBUG
* #define DEBUG
*/
/*#undef INCLUDE_GEI82543_DEBUG_ROUTINE*/
#undef GEI82543_NO_LOCAL
#ifdef DEBUG
int geiEndDebug = 0;
#define LOGMSG(x,a,b,c,d,e,f) \
do { \
if (geiEndDebug) \
{ \
logMsg (x,a,b,c,d,e,f); \
} \
} while (0)
#else
#define LOGMSG(x,a,b,c,d,e,f)
#endif /* DEBUG */
#ifdef GEI82543_NO_LOCAL
#undef LOCAL
#define LOCAL
#endif
#ifdef GEI_DRV_DEBUG543
#define DRV_DEBUG_OFF 0x0000
#define DRV_DEBUG_RX 0x0001
#define DRV_DEBUG_TX 0x0002
#define DRV_DEBUG_INT 0x0004
#define DRV_DEBUG_POLL (DRV_DEBUG_POLL_RX | DRV_DEBUG_POLL_TX)
#define DRV_DEBUG_POLL_RX 0x0008
#define DRV_DEBUG_POLL_TX 0x0010
#define DRV_DEBUG_LOAD 0x0020
#define DRV_DEBUG_IOCTL 0x0040
#define DRV_DEBUG_TIMER 0x20000
typedef struct geiResource /* GEI_RESOURCE */
{
UINT32 memBaseLow; /* Base Address LOW */
UINT32 memBaseHigh; /* Base Address HIGH */
char irq; /* Interrupt Request Level */
int boardType; /* type of LAN board this unit is */
int pciBus; /* PCI Bus number */
int pciDevice; /* PCI Device number */
int pciFunc; /* PCI Function number */
UINT initialStateMask; /* mask parameter to vmStateSet */
UINT initialState; /* state parameter to vmStateSet */
UCHAR enetAddr[6]; /* MAC address for this adaptor */
STATUS iniStatus; /* initialization perform status */
UINT32 rxDesNum; /* RX descriptor for this unit */
UINT32 txDesNum; /* TX descriptor for this unit */
UINT32 usrFlags; /* user flags for this unit */
} GEI_RESOURCE;
/*extern variables*/
extern int gei82543GCDebug;
extern END_DEVICE * geiEndDevice[];
extern GEI_RESOURCE geiResources[];
/* This one is specifically for use in the ISR */
#define DRV_LOGMSG(FLG, X0, X1, X2, X3, X4, X5, X6) \
do { \
if (gei82543GCDebug & FLG) \
logMsg(X0, X1, X2, X3, X4, X5, X6); \
} while (0)
#define DRV_LOG(FLG, X0, X1, X2, X3, X4, X5, X6) \
do { \
if (gei82543GCDebug & FLG) \
logMsg (X0, X1, X2, X3, X4, X5, X6); \
} while (0)
#define DRV_PRINT(FLG,X) \
do { \
if (gei82543GCDebug & FLG) \
printf X; \
} while (0)
#else /* GEI_DRV_DEBUG543 */
#define DRV_LOG(DBG_SW, X0, X1, X2, X3, X4, X5, X6)
#define DRV_LOGMSG(DBG_SW, X0, X1, X2, X3, X4, X5, X6)
#define DRV_PRINT(DBG_SW,X)
#endif /* GEI_DRV_DEBUG543 */
#ifdef INCLUDE_GEI82543_DEBUG_ROUTINE
void gei82543LedOff (int);
void gei82543LedOn (int);
void gei82543StatusShow (int);
UINT32 gei82543RegGet (int,UINT32);
void gei82543RegSet (int,UINT32, UINT32);
#ifdef INCLUDE_TBI_COMPATIBLE
void gei82543TbiCompWr (int, int);
#endif /* INCLUDE_TBI_COMPATIBLE */
#endif /* INCLUDE_GEI82543_DEBUG_ROUTINE */
/*extern function */
IMPORT STATUS sys543PciInit (UINT8 slot);
IMPORT END_DEVICE *gei82543Unit(int);
IMPORT void gei82543IsisSet(int slot);
IMPORT STATUS gei82543Recv(END_DEVICE * pDrvCtrl, char * pRxDesc, UINT8 rxdStat );
IMPORT STATUS drv_gei82543EndSend(UINT32 gPort, char *pBuf, int pktSize,char *pData);
IMPORT void gei82543DuplexGet (END_DEVICE *);
IMPORT void gei82543SpeedGet (END_DEVICE *);
IMPORT void gei82543HwStatusDump (END_DEVICE *);
IMPORT STATUS gei82544PhyWrite (END_DEVICE *,UINT8,UINT8,UINT16);
IMPORT STATUS gei82544PhyRead (END_DEVICE *,UINT8,UINT8, UINT16 *);
IMPORT STATUS gei82543HwInit (END_DEVICE *);
IMPORT STATUS gei82543linkInit (END_DEVICE *);
IMPORT void gei82543AllMtaAdrClean (END_DEVICE *);
IMPORT void gei82543AllRxAdrClean (END_DEVICE *);
IMPORT void gei82543AllVlanClean (END_DEVICE *);
IMPORT void gei82543EtherRxAdrSet (END_DEVICE *,UINT8 adr[],int);
IMPORT STATUS gei82543linkTBISetup (END_DEVICE *,BOOL);
IMPORT STATUS gei82543linkGMIISetup (END_DEVICE *);
IMPORT STATUS gei82543linkGMIIPreInit (END_DEVICE *);
IMPORT STATUS sys82543BoardInit (int slot,ADAPTOR_INFO *pboard);
IMPORT int endMultiLstCnt (END_OBJ* pEnd);
IMPORT UINT32 b_FetchSerial();
IMPORT STATUS b_pciIntConnect(UINT8 pciIntNo, VOIDFUNCPTR routine, int para);IMPORT STATUS b_pciIntDisconnect(UINT8 );
IMPORT STATUS b_pciUnitIntDisable(UINT8 pciUnit);
extern void Ros_PortStateSend(int unit,int lport,int state);
IMPORT void gei82543EndConfigure (END_DEVICE *);
IMPORT STATUS gei82543LoopBackSet(END_DEVICE * pDrvCtrl,int action );
IMPORT STATUS gei82543ShutdownSet(END_DEVICE * pDrvCtrl, int action);
IMPORT STATUS gei82543AutoNegoSet(END_DEVICE * pDrvCtrl, int action);
IMPORT STATUS gei82543SpeedSet(END_DEVICE * pDrvCtrl, int action);
IMPORT STATUS gei82543DuplexSet(END_DEVICE * pDrvCtrl, int action);
/*IMPORT void * sysVirtToPhys(void *virtAddr);*/
IMPORT int netTaskId;
#endif /*#ifndef _GEI_82543_LIB_H*/
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