gei82543lib.h

intel 82543 千兆网卡 vxworks驱动源码

#ifndef _GEI_82543_LIB_H
#define _GEI_82543_LIB_H

#include "vxWorks.h"
#include "stdlib.h"
#include "cacheLib.h"
#include "intLib.h"
#include "end.h"                /* common END structures. */
#include "endLib.h"
#include "lstLib.h"             /* needed to maintain protocol list. */
#include "wdLib.h"
#include "iv.h"
#include "semLib.h"
#include "logLib.h"
#include "netLib.h"
#include "stdio.h"
#include "sysLib.h"
#include "errno.h"
#include "errnoLib.h"
#include "memLib.h"
#include "iosLib.h"

#undef    ETHER_MAP_IP_MULTICAST
#include "etherMultiLib.h"      /* multicast stuff. */

#include "sys/times.h"
#include "net/mbuf.h"
#include "net/unixLib.h"
#include "net/protosw.h"
#include "net/systm.h"
#include "net/if_subr.h"
#include "net/route.h"
#include "sys/socket.h"
#include "sys/ioctl.h"
#include "geiIFDrvlib.h"
#include "geimiilib.h"
#include "gei82543End.h"
#include "mgeo_ex.h"

#include "Ros_ex.h"
#include "Driver/drvLib/include/drv_comm.h"
#include "..\Diagnose\include\diag_prj_ex.h"
/*#include "Driver/ifDrvLib/include/IFDrvLib.h"*/

#include "bsp_ex.h"
#include "string.h"
#include "taskLib.h"
#include "mux_ex.h"
#ifdef WR_IPV6
#include "adv_net.h"
#endif /* WR_IPV6 */

#ifndef _WRS_FASTTEXT
#define _WRS_FASTTEXT
#endif

/* Driver debug control */
#define  GEI_DRV_DEBUG543
#define  GEI_USE_LEGACY_BUF      1    /* legacy (vxWork5.5) buf management  */
#define  GEI_USE_LEGACY_LINKBUF  2    /* link buffer management */
#define  GEI_USE_BASE6_BUF       3    /* vxWorks6.0 buffer management */

/* choose one of three buffer management option above */

#define GEI_BUF_TYPE             GEI_USE_LEGACY_BUF 

#define GEI_RX_CSUM(pDrvCtrl) ((pDrvCtrl)->hwCaps.csum_flags_rx)

/* defines */

#undef INCLUDE_TBI_COMPATIBLE


/* all 8254x chip registers are 32 bit long*/

#if 1
#define GEI_READ_REG(offset,result)     \
        do {                         \
           UINT32 temp;              \
           temp = ((*(volatile UINT32 *)(pDrvCtrl->devRegBase + (offset)))); \
           result = Drv_Swap32(temp); /* swap the data */  \
           } while ((0))

#define GEI_WRITE_REG(offset, value) \
        ((*(volatile UINT32 *)(pDrvCtrl->devRegBase + (offset))) = \
        (UINT32) Drv_Swap32(value))

#define GEI_WRITE_DESC_WORD(pDesc, offset, value)      \
        (*(UINT16 *)((UINT32)pDesc + offset) =    \
        Drv_Swap16(value) & 0xffff)  

#define GEI_WRITE_DESC_LONG(pDesc, offset, value)      \
        (*(UINT32 *)((UINT32)pDesc + offset) =    \
        (UINT32) Drv_Swap32(value))

#define GEI_READ_DESC_WORD(pDesc, offset, result)             \
        do {                                                  \
           UINT16 temp;                                       \
           temp = *(UINT16 *)((UINT32)pDesc + offset);        \
           result = Drv_Swap16(temp)& 0xffff/*(MSB(temp) | (LSB(temp) << 8)) & 0xffff*/;  \
           } while ((0))

#define GEI_READ_DESC_LONG(pDesc, offset, result)              \
        do {                         \
           UINT32 temp;              \
           temp = *(UINT32 *)((UINT32)pDesc + offset);   \
           result = Drv_Swap32(temp); /* swap the data */  \
           } while ((0))

#else /* (_BYTE_ORDER == _BIG_ENDIAN) */

#define GEI_READ_REG(offset, result)     \
        result = (*(volatile UINT32 *)(pDrvCtrl->devRegBase + (offset)))

#define GEI_WRITE_REG(offset, value) \
        ((*(volatile UINT32 *)(pDrvCtrl->devRegBase + (offset))) = \
        (UINT32)(value))

#define GEI_WRITE_DESC_WORD(pDesc, offset, value)      \
        (*(UINT16 *)((UINT32)pDesc + offset) = (UINT16)(value & 0xffff))

#define GEI_WRITE_DESC_LONG(pDesc, offset, value)      \
        (*(UINT32 *)((UINT32)pDesc + offset) = (UINT32)value)

#define GEI_READ_DESC_WORD(pDesc, offset, result)              \
        result = ((UINT16)(*(UINT16 *)((UINT32)pDesc + offset)) & 0xffff)

#define GEI_READ_DESC_LONG(pDesc, offset, result)              \
        result = ((UINT32)( *(UINT32 *)((UINT32)pDesc + offset)))
 
#endif /* (_BYTE_ORDER == _BIG_ENDIAN) */

#define GEI_WRITE_DESC_BYTE(pDesc, offset, value)      \
        (*(UINT8 *)((UINT32)pDesc + offset) = (UINT8) (value & 0xff))

#define GEI_READ_DESC_BYTE(pDesc, offset)              \
        ((UINT8)( *(UINT8 *)((UINT32)pDesc + offset)) & 0xff)

#define GEI_GET_RX_DESC_ADDR(offset)          \
        (pDrvCtrl->pRxDescBase + ((offset) * RXDESC_SIZE))

#define GEI_GET_TX_DESC_ADDR(offset)          \
        (pDrvCtrl->pTxDescBase + ((offset) * TXDESC_SIZE))

#define GEI_GET_TX_DESC_CTL_ADDR(offset)      \
        (pDrvCtrl->pTxDesCtlBase + (offset));

#define GEI_GET_TX_DESC_TAIL_UPDATE(tmp, num)     \
         (tmp) = (pDrvCtrl->txDescTail + (num)) % (pDrvCtrl->txDescNum) 

#define GEI_GET_RX_DESC_TAIL_UPDATE(tmp, num)        \
        (tmp) = (pDrvCtrl->rxDescTail + (num)) % (pDrvCtrl->rxDescNum)

#define ROUND_UP_MULTIPLE(x, y)          \
        ( ( ( x + ( y - 1 ) ) / y ) * y )

/* bus/CPU address translation macros */

#define GEI_VIRT_TO_BUS(virtAddr)                                           \
        (GEI_PHYS_TO_BUS (((UINT32) GEI_VIRT_TO_PHYS (virtAddr))))

#define GEI_PHYS_TO_VIRT(physAddr)                                          \
        END_CACHE_PHYS_TO_VIRT ((char *)(physAddr))

#define GEI_VIRT_TO_PHYS(virtAddr)                                          \
        END_CACHE_VIRT_TO_PHYS ((char *)(virtAddr))

#define GEI_PHYS_TO_BUS(physAddr)                                          \
        PHYS_TO_BUS_ADDR (pDrvCtrl->unit, (physAddr))

#define GEI_BUS_TO_PHYS(busAddr)                                           \
        BUS_TO_PHYS_ADDR (pDrvCtrl->unit, (busAddr))

/* cache macros */

#define END_USR_CACHE_FLUSH(address, len) \
        do \
          { \
          if (*pDrvCtrl->pFlushRtn != NULL)   \
              (*pDrvCtrl->pFlushRtn) (DATA_CACHE, (address), (len));  \
          } while ((0))

#define END_DRV_CACHE_INVALIDATE(address, len) \
        do \
          { \
          if (*pDrvCtrl->pInvalRtn != NULL)   \
              (*pDrvCtrl->pInvalRtn) (DATA_CACHE, (address), (len));  \
          } while ((0))

#define END_CACHE_PHYS_TO_VIRT(address) \
        CACHE_DRV_PHYS_TO_VIRT (&cacheDmaFuncs, (address))

#define END_CACHE_VIRT_TO_PHYS(address) \
        CACHE_DRV_VIRT_TO_PHYS (&cacheDmaFuncs, (address))

/* misc. */

#define GEI_DESC_ALIGN_BYTE         (128)

#if   (GEI_BUF_TYPE == GEI_USE_LEGACY_LINKBUF) || \
      (GEI_BUF_TYPE == GEI_USE_BASE6_BUF)
 
#define GEI_CL_OVERHEAD	0
#define GEI_TUPLE_GET(pNetPool) (mBlkGet ((pNetPool), M_DONTWAIT, MT_DATA))

#else  /* ! GEI_USE_LEGACY_LINKBUF */

#define GEI_CL_OVERHEAD	(sizeof (CL_POOL_ID))

/* Here we use a bufSize of 1, since we know there is only one cluster size */
#define GEI_TUPLE_GET(pNetPool) \
    (netTupleGet ((pNetPool), 1, M_DONTWAIT, MT_DATA, TRUE))

#endif /* ! GEI_USE_LEGACY_LINKBUF */

/*
 * Default macro definitions for BSP interface.
 * These macros can be redefined in a wrapper file, to generate
 * a new module with an optimized interface.
 */
/* macro to connect interrupt handler to vector */

#ifndef SYS_INT_CONNECT
#define SYS_INT_CONNECT(pDrvCtrl,rtn,arg,pResult)          \
    {                                                      \
    *pResult = OK;                                         \
    if (pDrvCtrl->adaptor.intConnect)                                  \
       *pResult = (pDrvCtrl->adaptor.intConnect) ((VOIDFUNCPTR *)      \
          INUM_TO_IVEC (pDrvCtrl->adaptor.vector), \
              rtn, (int)arg);                          \
    }
#endif

/* macro to disconnect interrupt handler from vector */

#ifndef SYS_INT_DISCONNECT
#define SYS_INT_DISCONNECT(pDrvCtrl,pResult)        			\
    {                                                                 	\
    *pResult = OK;                                                    	\
    if (pDrvCtrl->adaptor.intDisConnect)                               		\
       *pResult =  (pDrvCtrl->adaptor.intDisConnect) (pDrvCtrl->drvObj.slot);                         					\
    }
#endif

/* macro to enable the appropriate interrupt level */

#ifndef SYS_INT_ENABLE
#define SYS_INT_ENABLE(pDrvCtrl)                            \
    {                                                       \
    pDrvCtrl->adaptor.intEnable;  \
    }
#endif
#ifndef SYS_INT_DISABLE
#define SYS_INT_DISABLE(pDrvCtrl)                           \
    {                                                       \
    pDrvCtrl->adaptor.intDisable; \
    }
#endif

/* 
 * a shortcut for getting the hardware address
 * from the MIB II stuff. 
 */