sec2_global.c

freescale ppc sec2加解密单元驱动

/*  
    A definition used to control allocation and referencing
    of global variables.
    
    When the definition is not set it is considered
    to be used as a reference (extern is prepended).

    When the definition is set (to nothing) it is considered to be
    allocating the global variable.  This is done in one place
    only.  In init.c
*/

/*  SEC2_CHANNEL_ASSIGNMENT ChannelAssignments
    A global variable which is a array of channel assignment
    structures.  Each channel is reqresented by its own channel
    assignment structure.
*/
#include "sec2Driver.h"
#include "Sec2.h"
#include "sec2_dpd_table.h"

 SEC2_DPD sec2_Descriptors[SEC2_NUM_CHANNELS][MAX_DPDS] ;
 SEC2_CHANNEL_ASSIGNMENT Sec2_ChannelAssignments[SEC2_NUM_CHANNELS];
 SEC2_DPD *Sec2_dpd[SEC2_NUM_CHANNELS][MAX_DPDS];
 QUEUE_ENTRY sec2_Queue[SEC2_HANDLE_QUEUE_DEPTH];
 SEC2_FWD_QUEUE *gpSec2_fwd_Queue = (SEC2_FWD_QUEUE *)NULL;
 DRV_SEC2_END *gpDrvSec2End = (DRV_SEC2_END *)NULL;

/*  A global variable which is an array of CHAs that
    are assigned to channels.
        
    The value in each element is either
    #CHA_BUSY which is unassigned or the channel that is
    assigned (1-4) to the CHA represented by the array index.
*/
 unsigned char sec2_ChaAssignments[16];

/*  A global variable which is the address of the base
    address register for the SEC2 coprocessor
    
    All registers accessed are offsets from this register.
    This variable is initialized during startup.
*/
 unsigned long sec2_IOBaseAddress;

/*  A global variable which is a pointer to the CHA
    Assignment Status Register
    
    This variable is initialized during startup.  It is determined
    to be a fixed offset from the #IOBaseAddress
    register.  See the SEC2 manual for details.
*/
 volatile unsigned long *sec2_ChaAssignmentStatusRegister;

/*  A global variable which is a pointer to the CHA
    Assignment Control Register
    
    This variable is initialized during startup.  It is determined
    to be a fixed offset from the #IOBaseAddress
    register.  See the SEC2 manual for details.
*/
 volatile unsigned long *sec2_ChaAssignmentControlRegister;

/*  A global variable which is a pointer to the Interrupt
    Control Register
    
    This variable is initialized during startup.  It is determined
    to be a fixed offset from the #IOBaseAddress
    register.  See the SEC2 manual for details.
*/
 volatile unsigned long *sec2_InterruptControlRegister;

/*  A global variable which is a pointer to the Interrupt
    Status Register
    
    This variable is initialized during startup.  It is determined
    to be a fixed offset from the #IOBaseAddress
    register.  See the SEC2 manual for details.
*/
 volatile unsigned long *sec2_InterruptStatusRegister;

/*  A global variable which is a pointer to the Interrupt
    Clear Register
    
    This variable is initialized during startup.  It is determined
    to be a fixed offset from the #IOBaseAddress
    register.  See the SEC2 manual for details.
*/
 volatile unsigned long *sec2_InterruptClearRegister;

/*  A global variable which is a pointer to the ID Register
    
    This variable is initialized during startup.  It is determined
    to be a fixed offset from the #IOBaseAddress
    register.  See the SEC2 manual for details.
*/
 volatile unsigned long *sec2_IdRegister;

/*  A global variable which is a array of pointers to the
    Channel Config Registers.  There is one per channel.
    
    This pointers are initialized during startup.  They are determined
    to be a fixed offset from the #IOBaseAddress
    register.  See the SEC2 manual for details.
*/
 volatile unsigned long *sec2_ChannelConfigRegister[SEC2_NUM_CHANNELS];

/*  A global variable which is a array of pointers to the
    Channel Pointer Status Registers.  There is one per channel.
    
    This pointers are initialized during startup.  They are determined
    to be a fixed offset from the #IOBaseAddress

    register.  See the SEC2 manual for details.
*/
 volatile unsigned long *sec2_ChannelPointerStatusRegister[SEC2_NUM_CHANNELS];

/*  A global variable which is a array of pointers to the
    Channel Next Descriptor Registers.  There is one per channel.
    
    This pointers are initialized during startup.  They are determined
    to be a fixed offset from the #IOBaseAddress
    register.  See the SEC2 manual for details.
*/
 volatile unsigned long *sec2_ChannelNextDescriptorRegister[SEC2_NUM_CHANNELS];

/*  A global variable which is a array of pointers to the
    CHA Reset Control Registers.  There is one per CHA.
    
    This pointers are initialized during startup.  They are determined
    to be a fixed offset from the #IOBaseAddress
    register.  See the SEC2 manual for details.
*/
 volatile unsigned long *sec2_ChaResetControlRegister[NUM_CHAS];

/*  A global variable which is a array of pointers to the
    CHA Interrupt Status Registers.  There is one per CHA.
    
    This pointers are initialized during startup.  They are determined
    to be a fixed offset from the #IOBaseAddress
    register.  See the SEC2 manual for details.
*/
 volatile unsigned long *Sec2ChaInterruptStatusRegister[NUM_CHAS];

/*  A global variable which is a array of pointers to the
    CHA Interrupt Control Registers.  There is one per CHA.
    
    This pointers are initialized during startup.  They are determined
    to be a fixed offset from the #IOBaseAddress
    register.  See the SEC2 manual for details.
*/
 volatile unsigned long *sec2_ChaInterruptControlRegister[NUM_CHAS];

/*  Debugging Only variables.
*/
 volatile unsigned long *sec2_ChannelDataBufferDescriptorRegister[SEC2_NUM_CHANNELS];
 volatile unsigned long *sec2_ChannelDataBufferDescriptorRegister[SEC2_NUM_CHANNELS];

/*  long *sec2_MasterControlRegister
    A global variable which is a pointer to the
    Master Control Register
    
    This variable is initialized during startup.  It is determined
    to be a fixed offset from the #IOBaseAddress
    register.  See the SEC2 manual for details.
*/
 volatile unsigned long *sec2_MasterControlRegister;

/*  sec2_FreeChannels
    A global variable which keeps track of the number of
    free channels
*/
 int sec2_FreeChannels;

/*! \var int sec2_FreeRngas
    \brief A global variable which keeps track of the number of
    free RNG CHAs
*/
 unsigned long sec2_FreeRngas;

/*! \var int sec2_FreeAfhas
    \brief A global variable which keeps track of the number of
    free ARC4 CHAs
*/
 unsigned long sec2_FreeAfhas;

/*! \var int sec2_FreeDesas
    \brief A global variable which keeps track of the number of
    free DES CHAs
*/
 unsigned long sec2_FreeDesas;

/*! \var int sec2_FreeMdhas
    \brief A global variable which keeps track of the number of
    free MD CHAs
*/
 unsigned long sec2_FreeMdhas;

/*! \var int sec2_FreePkhas
    \brief A global variable which keeps track of the number of
    free PK CHAs
*/
 unsigned long sec2_FreePkhas;

/*! \var int sec2_FreeAesas
    \brief A global variable which keeps track of the number of
    free AESA CHAs
*/
 unsigned long sec2_FreeAesas;

/*! \var int sec2_FreeKeas
    \brief A global variable which keeps track of the number of
    free KEA CHAs
*/
 unsigned long sec2_FreeKeas;

/*! \var unsigned long sec2_BlockSize
    \brief A global variable which indicates what the current block size
    is
*/
 unsigned long sec2_BlockSize;

/*! \var ProcessQueueTop
    \brief A global variable which is a pointer to the top
    of the Pending dynamic request list (list of ::queue_entry"s").
*/
 QUEUE_ENTRY *sec2_ProcessQueueTop;
/*! \var ProcessQueueBottom
    \brief A global variable which is a pointer to the bottom
    of the Pending dynamic request list (list of ::queue_entry"s").
*/
 QUEUE_ENTRY *sec2_ProcessQueueBottom;

 SEC2_FWD_QUEUE *gpSec2_FwdQueueTop = (SEC2_FWD_QUEUE *)NULL;
 
 SEC2_FWD_QUEUE *gpSec2_FwdQueueBottom = (SEC2_FWD_QUEUE *)NULL;
 
/*! \var unsigned long QueueEntryDepth
    \brief A global variable which keeps track of the number
    of entries in the Pending dynamic request list pointed to
    by #ProcessQueueTop
*/
unsigned long sec2_QueueEntryDepth = 0;

SEC2_CHANNEL_PKTCNT_DEBUG*  pgsec2_channel_debug = (SEC2_CHANNEL_PKTCNT_DEBUG*)NULL; 
SEC2_PKTCNT_DEBUG        *  pgsec2_global_debug  = (SEC2_PKTCNT_DEBUG *)NULL;

/*! \var SEM_ID ChannelAssignSemId
    \brief (VxWorks Only) A global variable which is used as a mutual exclusion
    semaphore for the #Sec2_ChannelAssignments array.

    The variable is not used directly.  It used by calling 
    #IOLockChannelAssignment() to lock and #IOUnLockChannelAssignment()
    to unlock.
*/
#if defined(VXWORKS)
 SEM_ID sec2_ChannelAssignSemId = NULL;
#else
#ifdef __KERNEL__
extern spinlock_t ChannelAssignLock;
#else
#ifdef INIT_C
DECLARE_MUTEX(sec2_ChannelAssignSemId);
#else
extern struct semaphore sec2_ChannelAssignSemId;
#endif
#endif
#endif

/*! \var SEM_ID QueueSemId
    \brief (VxWorks Only) A global variable which is used as a mutual exclusion
    semaphore for the Queue

    The variable is not used directly.  It used by calling 
    #IOLockBlockSize() to lock and #IOUnLockBlockSize()
    to unlock.
*/
#if defined(VXWORKS)
 SEM_ID sec2_QueueSemId = NULL;
#else
#ifdef INIT_C
DECLARE_MUTEX(sec2_QueueSemId);
#else
extern struct semaphore sec2_QueueSemId;
#endif
#endif





#ifdef VXWORKS
/*  The queue identifier is used to queue register values read by the
    ISR (#sec2_InterruptServiceRoutine()) to the deferred interrupt process
    routine (#Sec2_ProcessingComplete())
*/
 MSG_Q_ID IsrMsgQId;

/* OS's identification of the device*/
 int driverNum;
#endif


#ifdef __KERNEL__
/* Device major number registered at device initialization */
 int sec2_devmajor;

#endif



 unsigned int sec2_cha_idx[6];


/*! \var DEV_HDR vxworksDrvDev
    \brief (VxWorks Only) Used in driver startup.
*/
#ifdef VXWORKS
 DEV_HDR vxworksDrvDev;
#endif



/* coremask holds the core ID register for version/feature control */
 unsigned long sec2_coremask;



/****************************************************************************
 * Sec2Descriptors.h - Descriptor construction definitions for the SEC2.x
 *                     security processing core family
 ****************************************************************************
 * Copyright (c) Certicom Corp. 1996-2000.  All rights reserved
 * Copyright (c) 2003, 2004 Motorola Inc., Freescale Semiconductor