zl5011xtm.c

Zalink50114----TDMoIP芯片驱动源码

/*******************************************************************************
*
*  File name:              zl5011xTm.c
*
*  Version:                24
*
*  Author:                 MRC
*
*  Date created:           09/04/2002
*
*  Copyright 2002, 2003, 2004, 2005, Zarlink Semiconductor Limited.
*  All rights reserved.
*
*  Module Description:
*
*  This file contains all the functions that will initialise and control
*  the TM block.
*
*  Each block connected to the TM is referred to as a port. A source port,
*  is one which generates task manager messages and a destination port is one
*  which takes task manager messages. A message from a source port is routed to
*  a destination port. This routing is dependent on the flow type, which is part
*  of the message. This flow type is used as the address into a lookup table, so
*  as to determine the destination port.
*  All ports are buffered in the TM.
*
*  Revision History:
*
*  Rev:  Date:       Author:  Comments:
*  1     09/04/2002  MRC      Creation
*  2     11/04/2002  MRC      Lookup RAM didn't have base address.
*  3     11/04/2002  MRC      Stores the segment sizes in the device
*                             structure.
*  4     17/04/2002  MRC      Changed the CHECK_.. macros to ZL5011X_CHECK_..
*  5     18/04/2002  MRC      Added WAN loopback flow for test ONLY
*  6     10/06/2002  LCW      Added extra functions
*  7     28/06/2002  MRC      Added setup for flow from PKC to CPU
*  8     03/07/2002  MRC      Added setup for flow from PKC to PKQ for test ONLY
*  9     10/07/2002  MRC      Added setup for flow WAN_RTP_CPU
*  10    24/07/2002  MRC      Added TM trace buffer functions
*  11    23/09/2002  MRC      Added setup for flow CPU-RTP-PKQ for test ONLY
*  12    01/10/2002  DJA      File header updated
*                             ZL5011X_TRACE messages fixed up
*  13    08/10/2002  PJE      Added three intr functions
*  14    31/10/2002  MRC      Added variants + minor fixes
*  15    24/03/2003  MRC      Prevented segment programming for rev A devices
*  16    22/05/2003  MRC      Tidied up interrupt fns
*  17    27/05/2003  APL      Added PKT_PE_PKT flow
*  18    29/07/2003  APL      Disabled inappropriate flows for device variants
*                             with no TDM
*  19    16/06/2004  MRC      Added flow PKT_PE_CPU
*  20    14/07/2004  MRC      Added flow WAN_PE_WAN
*  21    23/07/2004  MRC      Fixed some compiler warnings
*  22    29/07/2004  MRC      Fixed some compiler warnings
*  23    19/10/2004  APL      Added flow CPU_CPU
*  24    21/01/2005  MRC      Added extra test flow
*
*******************************************************************************/

/*****************   INCLUDE FILES                *****************************/

#include "zl5011x.h"
#include "zl5011xTmMap.h"
#include "zl5011xTm.h"
#include "zl5011xUtilLib.h"

/*****************   EXPORTED GLOBAL VARIABLES    *****************************/

/*****************   STATIC GLOBAL VARIABLES      *****************************/

/*******************************************************************************

 Function:
    zl5011xTmInit

 Description:
    This function initialises the TM block and  data structure.
    Sets up the routing information for the various flow types.

 Inputs:
    zl5011xParams      Pointer to the structure for this device instance

 Outputs:
    None

 Returns:
   zlStatusE

 Remarks:
    None

*******************************************************************************/

zlStatusE zl5011xTmInit(zl5011xParamsS *zl5011xParams)
{
   zlStatusE status = ZL5011X_OK;

   ZL5011X_TRACE(ZL5011X_TM_FN_ID, "zl5011xTmInit:", 0, 0, 0, 0, 0, 0);

   /* disable the lookup RAMs, to allow the host access */
   status = zl5011xTmEnableLookUpRam(zl5011xParams, ZL5011X_TM_SRC_PORT_CPU, ZL5011X_FALSE);

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmEnableLookUpRam(zl5011xParams, ZL5011X_TM_SRC_PORT_PLA, ZL5011X_FALSE);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmEnableLookUpRam(zl5011xParams, ZL5011X_TM_SRC_PORT_RTP, ZL5011X_FALSE);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmEnableLookUpRam(zl5011xParams, ZL5011X_TM_SRC_PORT_PKC, ZL5011X_FALSE);
   }

   /* program the CPU flows (Host -> ?) */
   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_CPU_WAN, ZL5011X_TM_SRC_PORT_CPU, ZL5011X_TM_DEST_PORT_TFQ);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_CPU_PKT, ZL5011X_TM_SRC_PORT_CPU, ZL5011X_TM_DEST_PORT_PKQ);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_CPU_PE_PKT, ZL5011X_TM_SRC_PORT_CPU, ZL5011X_TM_DEST_PORT_RTP);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_CPU_CPU, ZL5011X_TM_SRC_PORT_CPU, ZL5011X_TM_DEST_PORT_CPU);
   }

   /* program the PLA flows (Wan Rx -> ?) */
   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_WAN_PE_PKT, ZL5011X_TM_SRC_PORT_PLA, ZL5011X_TM_DEST_PORT_RTP);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_WAN_PKT, ZL5011X_TM_SRC_PORT_PLA, ZL5011X_TM_DEST_PORT_PKQ);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_WAN_CPU, ZL5011X_TM_SRC_PORT_PLA, ZL5011X_TM_DEST_PORT_CPU);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_WAN_PE_CPU, ZL5011X_TM_SRC_PORT_PLA, ZL5011X_TM_DEST_PORT_RTP);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_WAN_WAN, ZL5011X_TM_SRC_PORT_PLA, ZL5011X_TM_DEST_PORT_TFQ);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_WAN_PE_WAN, ZL5011X_TM_SRC_PORT_PLA, ZL5011X_TM_DEST_PORT_RTP);
   }

   /* program the RTP flows (RTP -> ?) */
   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_WAN_PE_PKT, ZL5011X_TM_SRC_PORT_RTP, ZL5011X_TM_DEST_PORT_PKQ);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_WAN_PE_CPU, ZL5011X_TM_SRC_PORT_RTP, ZL5011X_TM_DEST_PORT_CPU);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_WAN_PE_WAN, ZL5011X_TM_SRC_PORT_RTP, ZL5011X_TM_DEST_PORT_TFQ);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_PKT_TS_WAN, ZL5011X_TM_SRC_PORT_RTP, ZL5011X_TM_DEST_PORT_TFQ);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_CPU_PE_PKT, ZL5011X_TM_SRC_PORT_RTP, ZL5011X_TM_DEST_PORT_PKQ);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_PKT_PE_PKT, ZL5011X_TM_SRC_PORT_RTP, ZL5011X_TM_DEST_PORT_PKQ);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_PKT_PE_CPU, ZL5011X_TM_SRC_PORT_RTP, ZL5011X_TM_DEST_PORT_CPU);
   }

   /* program the PKC flows (PKC -> ?) */
   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_PKT_PE_WAN, ZL5011X_TM_SRC_PORT_PKC, ZL5011X_TM_DEST_PORT_TFQ);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_PKT_TS_WAN, ZL5011X_TM_SRC_PORT_PKC, ZL5011X_TM_DEST_PORT_RTP);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_PKT_WAN, ZL5011X_TM_SRC_PORT_PKC, ZL5011X_TM_DEST_PORT_TFQ);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_PKT_PKT, ZL5011X_TM_SRC_PORT_PKC, ZL5011X_TM_DEST_PORT_PKQ);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_PKT_CPU, ZL5011X_TM_SRC_PORT_PKC, ZL5011X_TM_DEST_PORT_CPU);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_PKT_PE_PKT, ZL5011X_TM_SRC_PORT_PKC, ZL5011X_TM_DEST_PORT_RTP);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmWriteLookUpRam(zl5011xParams,
            ZL5011X_FLOW_PKT_PE_CPU, ZL5011X_TM_SRC_PORT_PKC, ZL5011X_TM_DEST_PORT_RTP);
   }

   /* enable the lookup RAMs, since finished programming */
   if (status == ZL5011X_OK)
   {
      status = zl5011xTmEnableLookUpRam(zl5011xParams, ZL5011X_TM_SRC_PORT_CPU, ZL5011X_TRUE);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmEnableLookUpRam(zl5011xParams, ZL5011X_TM_SRC_PORT_PLA, ZL5011X_TRUE);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmEnableLookUpRam(zl5011xParams, ZL5011X_TM_SRC_PORT_RTP, ZL5011X_TRUE);
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xTmEnableLookUpRam(zl5011xParams, ZL5011X_TM_SRC_PORT_PKC, ZL5011X_TRUE);
   }


   /* setup the trace buffer */
   if (status == ZL5011X_OK)
   {
      status = zl5011xTmConfigureTrace(zl5011xParams,
            ZL5011X_TM_TRACE_FULL, ZL5011X_TRUE);
   }

   return(status);
}

/*******************************************************************************

 Function:
    zl5011xTmEnableLookUpRam

 Description:
   The lookup RAM must be disabled before the host can access it.

 Inputs:
   zl5011xParams   Pointer to the structure for this device instance
   port           which TM port to enable
   enable         TRUE to enable the lookup RAM, FALSE to allow host access
 Outputs:
    None

 Returns:
   zlStatusE

 Remarks:
    None

*******************************************************************************/

zlStatusE zl5011xTmEnableLookUpRam(zl5011xParamsS *zl5011xParams,
      zl5011xTmSrcPortE port, zl5011xBooleanE enable)
{
   zlStatusE status = ZL5011X_OK;
   Uint32T bits, bitMask;

   ZL5011X_TRACE(ZL5011X_TM_FN_ID, "zl5011xTmEnableLookUpRam: port %d, enable %d",
         port, enable, 0, 0, 0, 0);

   status = ZL5011X_CHECK_TM_SRC_PORT(port);

   if (status == ZL5011X_OK)
   {
      /* use the port ID to shift a bit into the position to select the
         required port, and then shift this to the position ofthe lookup
         RAM bits */
      bitMask = (ZL5011X_1BIT_MASK << port) << ZL5011X_TM_LOOKUP_RAM_ENABLE_BITS;

      /* enabling the look up RAM, puts it into operational mode. This means that
         the bit has to be cleared */
      if (enable == ZL5011X_TRUE)
      {
         bits = 0;
      }
      else
      {
         bits = bitMask;
      }

      status = zl5011xReadModWrite(zl5011xParams,
           ZL5011X_TM_CONTROL, bits, bitMask);
   }

   return(status);
}

/*******************************************************************************

 Function:
    zl5011xTmWriteLookUpRam

 Description:
   The lookup RAM must be disabled before the host can access it.

 Inputs:
   zl5011xParams   Pointer to the structure for this device instance
   flow           flow type - this is used as the address within the lookup
                  RAM when programming the flow.
   srcPort        used to determine the lookup RAM to be accessed
   destPort       the required destination for the flow type from this port.

 Outputs:
    None

 Returns:
   zlStatusE