zl5011xcpu.c

Zalink50114----TDMoIP芯片驱动源码

   ZL5011X_TRACE(ZL5011X_CPU_FN_ID,"zl5011xCpuDmaPRHRead: ", 0, 0, 0, 0, 0, 0);

   if (status == ZL5011X_OK)
   {
     /* Now read PRH words and only set the fields corresponding to the
        appropriate word                                                      */
     switch(prhWordToExtract)
     {
       case 0: /* PRH word 0 */
         *packetLength = (Uint16T)((regValue >> ZL5011X_PKT_LEN_SHIFT) & ZL5011X_PKT_LEN_MASK);
         *queueNumber = (zl5011xQueueE)((regValue >> ZL5011X_QUEUE_ID_SHIFT) & ZL5011X_QUEUE_ID_MASK);
       break;

       case 1: /* PRH word 1 */
         *nextPacketOffset = (Uint16T)((regValue >> ZL5011X_NXT_PKT_SHIFT) & ZL5011X_NXT_PKT_MASK);
         *rxResource = (Uint16T)((regValue >> ZL5011X_RX_RESOURCE_SHIFT) & ZL5011X_RX_RESOURCE_MASK);
       break;

       case 2: /* PRH word 2 */
          /* Nothing to read in this field */
       break;

       case 3: /* PRH word 3 */
         *sequenceNumber = (Uint16T)((regValue >> ZL5011X_SEQ_NO_SHIFT) & ZL5011X_SEQ_NO_MASK);
         *parity = (Uint16T)((regValue >> ZL5011X_PRH_PARITY_SHIFT) & ZL5011X_PRH_PARITY_MASK);
       break;

       default:  /* This case should never occur */
         *rxResource = 0;
         *packetLength = 0;
         *queueNumber = ZL5011X_QUEUE_0;
         *nextPacketOffset = 0;
         *sequenceNumber = 0;
         *parity = 0;
       break;
     }
   }
}

/*******************************************************************************

 Function:
   zl5011xCpuDmaTmRegsWrite

 Description:
   This function is used to write the PTH to the TM word registers, and submit
   the transmit request to the Task Manager. This can be done in one or two
   stages.

 Inputs:
   zl5011xParams      Pointer to the structure for this device instance
   updateParamsFlag  Any of: ZL5011X_TRUE (Load PTH supplied into Task Manager
                                         registers),
                             ZL5011X_FALSE (Ignore  PTH supplied [ptr may be
                                          NULL])
   submitFlag        Any of: ZL5011X_TRUE (Submit PTH [just or previously loaded]
                                         to Task Manager),
                             ZL5011X_FALSE (Do not submit PTH to Task Manager).
   pth               Array containing PTH to load
 Outputs:
   None

 Returns:
   zlStatusE

 Remarks:
   This function is not intended to be used in normal chip operation.

*******************************************************************************/
extern zlStatusE zl5011xCpuDmaTmRegsWrite(zl5011xParamsS* zl5011xParams,
                                               zl5011xBooleanE updateParamsFlag,
                                               zl5011xBooleanE submitFlag,
                                               Uint32T *pth)
{
   zlStatusE status = ZL5011X_OK;

   ZL5011X_TRACE(ZL5011X_CPU_FN_ID,"zl5011xCpuDmaTmRegsWrite: ", 0, 0, 0, 0, 0, 0);

   if (updateParamsFlag == ZL5011X_TRUE)
   {
     status = zl5011xWrite(zl5011xParams,ZL5011X_CPU_TM_WORD1,pth[0]);

     if (status == ZL5011X_OK)
     {
       status = zl5011xWrite(zl5011xParams,ZL5011X_CPU_TM_WORD2,pth[1]);
     }

     if (status == ZL5011X_OK)
     {
       status = zl5011xWrite(zl5011xParams,ZL5011X_CPU_TM_WORD3,pth[2]);
     }

     if (status == ZL5011X_OK)
     {
       status = zl5011xWrite(zl5011xParams,ZL5011X_CPU_TM_WORD4,pth[3]);
     }
   }

   if ((submitFlag == ZL5011X_TRUE) && (status == ZL5011X_OK))
   {
     status = zl5011xWrite(zl5011xParams,ZL5011X_CPU_TM_SUBMIT,ZL5011X_1BIT_MASK);
   }

   return(status);

}

/*******************************************************************************

 Function:
   zl5011xCpuDmaCpqRegsWrite

 Description:
   This function is used to set the CPQ head pointer with the address of a
   new granule, and to inform the CPQ block how many granules have been
   read. This is done by writing to the update register, and submitting the
   update request to the CPQ in one or two stages.

 Inputs:
   zl5011xParams      Pointer to the structure for this device instance
   updateParamsFlag  Any of: ZL5011X_TRUE (Load parameters supplied into the CPQ
                                         update register),
                             ZL5011X_FALSE (Ignore  parameters supplied)
   submitFlag        Any of: ZL5011X_TRUE (Submit Update request)
                             ZL5011X_FALSE (Do not submit update request)
   nextGranulePtr    Address of next granule (that will become the new head of
                     queue)
   numGranulesRead   Number of granules read

 Output
   None

 Returns:
   zlStatusE

 Remarks:
   This function is not intended to be used in normal chip operation.

*******************************************************************************/
extern zlStatusE zl5011xCpuDmaCpqRegsWrite(zl5011xParamsS* zl5011xParams,
                                               zl5011xBooleanE updateParamsFlag,
                                               zl5011xBooleanE submitFlag,
                                               Uint32T nextGranulePtr,
                                               Uint32T numGranulesRead)
{
   zlStatusE status = ZL5011X_OK;
   Uint32T regValue;

   ZL5011X_TRACE(ZL5011X_CPU_FN_ID,"zl5011xCpuDmaCpqRegsWrite: ", 0, 0, 0, 0, 0, 0);

   if (updateParamsFlag == ZL5011X_TRUE)
   {
     regValue = ((nextGranulePtr & ZL5011X_NEXT_GRANULE_PTR_MASK) <<
                                          ZL5011X_NEXT_GRANULE_PTR_SHIFT) |
                ((numGranulesRead & ZL5011X_NUM_GRANULE_READ_MASK) <<
                                          ZL5011X_NUM_GRANULE_READ_SHIFT);

     status = zl5011xWrite(zl5011xParams,ZL5011X_CPU_CPQ_UPDATE,regValue);
   }

   if ((submitFlag == ZL5011X_TRUE) && (status == ZL5011X_OK))
   {
     status = zl5011xWrite(zl5011xParams,ZL5011X_CPU_CPQ_SUBMIT,ZL5011X_1BIT_MASK);
   }

   return(status);

}

/*******************************************************************************

 Function:
   zl5011xCpuDmaCpqRegRead

 Description:
   This function is used to read the CPQ head register.

 Inputs:
   zl5011xParams      Pointer to the structure for this device instance

 Outputs:
   headPtr           Pointer to granule at the head of the queue

 Returns:
   zlStatusE

 Remarks:
   This function is not intended to be used in normal chip operation.

*******************************************************************************/
extern zlStatusE zl5011xCpuDmaCpqRegRead(zl5011xParamsS* zl5011xParams,
                                               Uint32T *headPtr)
{
   zlStatusE status = ZL5011X_OK;

   ZL5011X_TRACE(ZL5011X_CPU_FN_ID,"zl5011xCpuDmaCpqRegRead: ", 0, 0, 0, 0, 0, 0);

   status = zl5011xRead(zl5011xParams,ZL5011X_CPU_CPQ_HEAD,headPtr);

   *headPtr = *headPtr & ZL5011X_NEXT_GRANULE_PTR_MASK;

   return(status);

}

/*******************************************************************************

 Function:
   zl5011xCpuDmaGmRegsWrite

 Description:
   This function is used to free granules that contained CPU packets. It is done
   by specifying the head, and tail pointers, and number of granules in the
   chain to freed, and submitting the update request. Updates may be performed
   in one or two stages.

 Inputs:
   zl5011xParams      Pointer to the structure for this device instance
   updateParamsFlag  Any of: ZL5011X_TRUE (Load parameters supplied into the CPQ
                                         update register),
                             ZL5011X_FALSE (Ignore parameters supplied)
   submitFlag        Any of: ZL5011X_TRUE (Submit Update request)
                             ZL5011X_FALSE (Do not submit update request)
   headGranulePtr    Address of head granule
   tailGranulePtr    Address of tail granule
   numOfGranules     Number of granules to free

 Outputs:
   None

 Returns:
   zlStatusE

 Remarks:
   This function is not intended to be used in normal chip operation.

*******************************************************************************/
extern zlStatusE zl5011xCpuDmaGmRegsWrite(zl5011xParamsS* zl5011xParams,
                                               zl5011xBooleanE updateParamsFlag,
                                               zl5011xBooleanE submitFlag,
                                               Uint32T headGranulePtr,
                                               Uint32T tailGranulePtr,
                                               Uint32T numOfGranules)
{
   zlStatusE status = ZL5011X_OK;
   Uint32T regValue;

   ZL5011X_TRACE(ZL5011X_CPU_FN_ID,"zl5011xCpuDmaGmRegsWrite: ", 0, 0, 0, 0, 0, 0);

   if (updateParamsFlag == ZL5011X_TRUE)
   {
     regValue = (headGranulePtr & ZL5011X_GM_RLS_HEAD_MASK ) <<
                                          ZL5011X_GM_RLS_HEAD_SHIFT;

     status = zl5011xWrite(zl5011xParams,ZL5011X_CPU_GM_RLS_HEAD,regValue);

     if (status == ZL5011X_OK)
     {
       regValue = ((tailGranulePtr & ZL5011X_GM_RLS_TAIL_MASK) <<
                                           ZL5011X_GM_RLS_TAIL_SHIFT) |
                  ((numOfGranules & ZL5011X_GM_RLS_CNT_MASK) <<
                                           ZL5011X_GM_RLS_CNT_SHIFT);
       status = zl5011xWrite(zl5011xParams,ZL5011X_CPU_GM_RLS_TAIL,regValue);
     }
   }

   if ((submitFlag == ZL5011X_TRUE) && (status == ZL5011X_OK))
   {
     status = zl5011xWrite(zl5011xParams,ZL5011X_CPU_GM_RLS_SUBMIT,ZL5011X_1BIT_MASK);
   }

   return(status);

}

/*******************************************************************************

 Function:
   zl5011xCpuDmaGmRegRead

 Description:
   This function is used to read the GM free granule register, to obtain a
   free granule.

 Inputs:
   zl5011xParams      Pointer to the structure for this device instance

 Outputs:
   freePtr           Pointer to a free granule

 Returns:
   zlStatusE

 Remarks:
   This function is not intended to be used in normal chip operation.

*******************************************************************************/
extern zlStatusE zl5011xCpuDmaGmRegRead(zl5011xParamsS* zl5011xParams,
                                               Uint32T *freePtr)
{
   zlStatusE status = ZL5011X_OK;

   ZL5011X_TRACE(ZL5011X_CPU_FN_ID,"zl5011xCpuDmaGmRegRead: ", 0, 0, 0, 0, 0, 0);

   status = zl5011xRead(zl5011xParams,ZL5011X_CPU_GM_GRN_PTR,freePtr);

   *freePtr = *freePtr & ZL5011X_GM_RLS_HEAD_MASK;

   return(status);
}

/*****************   STATIC FUNCTION DEFINTIONS   *****************************/

/*******************************************************************************

 Function:
   zl5011xCpuDmaStoreConstatRegister

 Description:
   This function will perform a read and / or write on the CPU constat register,
   and store the value read in the constat field of zl5011xParams. Any interrupts
   already set in the constat field will be preserved.

   The function will only perform a read and update to the constat field
   in zl5011xParams when accessType is set to ZL5011X_DMA_READ_ONLY as follows:
     1) Read the device
     2) Update the specified bits
     3) Update the constat field in zl5011xParams preserving any interrupt bits
        that are already set

   When accessType is set to ZL5011X_DMA_WRITE_ONLY, the device will perform
   an update to the constat field and write to the device using bits and bitMask
   as follows:
     1) Write the specified bits to the device (all other bits cleared)
     2) Update the constat field in zl5011xParrams, preserving any interrupt
        bits that may have been set

   When set to ZL5011X_DMA_READ_WRITE, the function will  perform a read, update
   and write procedure as follows:
     1) Read the device
     2) Update the specified bits
     3) Write to the device
     4) Update the constat field in zl5011xParams, preserving any interrupt bits
        that are set

 Inputs:
   zl5011xParams      Pointer to the structure for this device instance
   bits              Bits to set in the device and constat register
   bitMask           Mask for bits to be written
   accessType        Any of: ZL5011X_DMA_READ_ONLY,
                             ZL5011X_DMA_WRITE_ONLY,
                             ZL5011X_DMA_READ_WRITE
 Outputs:
   None

 Returns:
   zlStatusE

 Remarks:

*******************************************************************************/

static zlStatusE zl5011xCpuDmaStoreConstatRegister(zl5011xParamsS *zl5011xParams,
     Uint32T bits,Uint32T bitMask,zl5011xDmaDeviceAccessTypeE accessType)
{
    Uint32T tmp=0,intBitMask = (ZL5011X_1BIT_MASK << ZL5011X_DMA_TX_INTERRUPT_BIT) |
                          (ZL5011X_1BIT_MASK << ZL5011X_DMA_RX_INTERRUPT_BIT) |
                          (ZL5011X_1BIT_MASK << ZL5011X_DMA_STOP_ERROR_FLAG_BIT) |
                          (ZL5011X_1BIT_MASK << ZL5011X_DMA_START_ERROR_FLAG_BIT);
    zlStatusE status = ZL5011X_OK;

    ZL5011X_TRACE(ZL5011X_CPU_FN_ID,
                       "zl5011xCpuDmaStoreConstatRegister: ", 0, 0, 0, 0, 0, 0);

    if ((accessType == ZL5011X_DMA_READ_ONLY) ||
                                          (accessType == ZL5011X_DMA_READ_WRITE))
    {
      status = zl5011xRead(zl5011xParams,ZL5011X_CPU_CONSTAT,&tmp);
    }

    tmp = (tmp & (~bitMask)) | (bits & bitMask);

    if (status == ZL5011X_OK)
    {
      if ((accessType == ZL5011X_DMA_WRITE_ONLY) ||
                                          (accessType == ZL5011X_DMA_READ_WRITE))
      {
        status = zl5011xWrite(zl5011xParams,ZL5011X_CPU_CONSTAT,tmp);

      }

      if (status == ZL5011X_OK)
      {
        zl5011xParams->cpuIf.constat =
                          (zl5011xParams->cpuIf.constat & intBitMask) | tmp;
      }
    }

    return(status);
}

/*****************   END   ****************************************************/