zl5011xcpu.c

Zalink50114----TDMoIP芯片驱动源码

 Remarks:
   None

*******************************************************************************/
extern zlStatusE zl5011xCpuDmaSetRxControl(zl5011xParamsS *zl5011xParams,
                                   zl5011xDmaControlModeE rxControlMode)
{
   zlStatusE status = ZL5011X_OK;
   Uint32T bits,bitMask = (ZL5011X_1BIT_MASK << ZL5011X_DMA_RX_ENABLE_BIT) |
                          (ZL5011X_1BIT_MASK << ZL5011X_DMA_DREQ1_DISABLE_BIT);

   ZL5011X_TRACE(ZL5011X_CPU_FN_ID,"zl5011xCpuDmaSetRxControl: mode %d",
         rxControlMode, 0, 0, 0, 0, 0);

   switch( rxControlMode)
   {
      case ZL5011X_DMA_DISABLED:
         bits = 0;
         break;

      case ZL5011X_DMA_ENABLED:
         bits = ZL5011X_1BIT_MASK << ZL5011X_DMA_RX_ENABLE_BIT;
         break;

      default:
         bits = 0;
         status= ZL5011X_PARAMETER_INVALID;
         break;
   }

   if (status == ZL5011X_OK)
   {
      status = zl5011xCpuDmaStoreConstatRegister(zl5011xParams,bits,bitMask,
                                                         ZL5011X_DMA_READ_WRITE);

      if (status == ZL5011X_OK)
      {
        zl5011xParams->cpuDmaIf.rxControlMode= rxControlMode;
      }
   }

   return(status);
}

/*******************************************************************************

 Function:
   zl5011xCpuDmaSetTxControl

 Description:
    This function writes to the device CPU block to set the DMA Tx control mode.

 Inputs:
   zl5011xParams      Pointer to the structure for this device instance
   txControlMode     Any of: ZL5011X_DMA_DISABLED,
                             ZL5011X_DMA_ENABLED

 Outputs:
   None

 Returns:
   zlStatusE

 Remarks:
   None

*******************************************************************************/
extern zlStatusE zl5011xCpuDmaSetTxControl(zl5011xParamsS *zl5011xParams,
                                   zl5011xDmaControlModeE txControlMode)
{
   zlStatusE status = ZL5011X_OK;
   Uint32T bits,bitMask = (ZL5011X_1BIT_MASK << ZL5011X_DMA_TX_ENABLE_BIT) |
                          (ZL5011X_1BIT_MASK << ZL5011X_DMA_DREQ0_DISABLE_BIT);

   ZL5011X_TRACE(ZL5011X_CPU_FN_ID,"zl5011xCpuDmaSetTxControl: mode %d",
         txControlMode, 0, 0, 0, 0, 0);
   switch( txControlMode)
   {
      case ZL5011X_DMA_DISABLED:
         bits = 0;
         break;

      case ZL5011X_DMA_ENABLED:
         bits = ZL5011X_1BIT_MASK << ZL5011X_DMA_TX_ENABLE_BIT;
         break;

      default:
         bits = 0;
         status = ZL5011X_PARAMETER_INVALID;
         break;
   }
   if (status == ZL5011X_OK)
   {
      status = zl5011xCpuDmaStoreConstatRegister(zl5011xParams,bits,bitMask,
                                                         ZL5011X_DMA_READ_WRITE);

      if (status == ZL5011X_OK)
      {
         zl5011xParams->cpuDmaIf.txControlMode= txControlMode;
      }
   }
   return(status);
}


/*******************************************************************************

 Function:
    zl5011xCpuDmaGetRxStatus

 Description:
    This function returns the ID of the active queue and whether it is
    enabled/busy or not.

 Inputs:
    zl5011xParams      Pointer to the structure for this device instance

 Outputs:
   pQueueId          queue ID
   pRxMode           ZL5011X_DMA_ENABLED (=busy) or
                     ZL5011X_DMA_DISABLED (=idle)
   pDebugDmaRxBusy   An internal state indicator flag (for system debug only)


 Returns:
   zlStatusE

 Remarks:
    None

*******************************************************************************/
extern zlStatusE zl5011xCpuDmaGetRxStatus( zl5011xParamsS *zl5011xParams,
                                   zl5011xQueueE *pQueueId,
                                   zl5011xDmaControlModeE *pRxControlMode,
                                   zl5011xBooleanE  *pDebugDmaRxBusy)
{
   zlStatusE status = ZL5011X_OK;
   Uint32T bits=0,bitMask=0; /* Read and set constat register only            */

   ZL5011X_TRACE(ZL5011X_CPU_FN_ID,"zl5011xCpuDmaGetRxStatus: ", 0, 0, 0, 0, 0, 0);

   status = zl5011xCpuDmaStoreConstatRegister(zl5011xParams,bits,bitMask,
                                                         ZL5011X_DMA_READ_ONLY);
   if(status == ZL5011X_OK)
   {
      *pQueueId = (zl5011xQueueE)((zl5011xParams->cpuIf.constat >> ZL5011X_DMA_QUEUE_ID_LSB) & ZL5011X_2BIT_MASK);
      *pDebugDmaRxBusy = (zl5011xBooleanE)((zl5011xParams->cpuIf.constat >> ZL5011X_DMA_GIF_RX_BUSY_BIT) & ZL5011X_1BIT_MASK);

      if(((zl5011xParams->cpuIf.constat & (ZL5011X_1BIT_MASK <<
                                                ZL5011X_DMA_RX_ENABLE_BIT))) > 0)
      {
         *pRxControlMode =  ZL5011X_DMA_ENABLED;
      }
      else
      {
         *pRxControlMode =  ZL5011X_DMA_DISABLED;
      }
   }

   ZL5011X_TRACE(ZL5011X_CPU_FN_ID, "zl5011xCpuDmaGetRxStatus: queue %d, mode %d, busy %d",
         *pQueueId, *pRxControlMode, *pDebugDmaRxBusy, 0, 0, 0);

   return(status);
}

/*******************************************************************************
 Function:
    zl5011xCpuSetTimeoutPeriod

 Description:
    This function sets the timeout in units of clock periods

 Inputs:
    zl5011xParams      Pointer to the structure for this device instance
    clockPeriod       timeout in clock periods

 Outputs:

 Returns:
   zlStatusE

 Remarks:

*******************************************************************************/
extern zlStatusE zl5011xCpuSetTimeoutPeriod(zl5011xParamsS *zl5011xParams, Uint8T clockPeriod)
{
   zlStatusE status = ZL5011X_OK;
   Uint32T bits= clockPeriod;
   Uint32T bitMask= 0x000000FF; /* This is an 8 bit number                    */

   ZL5011X_TRACE(ZL5011X_CPU_FN_ID,"zl5011xCpuSetTimeoutPeriod: %d",
         clockPeriod, 0, 0, 0, 0, 0);

   status = zl5011xReadModWrite(
                           zl5011xParams,ZL5011X_CPU_TIMEOUT_PERIOD,bits,bitMask);

   zl5011xParams->cpuDmaIf.clockPeriod= clockPeriod;
   return(status);
}

/*******************************************************************************
 Function:
    zl5011xCpuDmaGetRxSeqNum

 Description:
   Indicates the sequence number of the last packet transferred to the host.
   This can be used to determine if more packets are ready to be processed.

 Inputs:
   zl5011xParams      Pointer to the structure for this device instance

 Outputs:
   sequenceNumber    seq no read from device

 Returns:
   zlStatusE

 Remarks:
   None
*******************************************************************************/
extern zlStatusE zl5011xCpuDmaGetRxSeqNum(zl5011xParamsS *zl5011xParams, Uint16T *sequenceNumber)
{

   zlStatusE status;
   Uint32T readValue;

   ZL5011X_TRACE(ZL5011X_CPU_FN_ID,"zl5011xCpuDmaGetRxSeqNum: ", 0, 0, 0, 0, 0, 0);

   status = zl5011xRead(zl5011xParams, ZL5011X_CPU_RX_SEQ_NO, &readValue);

   *sequenceNumber = (Uint16T)(readValue & ZL5011X_DMA_RX_SEQ_NUM_MASK);

   return status;
}

/*******************************************************************************
 Function:
    zl5011xCpuDmaSetDreqPolarity

 Description:
   sets the Dreq line to the Host as active High or Low

 Inputs:
   zl5011xParams      Pointer to the structure for this device instance
   polarity          ZL5011X_NEGATIVE for active LOW, and
                     ZL5011X_POSITIVE for active HIGH

 Returns:
   zlStatusE

 Remarks:
   None
*******************************************************************************/
extern zlStatusE zl5011xCpuDmaSetDreqPolarity(zl5011xParamsS *zl5011xParams,
                                                      zl5011xPolarityE polarity)
{
   zlStatusE status = ZL5011X_OK;
   Uint32T bits,bitMask = ZL5011X_1BIT_MASK << ZL5011X_DMA_DREQ_SENSE;

   ZL5011X_TRACE(ZL5011X_CPU_FN_ID,"zl5011xCpuDmaSetDreqPolarity: polarity %d ",
         polarity, 0, 0, 0, 0, 0);

   if(status == ZL5011X_OK)
   {
      status= ZL5011X_CHECK_POLARITY( polarity);
   }
   if(status == ZL5011X_OK)
   {
      if( polarity== ZL5011X_POSITIVE)
      {
         bits = ZL5011X_1BIT_MASK << ZL5011X_DMA_DREQ_SENSE;
      }
      else
      {
         bits = 0;
      }

      status = zl5011xCpuDmaStoreConstatRegister(zl5011xParams,bits,bitMask,
                                                        ZL5011X_DMA_READ_WRITE);

      if (status == ZL5011X_OK)
      {
         /* update structure */
         zl5011xParams->cpuDmaIf.dreqPolarity= polarity;
      }
   }

   return status;
}

/*******************************************************************************
 Function:
    zl5011xCpuDmaSetDackPolarity

 Description:
   sets the Dack line to the Host as active High or Low

 Inputs:
   zl5011xParams      Pointer to the structure for this device instance
   polarity          ZL5011X_NEGATIVE for active LOW, and
                     ZL5011X_POSITIVE for active HIGH

 Returns:
   zlStatusE

 Remarks:
   None
*******************************************************************************/
extern zlStatusE zl5011xCpuDmaSetDackPolarity(zl5011xParamsS *zl5011xParams, zl5011xPolarityE polarity)
{
   zlStatusE status = ZL5011X_OK;
   Uint32T bits,bitMask = ZL5011X_1BIT_MASK << ZL5011X_DMA_DACK_SENSE;

   ZL5011X_TRACE(ZL5011X_CPU_FN_ID,"zl5011xCpuDmaSetDackPolarity: polarity %d ",
         polarity, 0, 0, 0, 0, 0);

   if(status == ZL5011X_OK)
   {
      status= ZL5011X_CHECK_POLARITY( polarity);
   }

   if(status == ZL5011X_OK)
   {
      if(polarity == ZL5011X_POSITIVE)
      {
         bits = ZL5011X_1BIT_MASK << ZL5011X_DMA_DACK_SENSE;
      }
      else
      {
         bits = 0;
      }

      status = zl5011xCpuDmaStoreConstatRegister(zl5011xParams,bits,bitMask,
                                                        ZL5011X_DMA_READ_WRITE);

      if (status == ZL5011X_OK)
      {
         /* update structure */
         zl5011xParams->cpuDmaIf.dackPolarity= polarity;
      }
   }

   return status;
}

/*******************************************************************************
 Function:
    zl5011xCpuDmaSetPadding

 Description:
   sets whether DMA output message padding is in multiples of 32, 64 bytes, or
   not active
 Inputs:
   zl5011xParams      Pointer to the structure for this device instance
   padding           Can be one of 3 states: 64bytes, 32bytes, no-Padding.

 Returns:
   zlStatusE

 Remarks:
   None

*******************************************************************************/
extern zlStatusE zl5011xCpuDmaSetPadding(zl5011xParamsS *zl5011xParams,
                                                  zl5011xDmaMsgPaddingE padding)
{
   zlStatusE status = ZL5011X_OK;
   Uint32T bits,bitMask= (ZL5011X_1BIT_MASK << ZL5011X_DMA_OUT_PADDING_64)|
                         (ZL5011X_1BIT_MASK << ZL5011X_DMA_OUT_PADDING_DISABLE);
   ZL5011X_TRACE(ZL5011X_CPU_FN_ID,"zl5011xCpuDmaSetPadding: padding %d ",
         padding, 0, 0, 0, 0, 0);

   if(status == ZL5011X_OK)
   {
      status= ZL5011X_CHECK_DMA_PADDING( padding);
   }
   if(status == ZL5011X_OK)
   {
      switch( padding)
      {
         case  ZL5011X_DMA_64BYTE_PADDING:
            bits= ZL5011X_1BIT_MASK << ZL5011X_DMA_OUT_PADDING_64;
            break;

         case ZL5011X_DMA_32BYTE_PADDING:
            bits= 0;
            break;

         case  ZL5011X_DMA_NO_PADDING:
            bits= (ZL5011X_1BIT_MASK << ZL5011X_DMA_OUT_PADDING_DISABLE);
            break;

         default:
            bits = 0;
            status = ZL5011X_PARAMETER_INVALID;
            break;
      }

      if (status == ZL5011X_OK)
      {
         status = zl5011xCpuDmaStoreConstatRegister(zl5011xParams,bits,bitMask,
                                                        ZL5011X_DMA_READ_WRITE);
      }