zl5011x.h

Zalink50114----TDMoIP芯片驱动源码

    Uint32T wanTxSeqNumber;
 } zl5011xPacDiffStatsS;

/******************/

#define ZL5011X_CHECK_WAN_TX_TIMESTAMP(X) \
            ((X < ZL5011X_WAN_TX_TIMESTAMP_8) || (X > ZL5011X_WAN_TX_TIMESTAMP_16)) ? \
               ZL5011X_PARAMETER_INVALID : ZL5011X_OK
typedef enum
{
   ZL5011X_WAN_TX_TIMESTAMP_8,
   ZL5011X_WAN_TX_TIMESTAMP_16
} zl5011xWanTxTimestampSizeE;

/******************/

#define ZL5011X_CHECK_WAN_PRS_FREQ(X) \
            ((X < ZL5011X_WAN_PRS_FREQ_8HZ) || (X > ZL5011X_WAN_PRS_FREQ_DISABLED)) ? \
               ZL5011X_PARAMETER_INVALID : ZL5011X_OK
typedef enum
{
   ZL5011X_WAN_PRS_FREQ_8HZ = 0,
   ZL5011X_WAN_PRS_FREQ_4HZ = 1,
   ZL5011X_WAN_PRS_FREQ_2HZ = 2,
   ZL5011X_WAN_PRS_FREQ_1HZ = 3,
   ZL5011X_WAN_PRS_FREQ_0_5HZ = 4,
   ZL5011X_WAN_PRS_FREQ_0_25HZ = 5,
   ZL5011X_WAN_PRS_FREQ_0_125HZ = 6,
   ZL5011X_WAN_PRS_FREQ_DISABLED = 7
} zl5011xWanAsyncIntFreqE;

/******************/

#define ZL5011X_CHECK_WAN_RTP_INCREMENT(X) \
         ((X < ZL5011X_WAN_RTP_INCREMENT_FRAME) || (X > ZL5011X_WAN_RTP_INCREMENT_BIT)) ? \
               ZL5011X_PARAMETER_INVALID : ZL5011X_OK
typedef enum
{
   ZL5011X_WAN_RTP_INCREMENT_FRAME = 0x0,
   ZL5011X_WAN_RTP_INCREMENT_EIGHT_BYTES = 0x1,
   ZL5011X_WAN_RTP_INCREMENT_BYTE  = 0x2,
   ZL5011X_WAN_RTP_INCREMENT_BIT = 0x3
} zl5011xWanRtpIncrementTypeE;

/******************/

#define ZL5011X_CHECK_WAN_ASYNC_DATA_COLLECTION(X) \
         ((X < ZL5011X_WAN_ASYNC_DISABLED) || (X > ZL5011X_WAN_ASYNC_TRANSIT_TIME)) ? \
               ZL5011X_PARAMETER_INVALID : ZL5011X_OK

typedef enum
{
   ZL5011X_WAN_ASYNC_DISABLED,
   ZL5011X_WAN_ASYNC_DIFF,
   ZL5011X_WAN_ASYNC_TRANSIT_TIME
} zl5011xWanAsyncDataCollectionE;

/******************/

#define ZL5011X_CHECK_WAN_ASYNC_CLOCK_TX_MODE(X) \
         ((X < ZL5011X_WAN_ASYNC_CLOCK_FROM_RX) || (X > ZL5011X_WAN_ASYNC_CLOCK_DCO_NORMAL)) ? \
               ZL5011X_PARAMETER_INVALID : ZL5011X_OK

typedef enum
{
   ZL5011X_WAN_ASYNC_CLOCK_FROM_RX = 0x0,
   ZL5011X_WAN_ASYNC_CLOCK_DCO_NORMAL = 0x1
} zl5011xWanAsyncClockTxModeE;

/******************/

typedef struct
{
   /* the current seting of the DCO in 1/1000th of a PPM */
   Sint32T dcoPpmOffset_x_1000;

   /* clock recovery setup information */
   zl5011xWanTxTimestampSizeE timestampSize;
   zl5011xWanTxQueueOperationE sequenceSize;
   zl5011xBooleanE ignoreLatePackets;
   Uint8T averageMode;

   /* the s/w part of the Wan Rx bit count - this extends the count to 64 bits.
      The Lo count is used to record the h/w count when last read and is used to
      detect counter rollover */
   Uint32T rxBitCountHi;
   Uint32T lastRxBitCountLo;

   /* what mode of data collection is being used with this stream */
   zl5011xWanAsyncDataCollectionE dataMode;

   zl5011xWanAsyncClockTxModeE txClockMode;
   zl5011xBooleanE wanRtpJitterCalcEnable;

   /* The RTP timestamp mode, used for the PAC jitter calculations */
   zl5011xWanRtpIncrementTypeE rtpIncrementType;

   /* The number of bits that the RTP timestamp increment mode corresponds to
      is calculated and stored in the structure. This is used in the
      calculation to determine the RTP timestamp from the line rate count, for
      the Tx timestamp (Wan->Pkt) */
   Uint32T rtpBitIncrement;

   /* stream dependent DCO settings */
   Uint32T streamFrequency;
   Uint32T streamNominalCount;
   Uint32T streamCountPerPpm_x_100;
} zl5011xWanAsyncStreamS;

/******************/

typedef struct
{
   zl5011xWanAsyncStreamS stream[ZL5011X_MAX_NUMBER_STREAMS];
   zl5011xWanAsyncIntFreqE interruptFreq;
   Uint32T prsRefFreqHz;
   Uint32T prsRefDivider;
   Uint32T prsToRtpFreqHz;

   /* The following are effectively constants calculated at device
      initialisation and represent the maximum stream frequency.
      Each stream can use different values apart from the divider
      ratio which is common to all streams. */
   Uint32T dcoDivideRatio;
   Uint32T dcoNominalCount;
   Uint32T dcoCountPerPpm_x_100;
} zl5011xWanAsyncConfigS;

/******************/

/* sync configuration - DPLL */
typedef enum
{
   ZL5011X_WAN_PRIMARY_REF,
   ZL5011X_WAN_SECONDARY_REF,
   ZL5011X_WAN_STREAM_REF
} zl5011xDpllRefSourceE;

/******************/

#define ZL5011X_CHECK_WAN_REF_FREQ(X) \
         ((X < ZL5011X_WAN_REF_FREQ_8K) || (X > ZL5011X_WAN_REF_FREQ_USER_DEFINED)) ? \
               ZL5011X_PARAMETER_INVALID : ZL5011X_OK

typedef enum
{
   ZL5011X_WAN_REF_FREQ_8K,
   ZL5011X_WAN_REF_FREQ_64K,
   ZL5011X_WAN_REF_FREQ_1_544M,
   ZL5011X_WAN_REF_FREQ_2_048M,
   ZL5011X_WAN_REF_FREQ_4_096M,
   ZL5011X_WAN_REF_FREQ_6_312M,
   ZL5011X_WAN_REF_FREQ_8_192M,
   ZL5011X_WAN_REF_FREQ_16_384M,
   ZL5011X_WAN_REF_FREQ_34_368M,
   ZL5011X_WAN_REF_FREQ_USER_DEFINED
} zl5011xWanIfRefFreqE;

/******************/

typedef struct
{
   zl5011xDpllRefSourceE source;
   Uint8T stream;

   /* if an external reference is used, then the frequency of this
      is provided using the following variable */
   zl5011xWanIfRefFreqE refFreq;
   Uint32T userDefinedFreqHz;
} zl5011xRefClkConfigS;

/******************/

#define ZL5011X_CHECK_DPLL_PRIORITY(X) \
            ((X == ZL5011X_DPLL_NO_PRIORITY) || (X == ZL5011X_DPLL_PRIMARY_PRIORITY) || \
            (X ==ZL5011X_DPLL_SECONDARY_PRIORITY) || (X == ZL5011X_DPLL_PRIMARY_ONLY) || \
            (X == ZL5011X_DPLL_SECONDARY_ONLY)) ? \
                  ZL5011X_OK : ZL5011X_PARAMETER_INVALID
typedef enum
{
   ZL5011X_DPLL_NO_PRIORITY = 0,
   ZL5011X_DPLL_PRIMARY_PRIORITY = 1,
   ZL5011X_DPLL_SECONDARY_PRIORITY = 3,
   ZL5011X_DPLL_PRIMARY_ONLY = 5,
   ZL5011X_DPLL_SECONDARY_ONLY = 7
} zl5011xDpllRefPriorityE;

/******************/

#define ZL5011X_CHECK_DPLL_MODE(X) \
            ((X < ZL5011X_DPLL_AUTOMATIC_OPERATION) || (X > ZL5011X_DPLL_FREERUN_OPERATION)) ? \
                  ZL5011X_PARAMETER_INVALID : ZL5011X_OK
typedef enum
{
   ZL5011X_DPLL_AUTOMATIC_OPERATION = 0,
   ZL5011X_DPLL_NORMAL_OPERATION = 1,
   ZL5011X_DPLL_HOLDOVER_OPERATION = 2,
   ZL5011X_DPLL_FREERUN_OPERATION = 3
} zl5011xDpllOperationE;

/******************/

/* ZL5011X_DPLL_NOT_USED is async mode, and is not a valid DPLL mode */
#define ZL5011X_CHECK_DPLL_CONFIG_MODE(X) \
            ((X < ZL5011X_DPLL_SLAVE_CONNECTION) || (X > ZL5011X_DPLL_EXTERNAL_CONNECTION)) ? \
                  ZL5011X_PARAMETER_INVALID : ZL5011X_OK
typedef enum
{
   ZL5011X_DPLL_SLAVE_CONNECTION,
   ZL5011X_DPLL_MASTER_CONNECTION,
   ZL5011X_DPLL_EXTERNAL_CONNECTION
} zl5011xDpllConnectionE;

/******************/

/* input frequency of reference to DPLL block */
typedef enum
{
   ZL5011X_DPLL_8K_REF       = 0,
   ZL5011X_DPLL_64K_REF      = 1,
   ZL5011X_DPLL_2_048M_REF    = 2,
   ZL5011X_DPLL_4_096M_REF    = 3,
   ZL5011X_DPLL_8_192M_REF    = 4,
   ZL5011X_DPLL_16_384M_REF   = 5,
   ZL5011X_DPLL_1_544M_REF    = 6,
   ZL5011X_DPLL_6_312M_REF    = 7
} zl5011xDpllRefInputFreqE;

/******************/

typedef struct
{
   Uint16T singlePeriodHigh;
   Uint16T singlePeriodLow;

   Uint16T multiPeriodCount;
   Uint32T multiPeriodHigh;
   Uint32T multiPeriodLow;
} zl5011xDpllRefCheckS;

/* structure to hold the DPLL configuration - sync mode */
typedef struct
{
   zl5011xDpllConnectionE dpllConfig;
   zl5011xBooleanE dpllOutputEnable;
   zl5011xDpllRefPriorityE priority;
   zl5011xRefClkConfigS primaryRef;
   zl5011xRefClkConfigS secondaryRef;

   zl5011xDpllRefInputFreqE refInputFreq;
   Uint32T refInputFreqHz;
   zl5011xBooleanE mtie;

   /* there are two entries in the following array
         - entry 0 is for the primary reference
         - entry 1 is for the secondary reference */
   zl5011xDpllRefCheckS refCheck[2];

   Uint32T dpllCentreCount;
   Uint32T dpllLockRange;
   Uint32T dpllSlewRate;
   Uint8T dpllBandwidth;
   Uint16T dpllLockDetectThreshold;
   Uint32T dpllLockDetectTimeUs;
} zl5011xWanSyncConfigS;

/******************/

/* structure to hold the async and sync settings - they are exclusive, so
   could be defined as a union if required.*/
typedef struct
{
   /* the following variables control how the delay lines in the PAC block
      are calibrated */
   zl5011xBooleanE tdlJitterReductionEnable;
   Uint8T tdlJitterReductionMode;

   /* settings for the sync and async clock modes */
   zl5011xWanAsyncConfigS async;
   zl5011xWanSyncConfigS sync;
} zl5011xWanClockConfigS;

/******************************************************************************
 * structure used for the Wan interface
 ******************************************************************************/

typedef struct
{
   /* record of the WAN interface mode */
   zl5011xWanIfTypeE wanMode;
   zl5011xWanLiuFreqE wanLiuFreq;

   /* Maximum number of channels / streams for the current mode */
   Uint8T wanNumStreams;
   Uint8T wanNumChannels;

   /* current WAN setup information*/
   zl5011xWanIfConnectionTypeE wanConnectionMode;
   zl5011xWanIfClockRateE wanClockMultiply;
   zl5011xWanIfSamplePointE wanSampleMode;
   zl5011xBooleanE wanBitStuffingEnabled;
   zl5011xWanIfFramePulseTypeE framePulseWidth;
   zl5011xPolarityE framePulsePolarity;
   zl5011xPolarityE refClkPolarity;
   zl5011xBooleanE reverseBitOrder;
   zl5011xWanIfOutputEnableE outputEnable;
   zl5011xWanIfDataRateE wanDataRate;
   Uint32T maxWanFrequency;

   /* the following structures hold the settings for the BER
      generate and receive function contained in the TIF block */
   zl5011xWanBerConfigS wanBerReceive;
   zl5011xWanBerConfigS wanBerGenerate;

   /* the following pairs of structures are used to track the settings
      for the TFM and the PLA. The current is used to track the device config,
      and when an update is performed, the changes are transferred
      to the active config. */
   zl5011xWanTxConfigS tfmCurrent;
   zl5011xWanTxConfigS tfmActive;

   zl5011xWanRxConfigS plaCurrent;
   zl5011xWanRxConfigS plaActive;

   /* the flow type being used for the Wan Tx context is stored */
   zl5011xFlowTypeE wanTxFlow[ZL5011X_MAX_NUMBER_CONTEXTS];

   /* the flow type being used for the Wan Rx context is stored, as is the
      queue number for the CPU */
   zl5011xFlowTypeE wanRxFlow[ZL5011X_MAX_NUMBER_CONTEXTS];
   zl5011xQueueE wanRxCpuQueue[ZL5011X_MAX_NUMBER_CONTEXTS];

   zl5011xWanClockConfigS clock;

   /* settings for the Wan Tx queue */
   Uint32T txQueueMaxNumberOfGranules;
   zl5011xWanTxQueueS txQueue[ZL5011X_MAX_NUMBER_CONTEXTS];

   /* record of bit settings in the TIF block */
   Uint32T wanIfControl;
   Uint32T inputClockPolarity[ZL5011X_NUMBER_STREAM_BIT_REGS];
   Uint32T outputClockPolarity[ZL5011X_NUMBER_STREAM_BIT_REGS];
   Uint32T channelOutputEnable[ZL5011X_NUMBER_CHANNEL_BIT_REGS];
} zl5011xWanIfS;

/******************************************************************************
 * enumerations for the various packet protocols
 ******************************************************************************/

/* Note :   if the order of the following enumerations is changed then the Rx
            packet helper functions / templates will need to be amended.
            The number of supported protocol must be kept up to date. */

#define ZL5011X_PKT_NUM_PROTOCOL_STACKS  ZL5011X_INVALID_PROTOCOL

typedef enum
{
/* Data Protocol Stacks */