zl5011xplamap.h

Zalink50114----TDMoIP芯片驱动源码

/*******************************************************************************
*
*  File name:              zl5011xPlaMap.h
*
*  Version:                8
*
*  Author:                 MRC
*
*  Date created:           28/02/2002
*
*  Copyright 2002, 2003, 2004, 2005, Zarlink Semiconductor Limited.
*  All rights reserved.
*
*  Module Description:
*
*  This is the register definitions header file for PLA block.
*  It contains the register offsets and bit field definitions.
*
*  Revision History:
*
*  Rev:  Date:       Author:  Comments:
*  1     28/02/2002  MRC      Creation
*  2     08/03/2002  MRC      Updated
*  3     16/04/2002  MRC      Changed Authur to Author in the header
*  4     11/07/2002  MRC      Updated header block.
*  5     21/10/2002  PJE      new defines for PlaEnable/DisableTmiOverflowIntr
*  6     31/10/2002  MRC      Added variants + minor fixes
*  7     09/06/2003  MRC      Added limit for zl5011xPlaReadModWrite fn
*  8     13/06/2003  PJE      new #define for bus data problem
*
*******************************************************************************/

#ifndef _ZL5011X_PLA_MAP_H
#define _ZL5011X_PLA_MAP_H

#ifdef __cplusplus
extern "C" {
#endif

/* addresses for the PLA registers */
#define ZL5011X_PLA_CONTEXT_LOOKUP    ZL5011X_PLA_BASE + 0x00000
#define ZL5011X_PLA_CONTEXT_MEMORY1   ZL5011X_PLA_BASE + 0x08000
#define ZL5011X_PLA_CONTEXT_MEMORY2   ZL5011X_PLA_BASE + 0x10000
#define ZL5011X_PLA_CONTEXT_ERROR     ZL5011X_PLA_BASE + 0x18000
#define ZL5011X_PLA_STATE_MEMORY1     ZL5011X_PLA_BASE + 0x20000
#define ZL5011X_PLA_INTERRUPT_QUEUE   ZL5011X_PLA_BASE + 0x50000
#define ZL5011X_PLA_BLOCK_ID          ZL5011X_PLA_BASE + 0x60004
#define ZL5011X_PLA_TMI_MSK_REG       ZL5011X_PLA_BASE + 0x60010
#define ZL5011X_PLA_TEST_DATA_SEL     ZL5011X_PLA_BASE + 0x60018

#define ZL5011X_PLA_RETRY_LIMIT       20

/* defines for bit fields in the registers */
#define ZL5011X_PLA_CONTEXT_MASK         (Uint32T)0x7f

/* bit positions for ZL5011X_PLA_CONTEXT_LOOKUP register */
#define ZL5011X_PLA_LKUP_MEM_SIZE        sizeof(Uint32T)

#define ZL5011X_PLA_LKUP_CTXT_ID_BITS    0
#define ZL5011X_PLA_VALID_CHAN_BIT       16
#define ZL5011X_PLA_NEW_VALID_CHAN_BIT   17
#define ZL5011X_PLA_FIRST_CHAN_BIT       18
#define ZL5011X_PLA_NEW_FIRST_CHAN_BIT   19

/* bit positions for ZL5011X_PLA_CONTEXT_MEMORY1 register */
#define ZL5011X_PLA_CTXT_MEM1_SIZE       sizeof(Uint32T)

#define ZL5011X_PLA_UPDATE_BIT           10
#define ZL5011X_PLA_TEARDOWN_BIT         11
#define ZL5011X_PLA_VALID_CTXT_BIT       12
#define ZL5011X_PLA_PKT_LENGTH_BITS      16
/* the interrupt bits are defined in zl5011xpla.h, since they are used in the
   application */

#define ZL5011X_PLA_PKT_LENGTH_MASK      (Uint32T)0x7ff

/* bit positions for ZL5011X_PLA_CONTEXT_MEMORY2 register */
#define ZL5011X_PLA_CTXT_MEM2_SIZE       sizeof(Uint32T)

#define ZL5011X_PLA_MPID_BITS            0
#define ZL5011X_PLA_FLOW_TYPE_BITS       16

#define ZL5011X_PLA_MPID_MASK            (Uint32T)0x7fff
#define ZL5011X_PLA_FLOW_TYPE_MASK       (Uint32T)0x1f

/* bit positions for ZL5011X_PLA_CONTEXT_ERROR register */
#define ZL5011X_PLA_CTXT_ERR_SIZE        sizeof(Uint32T)
/* the error bits are defined in zl5011xpla.h, since they are used in the
   application */

/* bit positions for ZL5011X_PLA_STATE_MEMORY1 register */
#define ZL5011X_PLA_STATE_MEM1_SIZE      sizeof(Uint32T)

#define ZL5011X_PLA_CTXT_SW_BIT          0

/* bit positions for ZL5011X_PLA_INTERRUPT_QUEUE register
   each access returns next entry on the queue */
#define ZL5011X_PLA_INT_QUEUE_CTXT_BITS  0


#ifdef __cplusplus
}
#endif

#endif