zl5011xtfqmap.h

Zalink50114----TDMoIP芯片驱动源码

/*******************************************************************************
*
*  File name:              zl5011xTfqMap.h
*
*  Version:                10
*
*  Author:                 MRC
*
*  Date created:           23/04/2002
*
*  Copyright 2002, 2003, 2004, 2005, Zarlink Semiconductor Limited.
*  All rights reserved.
*
*  Module Description:
*
*  This is the register definitions header file for PTX block.
*  It contains the register offsets and bit field definitions.
*
*  Revision History:
*
*  Rev:  Date:       Author:  Comments:
*  1     23/04/2002  MRC      Creation
*  2     23/04/2002  MRC      Changed Authur to Author in the header.
*  3     19/09/2002  MRC      Added max granule fn
*  4     03/10/2002  PJE      new reg addr
*  5     21/10/2002  PJE      new TfqEnable/DisableGranuleThresholdIntr
*  6     31/10/2002  MRC      Added variants + minor fixes
*  7     06/02/2003  MRC      Added TFQ reset bit
*  8     22/05/2003  MRC      Added bits for context status register
*  9     21/06/2003  MRC      Added bit positions for current queue length
*  10    26/08/2004  MRC      Added extra status register bit defines
*
*******************************************************************************/

#ifndef _ZL5011X_TFQ_MAP_H
#define _ZL5011X_TFQ_MAP_H

#ifdef __cplusplus
extern "C" {
#endif

/* addresses for the TFQ registers */
#define ZL5011X_TFQ_CTXT_STATIC_SETUP       ZL5011X_TFQ_BASE + 0x00000
#define ZL5011X_TFQ_CTXT_DYNAMIC_SETUP      ZL5011X_TFQ_BASE + 0x00004
#define ZL5011X_TFQ_CTXT_READ_POINTER       ZL5011X_TFQ_BASE + 0x00008
#define ZL5011X_TFQ_CTXT_MIN_MAX_LENGTH     ZL5011X_TFQ_BASE + 0x0000c
#define ZL5011X_TFQ_CTXT_AVG_LENGTH         ZL5011X_TFQ_BASE + 0x00010
#define ZL5011X_TFQ_CTXT_LATE_PACKETS       ZL5011X_TFQ_BASE + 0x00014
#define ZL5011X_TFQ_CTXT_EARLY_PACKETS      ZL5011X_TFQ_BASE + 0x00018
#define ZL5011X_TFQ_CTXT_UNDERRUNS          ZL5011X_TFQ_BASE + 0x0001c
#define ZL5011X_TFQ_CTXT_STATUS             ZL5011X_TFQ_BASE + 0x00020
#define ZL5011X_TFQ_INTERRUPT_QUEUE         ZL5011X_TFQ_BASE + 0x20054
#define ZL5011X_TFQ_MAX_QUEUE_SIZE          ZL5011X_TFQ_BASE + 0x20064
#define ZL5011X_TFQ_GRN_THRES_INTR_DISABLE  ZL5011X_TFQ_BASE + 0x20068
#define ZL5011X_TFQ_GRN_THRES_INTR_ACK      ZL5011X_TFQ_BASE + 0x2006C

/* the TFQ registers are grouped by context. That is, the registers for each
   context occupies 0x3F address space, so need a define to hold this */
#define ZL5011X_TFQ_CTXT_CONTROL_SIZE       (Uint32T)0x40
#define ZL5011X_TFQ_MESSAGE_SIZE_WORDS      (Uint32T)2

/* defines for bit fields in the registers */
#define ZL5011X_TFQ_CONTEXT_MASK            (Uint32T)0x7f

/* bit positions for ZL5011X_TFQ_CTXT_STATIC_SETUP register */
#define ZL5011X_TFQ_SEQUENCE_NUM_SIZE_BIT   31
#define ZL5011X_TFQ_RESUME_BIT              30
#define ZL5011X_TFQ_FLUSH_BIT               29
#define ZL5011X_TFQ_RESEQUENCE_MODE_BIT     28
#define ZL5011X_TFQ_SIZE_BITS               24
#define ZL5011X_TFQ_BASE_ADDRESS_BITS       0

#define ZL5011X_TFQ_SIZE_MASK               (Uint32T)0xf
#define ZL5011X_TFQ_BASE_ADDRESS_MASK       (Uint32T)0xfffff8

/* bit positions for ZL5011X_TFQ_CTXT_DYNAMIC_SETUP register */
#define ZL5011X_TFQ_RESTART_QUEUE_BIT       29
#define ZL5011X_TFQ_CLEAR_MAX_LENGTH_BIT    25
#define ZL5011X_TFQ_CLEAR_MIN_LENGTH_BIT    24
#define ZL5011X_TFQ_EXTEND_QUEUE_BIT        23
#define ZL5011X_TFQ_EXTEND_SIZE_BITS        12
#define ZL5011X_TFQ_REDUCE_QUEUE_BIT        11
#define ZL5011X_TFQ_REDUCE_SIZE_BITS        0

#define ZL5011X_TFQ_EXTEND_SIZE_MASK        (Uint32T)0x7ff
#define ZL5011X_TFQ_REDUCE_SIZE_MASK        (Uint32T)0x7ff

/* bit positions for ZL5011X_TFQ_CTXT_MIN_MAX_LENGTH register */
#define ZL5011X_TFQ_ACP_BITS                24
#define ZL5011X_TFQ_MAX_QUEUE_LENGTH_BITS   12
#define ZL5011X_TFQ_MIN_QUEUE_LENGTH_BITS   0

#define ZL5011X_TFQ_ACP_MASK                (Uint32T)0x1f
#define ZL5011X_TFQ_QUEUE_LENGTH_MASK       (Uint32T)0x7ff

/* bit positions for ZL5011X_TFQ_CTXT_AVG_LENGTH register */
#define ZL5011X_TFQ_AVG_LENGTH_BITS         16
#define ZL5011X_TFQ_AVG_FRACT_LENGTH_BITS   6

#define ZL5011X_TFQ_AVG_LENGTH_MASK         (Uint32T)0x7ff
#define ZL5011X_TFQ_AVG_FRACT_LENGTH_MASK   (Uint32T)0x3ff

/* bit positions for ZL5011X_TFQ_CTXT_LATE_PACKETS register */
#define ZL5011X_TFQ_LATE_PACKETS_BITS       0

#define ZL5011X_TFQ_LATE_PACKETS_MASK       (Uint32T)0xffffff

/* bit positions for ZL5011X_TFQ_CTXT_EARLY_PACKETS register */
#define ZL5011X_TFQ_EARLY_PACKETS_BITS      0

#define ZL5011X_TFQ_EARLY_PACKETS_MASK      (Uint32T)0xffffff

/* bit positions for ZL5011X_TFQ_CTXT_UNDERRUNS register */
#define ZL5011X_TFQ_UNDERRUN_BITS           0

#define ZL5011X_TFQ_UNDERRUN_MASK           (Uint32T)0xffffff

/* bit positions for ZL5011X_TFQ_CTXT_STATUS register */
#define ZL5011X_TFQ_CURR_LENGTH_BITS        18
#define ZL5011X_TFQ_QUEUE_EMPTY_BIT         17
#define ZL5011X_TFQ_SEQ_NUM_BITS            0

#define ZL5011X_TFQ_CURR_LENGTH_MASK        (Uint32T)0x7ff
#define ZL5011X_TFQ_SEQ_NUM_MASK            (Uint32T)0xffff

/* bit positions for ZL5011X_TFQ_INTERRUPT_QUEUE register */
#define ZL5011X_TFQ_INT_QUEUE_CTXT_BITS     0

/* bit positions for ZL5011X_TFQ_MAX_QUEUE_SIZE register */
#define ZL5011X_TFQ_MAX_NUM_GRANULES_BITS   0
#define ZL5011X_TFQ_MAX_NUM_GRANULES_MASK  (Uint32T)0x7ffff

/* bit position for ZL5011X_TFQ_GRN_THRES_INTR_DISABLE register */
#define ZL5011X_TFQ_GRN_THRES_INTR_BIT      0

/* bit position for the TDM queue entries */
#define ZL5011X_TFQ_QUEUE_POS_OCCUPIED_BIT  31

#ifdef __cplusplus
}
#endif

#endif