intflash_infopage_driver.c

flash AM29LV160 的驱动程序

/*
 * File       : IntFlash_InfoPage_Driver.c
 * Description: This file contains the Flash driver for use in data persistence 
 *              where the values are stored in information page
 * Author     :  
 * Created on : 03-FEB-2005
 *
 * Copyright 2004 ZiLOG Inc.  ALL RIGHTS RESERVED.
 *
 * This file contains unpublished confidential and proprietary information
 * of ZiLOG, Inc.
 * NO PART OF THIS WORK MAY BE DUPLICATED, STORED, PUBLISHED OR DISCLOSED 
 * IN ANY FORM WITHOUT THE PRIOR WRITTEN CONSENT OF ZiLOG, INC.
 * This is not a license and no use of any kind of this work is authorized
 * in the absence of a written license granted by ZiLOG, Inc. in ZiLOG's 
 * sole discretion 
 */

#include <stdio.h>
#include <string.h>
#include "IntFlash_InfoPage_Driver.h"

#ifdef _EZ80F91
#include <eZ80F91.h>
#endif

#ifdef _EZ80F92
#include <eZ80F92.h>
#endif

#ifdef _EZ80F93
#include <eZ80F93.h>
#endif

#ifdef _IAR_CODE
#define LOC_ADDR UINT32
#else
#define LOC_ADDR UINT
#endif

#ifdef _EZ80F91
UINT8 g_nRowsPerInfoPage = 1 ;
#endif

#if defined(_EZ80F92) || defined(_EZ80F93)
UINT8 g_nRowsPerInfoPage = 2 ;
#endif


INT IntFlash_IP_Init(  VOID *paddr, UINT32 num_bytes   )
#ifdef _IAR_CODE
@ "DATA_PER_RAM"
#endif
{

	// Unprotect the flash blocks
	// write FLASH_KEY register to unprotect teh FLASH_FDIV and FLASH_PROT registers
	FLASH_KEY = 0xB6 ;
	FLASH_KEY = 0x49 ;
         /*Sequential Write operations of the values B6h, 49h to this
         register will unlock the Flash Frequency Divider and Flash
         Write/Erase Protection registers.*/
	// set the FLASH_FDIV register
#ifdef _EZ80F91
	FLASH_FDIV = 0xFF ; //( UINT8) ( ulFdiv & 0xFF ) ;
#endif

#ifdef _EZ80F92
	FLASH_FDIV = 0x66 ; 
#endif

#ifdef _EZ80F93
	FLASH_FDIV = 0x66 ; 
#endif

	// write FLASH_KEY register to unprotect teh FLASH_FDIV and FLASH_PROT registers
	FLASH_KEY = 0xB6 ;
	FLASH_KEY = 0x49 ;
	// enable write/erase protect for boot block (32KB)
	// disable write/erase protect for other blocks.
	FLASH_PROT = 0x00 ;

	return SUCCESS ;
}
//IntFlash_IP_Read( paddr, (VOID *)f91_mac_addr, 6 );
INT32 IntFlash_IP_Read( VOID *paddr, VOID *pbuf, UINT num_bytes )
#ifdef _IAR_CODE
@ "DATA_PER_RAM"
#endif
{

	// the number of bytes passed to this function is always less than
	// 512 bytes

	UINT16 nBytes ;
	volatile UINT8 *pcBuf = ( UINT8 * ) pbuf ;
	volatile UINT8 *pcaddr = ( UINT8 * ) paddr ;
	volatile UINT8 npage ;
	volatile UINT8 nrow ;
	volatile UINT8 ncol ;
	
	npage = GETPAGE( (LOC_ADDR) pcaddr ) | FLASH_PAGE_INFO_ACCESS ;
	nrow = GETROW( (LOC_ADDR) pcaddr ) ;
	ncol = GETCOL( (LOC_ADDR) pcaddr ) ;
        FLASH_PAGE = npage ;
	FLASH_ROW = nrow ;
	FLASH_COL = ncol ;	

	// now in a loop read the num_bytes values from FLASH_DATA register
	for( nBytes = 0 ; nBytes < num_bytes ; nBytes++ )
    {
#ifdef _EZ80F91
		*pcBuf = FLASH_DATA ;
#endif
#if defined(_EZ80F92) || defined(_EZ80F93)
		*pcBuf = *((UINT8*) pcaddr) ;
#endif
		pcBuf++ ;
#if defined(_EZ80F92) || defined(_EZ80F93)
		pcaddr++ ;
#endif
	}
	
	FLASH_PAGE = 0 ;
	FLASH_ROW = 0 ;
	FLASH_COL = 0 ;
	return num_bytes ;
}

INT32 IntFlash_IP_Write( VOID *paddr, VOID *pbuf, UINT num_bytes )
#ifdef _IAR_CODE
@ "DATA_PER_RAM"
#endif
{
	// the number of bytes passed to this function is always less than
	// 512 bytes

	UINT16 nBytes ;
	volatile UINT8 *pcBuf = ( UINT8 * ) pbuf ;
	volatile UINT8 *pcaddr = ( UINT8 * ) paddr ;
	volatile UINT8 npage ;
	volatile UINT8 nrow ;
	volatile UINT8 ncol ;
	
	// set the PAGE, ROW and COL registers
	npage = GETPAGE( (LOC_ADDR) pcaddr ) | FLASH_PAGE_INFO_ACCESS ;
	nrow = GETROW( (LOC_ADDR) pcaddr ) ;
	ncol = GETCOL( (LOC_ADDR) pcaddr ) ;
        FLASH_PAGE = npage ;
	FLASH_ROW = nrow ;
	FLASH_COL = ncol ;	

	// now in a loop read the num_bytes values from FLASH_DATA register
	for( nBytes = 0 ; nBytes < num_bytes ; nBytes++ )
    {	
#if defined(_EZ80F92) || defined(_EZ80F93)
		// set the PAGE, ROW and COL registers
                FLASH_PAGE = 0 ;
                FLASH_ROW = 0 ;
                FLASH_COL = 0 ;
                npage = GETPAGE( (LOC_ADDR) pcaddr ) | FLASH_PAGE_INFO_ACCESS ;
                nrow = GETROW( (LOC_ADDR) pcaddr ) ;
                ncol = GETCOL( (LOC_ADDR) pcaddr ) ;
                FLASH_PAGE = npage ;
                FLASH_ROW = nrow ;
                FLASH_COL = ncol ;	
#endif

		FLASH_DATA = *pcBuf ;
		pcBuf++ ;
#if defined(_EZ80F92) || defined(_EZ80F93)
		pcaddr++ ;
#endif

	}
        FLASH_PAGE = 0 ;
        FLASH_ROW = 0 ;
        FLASH_COL = 0 ;
	return num_bytes ;
}

INT IntFlash_IP_Erase( VOID *paddr, UINT32 num_bytes )
#ifdef _IAR_CODE
@ "DATA_PER_RAM"
#endif
{
	/*
	 * F91, information page is of 512 bytes, but we use only 256
	 * bytes to maintain equality between all F series platforms
	 * F92/F93, information page is 256 bytes which is divided
	 * between 2 rows.
	 */

	UINT8 nPageNum = GETPAGE( (UINT32) paddr ) ;
	UINT nCnt ;

	for( nCnt = 0 ; nCnt < g_nRowsPerInfoPage ; nCnt++ )
	{

		/*
		 * set the flash access to IO
		 */
		FLASH_PAGE = nPageNum | FLASH_PAGE_INFO_ACCESS ;
		FLASH_ROW = (UINT8) nCnt ;

		// setup the flash erase
		FLASH_PGCTL = FLASH_PGCTL_PG_ERASE_ENABLE ;

		// now poll for the 
		while(1)
		{
			// If erase is complete, break from the loop
			if( !(FLASH_PGCTL & FLASH_PGCTL_PG_ERASE_ENABLE ) )
				break ;
		}
	}

        FLASH_PAGE = 0 ;
        FLASH_ROW = 0 ;
        FLASH_COL = 0 ;
	return SUCCESS;
}

INT IntFlash_IP_Close( VOID )
#ifdef _IAR_CODE
@ "DATA_PER_RAM"
#endif
{
//	FLASH_PAGE = 0 ;
	// disable INTERNAL FLASH
//	FLASH_CTRL = 0x00 ;
	return SUCCESS ;
}