rzkhwinitc.c

zilog的实时操作系统RZK,可以移植到多种处理器上

/*
* File				:	RZKHwInit.c
*
* Description		:	This file sets the HW devices and the
*						memory wait states and assign Interrupt levels
*						to the peripherals.
* 
* Copyright 2004 ZiLOG Inc.  ALL RIGHTS RESERVED.
*
* This file contains unpublished confidential and proprietary information
* of ZiLOG, Inc.
* NO PART OF THIS WORK MAY BE DUPLICATED, STORED, PUBLISHED OR DISCLOSED 
* IN ANY FORM WITHOUT THE PRIOR WRITTEN CONSENT OF ZiLOG, INC.
* This is not a license and no use of any kind of this work is authorized
* in the absence of a written license granted by ZiLOG, Inc. in ZiLOG's 
* sole discretion 
*/
#include <stdio.h>

#include "ZSysgen.h"
#include "ZTypes.h"
#include "ZThread.h"
#include "ZEventgroup.h"
#include "ZInterrupt.h"
#include "ZSemaphore.h"
#include "ZQueue.h"
#include "ZDevice.h"
#include "externvar.h"


/** F91 port */
typedef volatile UINT8 __INTIO *PBINTIO;
typedef volatile INT8 __EXTIO *	IORegExt8;

#ifdef _EZ80F91
	#define	tmr_ctl (*(PBINTIO)( (UINT8)( 0x60 )))
	#define	tmr_ier (*(PBINTIO)( (UINT8)( 0x61 )))
	#define	tmr_iir (*(PBINTIO)( (UINT8)( 0x62 )))
	#define	tmr_rr_l (*(PBINTIO)((UINT8)( 0x63 )))
	#define	tmr_rr_h (*(PBINTIO)((UINT8)( 0x64 )))

	#define	tmr1_ctl (*(PBINTIO)( (UINT8)( 0x65 )))
	#define	tmr1_ier (*(PBINTIO)( (UINT8)( 0x66 )))
	#define	tmr1_iir (*(PBINTIO)( (UINT8)( 0x67 )))
	#define	tmr1_rr_l (*(PBINTIO)((UINT8)( 0x68 )))
	#define	tmr1_rr_h (*(PBINTIO)((UINT8)( 0x69 )))

	#define	tmr2_ctl (*(PBINTIO)( (UINT8)( 0x6F )))
	#define	tmr2_ier (*(PBINTIO)( (UINT8)( 0x70 )))
	#define	tmr2_iir (*(PBINTIO)( (UINT8)( 0x71 )))
	#define	tmr2_rr_l (*(PBINTIO)((UINT8)( 0x72 )))
	#define	tmr2_rr_h (*(PBINTIO)((UINT8)( 0x73 )))

	#define	tmr3_ctl (*(PBINTIO)( (UINT8)( 0x74 )))
	#define	tmr3_ier (*(PBINTIO)( (UINT8)( 0x75 )))
	#define	tmr3_iir (*(PBINTIO)( (UINT8)( 0x76 )))
	#define	tmr3_rr_l (*(PBINTIO)((UINT8)( 0x77 )))
	#define	tmr3_rr_h (*(PBINTIO)((UINT8)( 0x78 )))

	/** timer control register */
	#define TMRCTL_BRK_STOP				0x80 /** Timer stops operation during debug break points */
	#define TMRCTL_CLK_SEL_SCLK			0x00 /** Source is master clock divided by the prescalar */
	#define TMRCTL_CLK_DIV64			0x10 /** System clock divider = 64 */
	#define TMRCTL_TIM_CONT				0x04 /** Continuous mode */
	#define TMRCTL_RLD					0x02 /** Reload function enabled */
	#define TMRCTL_TIM_EN				0x01 /** timer enabled */

	/** timer interrupt enable register */
	#define TMRIER_IRQ_EOC_EN			0x01 /** Interrupt on end count enabled */

	/** other constants */
	#define TIMER0_INTRID	(0x54)
	#define TIMER1_INTRID	(0x58)
	#define TIMER2_INTRID	(0x5C)
	#define TIMER3_INTRID	(0x60)

	#define MAX_INTERRUPTS		64
	#define CLOCK_DIVISOR		64

	
#else
	#ifdef _EZ80190
		#define TIMER0_INTRID	3
		#define TIMER1_INTRID	4
		#define TIMER2_INTRID	5
		#define TIMER3_INTRID	6
		#define TIMER4_INTRID	7
		#define TIMER5_INTRID	8

		#define CLK_DIV_8	0x08
		#define CLK_DIV_16	0x0C
		#define MAX_INTERRUPTS	47
		#define CLOCK_DIVISOR	8
	#else
		#define TIMER0_INTRID	(0x0A)
		#define TIMER1_INTRID	(0x0C)
		#define TIMER2_INTRID	(0x0E)
		#define TIMER3_INTRID	(0x10)
		#define TIMER4_INTRID	(0x12)
		#define TIMER5_INTRID	(0x14)

		#define CLK_DIV_64	0x08
		#define CLK_DIV_256	0x0C
		#define MAX_INTERRUPTS	48
		#define CLOCK_DIVISOR	64
	#endif

	#define	tmr_cont (*(PBINTIO)((UINT8)( 0x80 )))
	#define	tmr_rll  (*(PBINTIO)((UINT8)( 0x81 )))
	#define	tmr_rlh  (*(PBINTIO)((UINT8)( 0x82 )))

	#define	tmr1_cont (*(PBINTIO)((UINT8)( 0x83 )))
	#define	tmr1_rll  (*(PBINTIO)((UINT8)( 0x84 )))
	#define	tmr1_rlh  (*(PBINTIO)((UINT8)( 0x85 )))

	#define	tmr2_cont (*(PBINTIO)((UINT8)( 0x86 )))
	#define	tmr2_rll  (*(PBINTIO)((UINT8)( 0x87 )))
	#define	tmr2_rlh  (*(PBINTIO)((UINT8)( 0x88 )))

	#define	tmr3_cont (*(PBINTIO)((UINT8)( 0x89 )))
	#define	tmr3_rll  (*(PBINTIO)((UINT8)( 0x8A )))
	#define	tmr3_rlh  (*(PBINTIO)((UINT8)( 0x8B )))

	#define	tmr4_cont (*(PBINTIO)((UINT8)( 0x8C )))
	#define	tmr4_rll  (*(PBINTIO)((UINT8)( 0x8D )))
	#define	tmr4_rlh  (*(PBINTIO)((UINT8)( 0x8E )))

	#define	tmr5_cont (*(PBINTIO)((UINT8)( 0x8F )))
	#define	tmr5_rll  (*(PBINTIO)((UINT8)( 0x90 )))
	#define	tmr5_rlh  (*(PBINTIO)((UINT8)( 0x91 )))

	#define TIMER_ENABLE		0x01
	#define TIMER_INTR_ENABLE	0x40
	#define TIMER_SM		0x10
	#define TIMER_LDRST		0x02
#endif

/* Product Id registers same as for F91/F92/F93/L92*/
#define EZ80_PRODUCT_ID_L 0x00
#define EZ80_PRODUCT_ID_H 0x01
#define EZ80_PRODUCT_REV 0x02


/** F91 port */

#define	pCurrentThread ((RZK_TCB_t *) hCurrentThread)

/** extern functions */
extern void SetMemWaitState(void);
extern void SetIOWaitState(void);
extern void SystemTimerISRProlog(void);
extern void DispatchQueueInit();
extern void InitializeTimeQueue(void);
extern INT  initialize(void);
extern void RZKApplicationEntry(void);
extern void RZKInitIntrVectTab() ;
extern void RZKSystemTimerIsrEntry();
extern void IdleThread();
extern void InitCwdTable( void );

/** extern variables */
extern RZK_THREADHANDLE_t hCurrentThread;
extern RZK_DISPATCHQ_t DispatchQueue[];
extern volatile UINT32 DQPriorityBitMap;
extern TICK_t uDefaultTimeSlice ;
extern const UINT32 pMap[];
extern RZK_DEVICE_CB_t usrDevBlk[] ;

/* This thread is introduced, to eliminate the undeterministic behaviour
	of the RZK when there are no threads to run, but interrupt threads are
	created by interrupts occuring */
extern UINT8 cTim ;

// CWD IMPLEMENTATION
extern INT8 fsCwdPath[] ;
extern INT8 fsCwdArray[1][1] ; 
extern UINT8 fsEnable ;
extern RZK_THREAD_CB_t nTcb[] ;

extern UINT16 _nvectors;

UINT8 fsInAppEntry ;
UINT8 HwInitFlag;

RZK_THREADHANDLE_t hIdleThread;
RZK_THREADHANDLE_t hSysIsrThread;
RZK_SEMAPHOREHANDLE_t hSem_Region;
RZK_SEMAPHOREHANDLE_t hSem_Delete;

UINT16 eZ80ProductId = 0;
UINT8   eZ80ProductRevision = 0;


/* Function			:	getHWVersion
*
* Description		:	This routine gets the eZ80 product ID and version no.
* 
* Inputs			:	None.
*							
* Outputs			:	None.
*							
*
* Dependencies		:	None.
*/
void getHWVersion(void)
{
    UINT8 product = 0;
     product = (*(IORegExt8)(EZ80_PRODUCT_ID_H));
     eZ80ProductId  |= ( (UINT16)product << 8);
     product = (*(IORegExt8)(EZ80_PRODUCT_ID_L));	
     eZ80ProductId  |= ( (UINT16)product );
     eZ80ProductRevision = (*(IORegExt8)(EZ80_PRODUCT_REV));
}

/* Function			:	InvalidInterruptHandler
*
* Description		:	Gets into this routine when any interrupt handlers are not installed
* 
* Inputs			:	None.
*							
* Outputs			:	None.
*							
*
* Dependencies		:	None.
*/
void InvalidInterruptHandler(void)
{
	printf("Uninitialized Interrupt");
	asm("	HALT");	// F91 changed from _asm to asm
}

/* Function			:	TimerInitialization
*
* Description		:	Initializes Timer0
* 
* Inputs			:	void.
*							
* Outputs			:	void.
*							
*
* Dependencies		:	None.
*/
static void TimerInitialization(void)
{
	UINT timer_val;

	switch(cTim)
	{
		case 0:
		{
			RZKInstallInterruptHandler((RZK_FNP_ISR)SystemTimerISRProlog,TIMER0_INTRID);
			timer_val = SYSTEM_CLOCK / (CLOCK_DIVISOR * RZK_SYSTICKS_INSEC * RZK_DEVTICKS_PERSYSTICK);

			#ifdef _EZ80F91
				tmr_rr_l = timer_val; 
				tmr_rr_h = timer_val >> 8 ;
			
				/** write into tmr_ctl register */
				tmr_ctl = ( TMRCTL_BRK_STOP | TMRCTL_CLK_SEL_SCLK | TMRCTL_CLK_DIV64 | TMRCTL_TIM_CONT |
										TMRCTL_RLD | TMRCTL_TIM_EN ) ;
			
                                /** enable timer interrupts */
				tmr_ier = TMRIER_IRQ_EOC_EN ;
			#else
        			{
        			UINT8 temp = 0;
				tmr_rll = timer_val; 
				tmr_rlh = timer_val >> 8 ;
				temp = TIMER_ENABLE |TIMER_INTR_ENABLE ;
				
				#ifdef _EZ80190
					temp |= TIMER_LDRST|TIMER_SM|CLK_DIV_8 ;
				#else
					temp |= TIMER_LDRST|TIMER_SM|CLK_DIV_64 ;
				#endif
				tmr_cont = temp ;
				}
			#endif

			break;
		}
		case 1:
		{
			RZKInstallInterruptHandler((RZK_FNP_ISR)SystemTimerISRProlog,TIMER1_INTRID);
			timer_val = SYSTEM_CLOCK / (CLOCK_DIVISOR * RZK_SYSTICKS_INSEC * RZK_DEVTICKS_PERSYSTICK);
		
			#ifdef _EZ80F91
				tmr1_rr_l = timer_val; 
				tmr1_rr_h = timer_val >> 8 ;
			
				/** write into tmr_ctl register */
				tmr1_ctl = ( TMRCTL_BRK_STOP | TMRCTL_CLK_SEL_SCLK | TMRCTL_CLK_DIV64 | TMRCTL_TIM_CONT |
										TMRCTL_RLD | TMRCTL_TIM_EN ) ;
			
				/** enable timer interrupts */
				tmr1_ier = TMRIER_IRQ_EOC_EN ;
			#else
			        {
        			UINT8 temp = 0;
				tmr1_rll = timer_val; 
				tmr1_rlh = timer_val >> 8 ;
				temp = TIMER_ENABLE |TIMER_INTR_ENABLE ;
				
				#ifdef _EZ80190
					temp |= TIMER_LDRST|TIMER_SM|CLK_DIV_8 ;
				#else
					temp |= TIMER_LDRST|TIMER_SM|CLK_DIV_64 ;
				#endif
				tmr1_cont = temp ;
				}
			#endif

			break;
		}
		case 2:
		{
			RZKInstallInterruptHandler((RZK_FNP_ISR)SystemTimerISRProlog,TIMER2_INTRID);
			timer_val = SYSTEM_CLOCK / (CLOCK_DIVISOR * RZK_SYSTICKS_INSEC * RZK_DEVTICKS_PERSYSTICK);
		
			#ifdef _EZ80F91
				tmr2_rr_l = timer_val; 
				tmr2_rr_h = timer_val >> 8 ;
			
				/** write into tmr_ctl register */
				tmr2_ctl = ( TMRCTL_BRK_STOP | TMRCTL_CLK_SEL_SCLK | TMRCTL_CLK_DIV64 | TMRCTL_TIM_CONT |
										TMRCTL_RLD | TMRCTL_TIM_EN ) ;
			
				/** enable timer interrupts */
				tmr2_ier = TMRIER_IRQ_EOC_EN ;
			#else
			        {
        			UINT8 temp = 0;
				tmr2_rll = timer_val; 
				tmr2_rlh = timer_val >> 8 ;
				temp = TIMER_ENABLE |TIMER_INTR_ENABLE ;
				
				#ifdef _EZ80190
					temp |= TIMER_LDRST|TIMER_SM|CLK_DIV_8 ;
				#else
					temp |= TIMER_LDRST|TIMER_SM|CLK_DIV_64 ;
				#endif
				tmr2_cont = temp ;
				}
			#endif

			break;
		}
		case 3:
		{
			RZKInstallInterruptHandler((RZK_FNP_ISR)SystemTimerISRProlog,TIMER3_INTRID);
			timer_val = SYSTEM_CLOCK / (CLOCK_DIVISOR * RZK_SYSTICKS_INSEC * RZK_DEVTICKS_PERSYSTICK);
		
			#ifdef _EZ80F91
				tmr3_rr_l = timer_val; 
				tmr3_rr_h = timer_val >> 8 ;
			
				/** write into tmr_ctl register */
				tmr3_ctl = ( TMRCTL_BRK_STOP | TMRCTL_CLK_SEL_SCLK | TMRCTL_CLK_DIV64 | TMRCTL_TIM_CONT |
										TMRCTL_RLD | TMRCTL_TIM_EN ) ;
			
				/** enable timer interrupts */
				tmr3_ier = TMRIER_IRQ_EOC_EN ;
			#else
			        {
        			UINT8 temp = 0;
				tmr3_rll = timer_val; 
				tmr3_rlh = timer_val >> 8 ;
				temp = TIMER_ENABLE |TIMER_INTR_ENABLE ;

				#ifdef _EZ80190
					temp |= TIMER_LDRST|TIMER_SM|CLK_DIV_8 ;
				#else
					temp |= TIMER_LDRST|TIMER_SM|CLK_DIV_64 ;
				#endif
				tmr3_cont = temp ;
				}
			#endif
			
			break;
		}

#ifndef _EZ80F91
		case 4:
		{
		        UINT8 temp = 0;
			RZKInstallInterruptHandler((RZK_FNP_ISR)SystemTimerISRProlog,TIMER4_INTRID);
			timer_val = SYSTEM_CLOCK / (CLOCK_DIVISOR * RZK_SYSTICKS_INSEC * RZK_DEVTICKS_PERSYSTICK);

			tmr4_rll = timer_val; 
			tmr4_rlh = timer_val >> 8 ;
			temp = TIMER_ENABLE |TIMER_INTR_ENABLE ;

			#ifdef _EZ80190
				temp |= TIMER_LDRST|TIMER_SM|CLK_DIV_8 ;
			#else
				temp |= TIMER_LDRST|TIMER_SM|CLK_DIV_64 ;
			#endif

			tmr4_cont = temp ;
			break;
		}
		case 5:
		{
        	        UINT8 temp = 0;
			RZKInstallInterruptHandler((RZK_FNP_ISR)SystemTimerISRProlog,TIMER5_INTRID);
			timer_val = SYSTEM_CLOCK / (CLOCK_DIVISOR * RZK_SYSTICKS_INSEC * RZK_DEVTICKS_PERSYSTICK);

			tmr5_rll = timer_val; 
			tmr5_rlh = timer_val >> 8 ;
			temp = TIMER_ENABLE |TIMER_INTR_ENABLE ;

			#ifdef _EZ80190
				temp |= TIMER_LDRST|TIMER_SM|CLK_DIV_8 ;
			#else
				temp |= TIMER_LDRST|TIMER_SM|CLK_DIV_64 ;
			#endif
			tmr5_cont = temp ;
			break;
		}
#endif
	}			
	/** timer interrupt is set with default priority level in INT_P0 register */
}

/* Function			:	InitializeDataStructures
*
* Description		:	Initializes data structures
* 
* Inputs			:	void.
*							
* Outputs			:	void.
*							
*
* Dependencies		:	None.
*/
static void InitializeDataStructures(void)
{
	/* Initialize the Dispatch Queues */
	DispatchQueueInit();

	/* Initialize the Time Queues */
	InitializeTimeQueue();
}


/* Function			:	RZKHwInitC
*
* Description		:	This function sets the HW devices and the
*						memory wait states and assign Interrupt levels
*						to the peripherals.
* 
* Inputs			:	none.
*							
* Outputs			:	void.
*							
*
* Dependencies		:	None.
*/

extern void RZK_HW_Init( void ) ;
void RZK_KernelInit( void )
{
	UINT nIntrID;

	// disable the interrupts as interrupts are enabled in main for ZDS.
	// though it is present, does not harm for IAR based compiler
	RZKDisableInterrupts() ;

#ifndef _IAR_CODE
	// Initialize the hw init routine.
	RZK_HW_Init() ;
#endif

      getHWVersion();

	/** set default time slice */
	uDefaultTimeSlice = RZK_TIME_SLICE ;

	/* Initalize data structures used by the RZK */
	InitializeDataStructures();

	for(nIntrID = 0;nIntrID < _nvectors;nIntrID++)
		RZKInstallInterruptHandler( InvalidInterruptHandler,
#ifdef _EZ80F91
		(nIntrID * 4));
#else
		(nIntrID * 2));
#endif

	/* Start the Timer as specified by ZSysgen.h */
	TimerInitialization();

	InitCwdTable() ;
	if( fsEnable )
	{
		fsInAppEntry = RZK_TRUE ;
	}

	DispatchQueue[HIGHEST_PRIORITY].pNext = pCurrentThread;

	init_malloc();
	/* Idle thread - 21-11-2001 Round robin facility has been provided for Idle thread with 1 tick */

	hIdleThread = RZKCreateThreadEnhanced( ( RZK_NAME_t *) "IDLE", 
					(RZK_PTR_t)IdleThread, 
					(FNP_THREAD_ENTRY*) NULL, 
					RZK_STACK_SIZE,
					DMAX_PRIORITY, 
					1, 
					RZK_THREAD_PREEMPTION | RZK_THREAD_ROUNDROBIN,
					0);

	/* System ISR thread */
	hSysIsrThread = RZKCreateThreadEnhanced( ( RZK_NAME_t *) "SYSIT", 
					(RZK_PTR_t)RZKSystemTimerIsrEntry, 
					(FNP_THREAD_ENTRY*)NULL, 
					RZK_SYSTIMERSTACK_SIZE,
					HIGHEST_PRIORITY, 
					0, 
					RZK_THREAD_PREEMPTION | RZK_THREAD_INTERRUPT,
					0);

	hSem_Region = RZKCreateSemaphore((RZK_NAME_t *) "hSem_Region", 1, RECV_ORDER_PRIORITY);
	if(hSem_Region == NULL)
		printf("\nRegion Semaphore creation error");

	/* This has to be a priority semaphore because when thread gets deleted semphore can get released. Sem gets released only for priority semaphores */
	hSem_Delete = RZKCreateSemaphore((RZK_NAME_t *) "hSem_Delete", 1, RECV_ORDER_PRIORITY);
	if(hSem_Delete == NULL)
		printf("\ndelete Semaphore creation error");
	
}

void RZK_KernelStart( void )
{
	// CWD IMPLEMENTATION
	fsInAppEntry = RZK_FALSE ;

	DQPriorityBitMap &= ~(pMap[HIGHEST_PRIORITY]);
	DispatchQueue[HIGHEST_PRIORITY].pNext = (RZK_TCB_t *) &DispatchQueue[HIGHEST_PRIORITY];

	/* Call ResumeThread */
	RZKResumeThread(hIdleThread) ;
	/* The control does not return here */
}