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📄 dds.sch

📁 Direct Digital Synthesis (DDS),最好用的可步进的数字频率发生器的方法
💻 SCH
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VERSION 6
BEGIN SCHEMATIC
    BEGIN ATTR DeviceFamilyName "spartan2"
        DELETE all:0
        EDITNAME all:0
        EDITTRAIT all:0
    END ATTR
    BEGIN NETLIST
        SIGNAL XLXN_7(15:0)
        SIGNAL XLXN_29(15:0)
        SIGNAL XLXN_8(9:0)
        SIGNAL XLXN_9(8:0)
        SIGNAL XLXN_10(8:0)
        SIGNAL XLXN_4
        SIGNAL clk
        SIGNAL data
        SIGNAL upclk
        SIGNAL XLXN_37
        SIGNAL reset
        SIGNAL XLXN_23(7:0)
        SIGNAL XLXN_24(7:0)
        SIGNAL XLXN_25(7:0)
        SIGNAL mode(1:0)
        SIGNAL ddsdata(7:0)
        PORT Input clk
        PORT Input data
        PORT Input upclk
        PORT Input reset
        PORT Input mode(1:0)
        PORT Output ddsdata(7:0)
        BEGIN BLOCKDEF clk_gen
            TIMESTAMP 2005 8 2 7 29 18
            RECTANGLE N 64 -64 320 0 
            LINE N 64 -32 0 -32 
            LINE N 320 -32 384 -32 
        END BLOCKDEF
        BEGIN BLOCKDEF shift
            TIMESTAMP 2005 8 2 7 29 14
            RECTANGLE N 64 -192 320 0 
            LINE N 64 -160 0 -160 
            LINE N 64 -96 0 -96 
            LINE N 64 -32 0 -32 
            LINE N 320 -160 384 -160 
            RECTANGLE N 320 -172 384 -148 
        END BLOCKDEF
        BEGIN BLOCKDEF sinproc
            TIMESTAMP 2005 8 2 7 29 10
            RECTANGLE N 64 -192 320 0 
            LINE N 64 -160 0 -160 
            LINE N 64 -96 0 -96 
            LINE N 64 -32 0 -32 
            RECTANGLE N 0 -44 64 -20 
            LINE N 320 -160 384 -160 
            RECTANGLE N 320 -172 384 -148 
        END BLOCKDEF
        BEGIN BLOCKDEF sinrom
            TIMESTAMP 2005 8 2 7 19 4
            RECTANGLE N 32 0 320 272 
            BEGIN LINE W 0 48 32 48 
            END LINE
            LINE N 0 240 32 240 
            BEGIN LINE W 320 48 352 48 
            END LINE
        END BLOCKDEF
        BEGIN BLOCKDEF squaproc
            TIMESTAMP 2005 8 2 7 29 4
            RECTANGLE N 64 -192 320 0 
            LINE N 64 -160 0 -160 
            LINE N 64 -96 0 -96 
            LINE N 64 -32 0 -32 
            RECTANGLE N 0 -44 64 -20 
            LINE N 320 -160 384 -160 
            RECTANGLE N 320 -172 384 -148 
        END BLOCKDEF
        BEGIN BLOCKDEF squarom
            TIMESTAMP 2005 8 2 7 28 54
            RECTANGLE N 32 0 320 272 
            BEGIN LINE W 0 48 32 48 
            END LINE
            LINE N 0 240 32 240 
            BEGIN LINE W 320 48 352 48 
            END LINE
        END BLOCKDEF
        BEGIN BLOCKDEF triproc
            TIMESTAMP 2005 8 2 7 28 52
            RECTANGLE N 64 -192 320 0 
            LINE N 64 -160 0 -160 
            LINE N 64 -96 0 -96 
            LINE N 64 -32 0 -32 
            RECTANGLE N 0 -44 64 -20 
            LINE N 320 -160 384 -160 
            RECTANGLE N 320 -172 384 -148 
        END BLOCKDEF
        BEGIN BLOCKDEF trirom
            TIMESTAMP 2005 8 2 7 22 44
            RECTANGLE N 32 0 320 272 
            BEGIN LINE W 0 48 32 48 
            END LINE
            LINE N 0 240 32 240 
            BEGIN LINE W 320 48 352 48 
            END LINE
        END BLOCKDEF
        BEGIN BLOCKDEF mux
            TIMESTAMP 2005 8 2 7 48 22
            RECTANGLE N 64 -256 320 0 
            LINE N 64 -224 0 -224 
            RECTANGLE N 0 -236 64 -212 
            LINE N 64 -160 0 -160 
            RECTANGLE N 0 -172 64 -148 
            LINE N 64 -96 0 -96 
            RECTANGLE N 0 -108 64 -84 
            LINE N 64 -32 0 -32 
            RECTANGLE N 0 -44 64 -20 
            LINE N 320 -224 384 -224 
            RECTANGLE N 320 -236 384 -212 
        END BLOCKDEF
        BEGIN BLOCK XLXI_3 sinproc
            PIN clk XLXN_4
            PIN reset reset
            PIN data_in(15:0) XLXN_7(15:0)
            PIN ddsout(9:0) XLXN_8(9:0)
        END BLOCK
        BEGIN BLOCK XLXI_5 squaproc
            PIN clk XLXN_4
            PIN reset reset
            PIN data_in(15:0) XLXN_7(15:0)
            PIN ddsout(8:0) XLXN_9(8:0)
        END BLOCK
        BEGIN BLOCK XLXI_7 triproc
            PIN clk XLXN_4
            PIN reset reset
            PIN data_in(15:0) XLXN_7(15:0)
            PIN ddsout(8:0) XLXN_10(8:0)
        END BLOCK
        BEGIN BLOCK XLXI_1 clk_gen
            PIN clk clk
            PIN clk_scan XLXN_4
        END BLOCK
        BEGIN BLOCK XLXI_2 shift
            PIN data data
            PIN upclk upclk
            PIN reset reset
            PIN dataout(15:0) XLXN_7(15:0)
        END BLOCK
        BEGIN BLOCK XLXI_6 squarom
            PIN addr(8:0) XLXN_9(8:0)
            PIN clk XLXN_4
            PIN dout(7:0) XLXN_24(7:0)
        END BLOCK
        BEGIN BLOCK XLXI_8 trirom
            PIN addr(8:0) XLXN_10(8:0)
            PIN clk XLXN_4
            PIN dout(7:0) XLXN_25(7:0)
        END BLOCK
        BEGIN BLOCK XLXI_4 sinrom
            PIN addr(9:0) XLXN_8(9:0)
            PIN clk XLXN_4
            PIN dout(7:0) XLXN_23(7:0)
        END BLOCK
        BEGIN BLOCK XLXI_9 mux
            PIN mode(1:0) mode(1:0)
            PIN sindata(7:0) XLXN_23(7:0)
            PIN squadata(7:0) XLXN_24(7:0)
            PIN tridata(7:0) XLXN_25(7:0)
            PIN ddsdata(7:0) ddsdata(7:0)
        END BLOCK
    END NETLIST
    BEGIN SHEET 1 3520 2720
        BEGIN INSTANCE XLXI_3 1520 1088 R0
        END INSTANCE
        BEGIN INSTANCE XLXI_5 1520 1472 R0
        END INSTANCE
        BEGIN INSTANCE XLXI_7 1520 1840 R0
        END INSTANCE
        BEGIN BRANCH XLXN_7(15:0)
            WIRE 1184 1328 1328 1328
            WIRE 1328 1328 1328 1440
            WIRE 1328 1440 1328 1808
            WIRE 1328 1808 1520 1808
            WIRE 1328 1440 1520 1440
            WIRE 1328 1056 1520 1056
            WIRE 1328 1056 1328 1328
        END BRANCH
        BEGIN BRANCH XLXN_8(9:0)
            WIRE 1904 928 2000 928
        END BRANCH
        BEGIN BRANCH XLXN_9(8:0)
            WIRE 1904 1312 2000 1312
        END BRANCH
        BEGIN BRANCH XLXN_10(8:0)
            WIRE 1904 1680 2000 1680
        END BRANCH
        BEGIN BRANCH XLXN_4
            WIRE 1232 928 1440 928
            WIRE 1440 928 1520 928
            WIRE 1440 928 1440 1120
            WIRE 1440 1120 1440 1312
            WIRE 1440 1312 1520 1312
            WIRE 1440 1312 1440 1504
            WIRE 1440 1504 2000 1504
            WIRE 1440 1504 1440 1680
            WIRE 1440 1680 1520 1680
            WIRE 1440 1680 1440 1872
            WIRE 1440 1872 2000 1872
            WIRE 1440 1120 2000 1120
        END BRANCH
        BEGIN INSTANCE XLXI_1 848 960 R0
        END INSTANCE
        BEGIN INSTANCE XLXI_2 800 1488 R0
        END INSTANCE
        BEGIN BRANCH clk
            WIRE 512 928 832 928
            WIRE 832 928 848 928
        END BRANCH
        BEGIN BRANCH data
            WIRE 768 1328 800 1328
        END BRANCH
        BEGIN BRANCH upclk
            WIRE 768 1392 800 1392
        END BRANCH
        BEGIN BRANCH reset
            WIRE 528 1456 592 1456
            WIRE 592 1456 784 1456
            WIRE 784 1456 800 1456
            WIRE 592 1456 592 1568
            WIRE 592 1568 1248 1568
            WIRE 592 1568 592 1744
            WIRE 592 1744 1520 1744
            WIRE 592 992 1520 992
            WIRE 592 992 592 1456
            WIRE 1248 1376 1248 1568
            WIRE 1248 1376 1520 1376
        END BRANCH
        BEGIN INSTANCE XLXI_6 2000 1264 R0
        END INSTANCE
        BEGIN INSTANCE XLXI_8 2000 1632 R0
        END INSTANCE
        BEGIN INSTANCE XLXI_4 2000 880 R0
        END INSTANCE
        BEGIN INSTANCE XLXI_9 2576 1488 R0
        END INSTANCE
        BEGIN BRANCH XLXN_23(7:0)
            WIRE 2352 928 2464 928
            WIRE 2464 928 2464 1328
            WIRE 2464 1328 2576 1328
        END BRANCH
        BEGIN BRANCH XLXN_24(7:0)
            WIRE 2352 1312 2448 1312
            WIRE 2448 1312 2448 1392
            WIRE 2448 1392 2576 1392
        END BRANCH
        BEGIN BRANCH XLXN_25(7:0)
            WIRE 2352 1680 2464 1680
            WIRE 2464 1456 2464 1680
            WIRE 2464 1456 2576 1456
        END BRANCH
        BEGIN BRANCH mode(1:0)
            WIRE 2544 1264 2576 1264
        END BRANCH
        BEGIN BRANCH ddsdata(7:0)
            WIRE 2960 1264 2992 1264
        END BRANCH
        IOMARKER 768 1328 data R180 28
        IOMARKER 768 1392 upclk R180 28
        IOMARKER 512 928 clk R180 28
        IOMARKER 528 1456 reset R180 28
        IOMARKER 2544 1264 mode(1:0) R180 28
        IOMARKER 2992 1264 ddsdata(7:0) R0 28
    END SHEET
END SCHEMATIC

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