getroundkey.tan.qmsg

SMS4是国内第一个公布的商用分组密码算法

{ "Info" "ITDB_FULL_CLOCK_REG_RESULT_RESTRICTED" "clock memory memory sbox:sbox3\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|ram_block1a0~porta_address_reg7 sbox:sbox3\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|q_a\[1\] 180.05 MHz Internal " "Info: Clock \"clock\" Internal fmax is restricted to 180.05 MHz between source memory \"sbox:sbox3\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|ram_block1a0~porta_address_reg7\" and destination memory \"sbox:sbox3\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|q_a\[1\]\"" { { "Info" "ITDB_CLOCK_TCH_TCL" "2.777 ns 2.777 ns 5.554 ns " "Info: fmax restricted to Clock High delay (2.777 ns) plus Clock Low delay (2.777 ns) : restricted to 5.554 ns. Expand message to see actual delay path." { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "3.641 ns + Longest memory memory " "Info: + Longest memory to memory delay is 3.641 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns sbox:sbox3\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|ram_block1a0~porta_address_reg7 1 MEM M4K_X64_Y23 8 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = M4K_X64_Y23; Fanout = 8; MEM Node = 'sbox:sbox3\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|ram_block1a0~porta_address_reg7'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "" { sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg7 } "NODE_NAME" } "" } } { "db/altsyncram_lvp.tdf" "" { Text "E:/hbx_sms4/GetRoundKey/db/altsyncram_lvp.tdf" 41 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.641 ns) 3.641 ns sbox:sbox3\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|q_a\[1\] 2 MEM M4K_X64_Y23 7 " "Info: 2: + IC(0.000 ns) + CELL(3.641 ns) = 3.641 ns; Loc. = M4K_X64_Y23; Fanout = 7; MEM Node = 'sbox:sbox3\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|q_a\[1\]'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "3.641 ns" { sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg7 sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[1] } "NODE_NAME" } "" } } { "db/altsyncram_lvp.tdf" "" { Text "E:/hbx_sms4/GetRoundKey/db/altsyncram_lvp.tdf" 38 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.641 ns 100.00 % " "Info: Total cell delay = 3.641 ns ( 100.00 % )" {  } {  } 0}  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "3.641 ns" { sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg7 sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[1] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "3.641 ns" { sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg7 sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[1] } { 0.000ns 0.000ns } { 0.000ns 3.641ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.020 ns - Smallest " "Info: - Smallest clock skew is -0.020 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clock destination 3.464 ns + Shortest memory " "Info: + Shortest clock path from clock \"clock\" to destination memory is 3.464 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.100 ns) 1.100 ns clock 1 CLK PIN_T2 1 " "Info: 1: + IC(0.000 ns) + CELL(1.100 ns) = 1.100 ns; Loc. = PIN_T2; Fanout = 1; CLK Node = 'clock'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "" { clock } "NODE_NAME" } "" } } { "GetRoundKey.v" "" { Text "E:/hbx_sms4/GetRoundKey/GetRoundKey.v" 14 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.170 ns) + CELL(0.000 ns) 1.270 ns clock~clkctrl 2 COMB CLKCTRL_G3 64 " "Info: 2: + IC(0.170 ns) + CELL(0.000 ns) = 1.270 ns; Loc. = CLKCTRL_G3; Fanout = 64; COMB Node = 'clock~clkctrl'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "0.170 ns" { clock clock~clkctrl } "NODE_NAME" } "" } } { "GetRoundKey.v" "" { Text "E:/hbx_sms4/GetRoundKey/GetRoundKey.v" 14 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.379 ns) + CELL(0.815 ns) 3.464 ns sbox:sbox3\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|q_a\[1\] 3 MEM M4K_X64_Y23 7 " "Info: 3: + IC(1.379 ns) + CELL(0.815 ns) = 3.464 ns; Loc. = M4K_X64_Y23; Fanout = 7; MEM Node = 'sbox:sbox3\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|q_a\[1\]'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "2.194 ns" { clock~clkctrl sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[1] } "NODE_NAME" } "" } } { "db/altsyncram_lvp.tdf" "" { Text "E:/hbx_sms4/GetRoundKey/db/altsyncram_lvp.tdf" 38 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.915 ns 55.28 % " "Info: Total cell delay = 1.915 ns ( 55.28 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.549 ns 44.72 % " "Info: Total interconnect delay = 1.549 ns ( 44.72 % )" {  } {  } 0}  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "3.464 ns" { clock clock~clkctrl sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[1] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "3.464 ns" { clock clock~combout clock~clkctrl sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[1] } { 0.000ns 0.000ns 0.170ns 1.379ns } { 0.000ns 1.100ns 0.000ns 0.815ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clock source 3.484 ns - Longest memory " "Info: - Longest clock path from clock \"clock\" to source memory is 3.484 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.100 ns) 1.100 ns clock 1 CLK PIN_T2 1 " "Info: 1: + IC(0.000 ns) + CELL(1.100 ns) = 1.100 ns; Loc. = PIN_T2; Fanout = 1; CLK Node = 'clock'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "" { clock } "NODE_NAME" } "" } } { "GetRoundKey.v" "" { Text "E:/hbx_sms4/GetRoundKey/GetRoundKey.v" 14 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.170 ns) + CELL(0.000 ns) 1.270 ns clock~clkctrl 2 COMB CLKCTRL_G3 64 " "Info: 2: + IC(0.170 ns) + CELL(0.000 ns) = 1.270 ns; Loc. = CLKCTRL_G3; Fanout = 64; COMB Node = 'clock~clkctrl'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "0.170 ns" { clock clock~clkctrl } "NODE_NAME" } "" } } { "GetRoundKey.v" "" { Text "E:/hbx_sms4/GetRoundKey/GetRoundKey.v" 14 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.379 ns) + CELL(0.835 ns) 3.484 ns sbox:sbox3\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|ram_block1a0~porta_address_reg7 3 MEM M4K_X64_Y23 8 " "Info: 3: + IC(1.379 ns) + CELL(0.835 ns) = 3.484 ns; Loc. = M4K_X64_Y23; Fanout = 8; MEM Node = 'sbox:sbox3\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|ram_block1a0~porta_address_reg7'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "2.214 ns" { clock~clkctrl sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg7 } "NODE_NAME" } "" } } { "db/altsyncram_lvp.tdf" "" { Text "E:/hbx_sms4/GetRoundKey/db/altsyncram_lvp.tdf" 41 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.935 ns 55.54 % " "Info: Total cell delay = 1.935 ns ( 55.54 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.549 ns 44.46 % " "Info: Total interconnect delay = 1.549 ns ( 44.46 % )" {  } {  } 0}  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "3.484 ns" { clock clock~clkctrl sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg7 } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "3.484 ns" { clock clock~combout clock~clkctrl sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg7 } { 0.000ns 0.000ns 0.170ns 1.379ns } { 0.000ns 1.100ns 0.000ns 0.835ns } } }  } 0}  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "3.464 ns" { clock clock~clkctrl sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[1] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "3.464 ns" { clock clock~combout clock~clkctrl sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[1] } { 0.000ns 0.000ns 0.170ns 1.379ns } { 0.000ns 1.100ns 0.000ns 0.815ns } } } { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "3.484 ns" { clock clock~clkctrl sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg7 } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "3.484 ns" { clock clock~combout clock~clkctrl sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg7 } { 0.000ns 0.000ns 0.170ns 1.379ns } { 0.000ns 1.100ns 0.000ns 0.835ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.260 ns + " "Info: + Micro clock to output delay of source is 0.260 ns" {  } { { "db/altsyncram_lvp.tdf" "" { Text "E:/hbx_sms4/GetRoundKey/db/altsyncram_lvp.tdf" 41 2 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.046 ns + " "Info: + Micro setup delay of destination is 0.046 ns" {  } { { "db/altsyncram_lvp.tdf" "" { Text "E:/hbx_sms4/GetRoundKey/db/altsyncram_lvp.tdf" 38 2 0 } }  } 0}  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "3.641 ns" { sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg7 sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[1] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "3.641 ns" { sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg7 sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[1] } { 0.000ns 0.000ns } { 0.000ns 3.641ns } } } { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "3.464 ns" { clock clock~clkctrl sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[1] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "3.464 ns" { clock clock~combout clock~clkctrl sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[1] } { 0.000ns 0.000ns 0.170ns 1.379ns } { 0.000ns 1.100ns 0.000ns 0.815ns } } } { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "3.484 ns" { clock clock~clkctrl sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg7 } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "3.484 ns" { clock clock~combout clock~clkctrl sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg7 } { 0.000ns 0.000ns 0.170ns 1.379ns } { 0.000ns 1.100ns 0.000ns 0.835ns } } }  } 0}  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "" { sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[1] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { sbox:sbox3|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[1] } { 0.000ns } { 0.109ns } } } { "db/altsyncram_lvp.tdf" "" { Text "E:/hbx_sms4/GetRoundKey/db/altsyncram_lvp.tdf" 38 2 0 } }  } 0}
{ "Info" "ITDB_TSU_RESULT" "sbox:sbox2\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|ram_block1a0~porta_address_reg2 key2\[18\] clock 9.044 ns memory " "Info: tsu for memory \"sbox:sbox2\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|ram_block1a0~porta_address_reg2\" (data pin = \"key2\[18\]\", clock pin = \"clock\") is 9.044 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "12.395 ns + Longest pin memory " "Info: + Longest pin to memory delay is 12.395 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.934 ns) 0.934 ns key2\[18\] 1 PIN PIN_G12 1 " "Info: 1: + IC(0.000 ns) + CELL(0.934 ns) = 0.934 ns; Loc. = PIN_G12; Fanout = 1; PIN Node = 'key2\[18\]'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "" { key2[18] } "NODE_NAME" } "" } } { "GetRoundKey.v" "" { Text "E:/hbx_sms4/GetRoundKey/GetRoundKey.v" 15 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(6.091 ns) + CELL(0.636 ns) 7.661 ns SBin\[18\]~658 2 COMB LCCOMB_X25_Y50_N18 2 " "Info: 2: + IC(6.091 ns) + CELL(0.636 ns) = 7.661 ns; Loc. = LCCOMB_X25_Y50_N18; Fanout = 2; COMB Node = 'SBin\[18\]~658'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "6.727 ns" { key2[18] SBin[18]~658 } "NODE_NAME" } "" } } { "GetRoundKey.v" "" { Text "E:/hbx_sms4/GetRoundKey/GetRoundKey.v" 20 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.558 ns) + CELL(0.176 ns) 12.395 ns sbox:sbox2\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|ram_block1a0~porta_address_reg2 3 MEM M4K_X55_Y14 8 " "Info: 3: + IC(4.558 ns) + CELL(0.176 ns) = 12.395 ns; Loc. = M4K_X55_Y14; Fanout = 8; MEM Node = 'sbox:sbox2\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|ram_block1a0~porta_address_reg2'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "4.734 ns" { SBin[18]~658 sbox:sbox2|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg2 } "NODE_NAME" } "" } } { "db/altsyncram_lvp.tdf" "" { Text "E:/hbx_sms4/GetRoundKey/db/altsyncram_lvp.tdf" 41 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.746 ns 14.09 % " "Info: Total cell delay = 1.746 ns ( 14.09 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "10.649 ns 85.91 % " "Info: Total interconnect delay = 10.649 ns ( 85.91 % )" {  } {  } 0}  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "12.395 ns" { key2[18] SBin[18]~658 sbox:sbox2|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg2 } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "12.395 ns" { key2[18] key2[18]~combout SBin[18]~658 sbox:sbox2|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg2 } { 0.000ns 0.000ns 6.091ns 4.558ns } { 0.000ns 0.934ns 0.636ns 0.176ns } } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.046 ns + " "Info: + Micro setup delay of destination is 0.046 ns" {  } { { "db/altsyncram_lvp.tdf" "" { Text "E:/hbx_sms4/GetRoundKey/db/altsyncram_lvp.tdf" 41 2 0 } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clock destination 3.397 ns - Shortest memory " "Info: - Shortest clock path from clock \"clock\" to destination memory is 3.397 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.100 ns) 1.100 ns clock 1 CLK PIN_T2 1 " "Info: 1: + IC(0.000 ns) + CELL(1.100 ns) = 1.100 ns; Loc. = PIN_T2; Fanout = 1; CLK Node = 'clock'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "" { clock } "NODE_NAME" } "" } } { "GetRoundKey.v" "" { Text "E:/hbx_sms4/GetRoundKey/GetRoundKey.v" 14 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.170 ns) + CELL(0.000 ns) 1.270 ns clock~clkctrl 2 COMB CLKCTRL_G3 64 " "Info: 2: + IC(0.170 ns) + CELL(0.000 ns) = 1.270 ns; Loc. = CLKCTRL_G3; Fanout = 64; COMB Node = 'clock~clkctrl'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "0.170 ns" { clock clock~clkctrl } "NODE_NAME" } "" } } { "GetRoundKey.v" "" { Text "E:/hbx_sms4/GetRoundKey/GetRoundKey.v" 14 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.292 ns) + CELL(0.835 ns) 3.397 ns sbox:sbox2\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|ram_block1a0~porta_address_reg2 3 MEM M4K_X55_Y14 8 " "Info: 3: + IC(1.292 ns) + CELL(0.835 ns) = 3.397 ns; Loc. = M4K_X55_Y14; Fanout = 8; MEM Node = 'sbox:sbox2\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|ram_block1a0~porta_address_reg2'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "2.127 ns" { clock~clkctrl sbox:sbox2|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg2 } "NODE_NAME" } "" } } { "db/altsyncram_lvp.tdf" "" { Text "E:/hbx_sms4/GetRoundKey/db/altsyncram_lvp.tdf" 41 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.935 ns 56.96 % " "Info: Total cell delay = 1.935 ns ( 56.96 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.462 ns 43.04 % " "Info: Total interconnect delay = 1.462 ns ( 43.04 % )" {  } {  } 0}  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "3.397 ns" { clock clock~clkctrl sbox:sbox2|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg2 } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "3.397 ns" { clock clock~combout clock~clkctrl sbox:sbox2|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg2 } { 0.000ns 0.000ns 0.170ns 1.292ns } { 0.000ns 1.100ns 0.000ns 0.835ns } } }  } 0}  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "12.395 ns" { key2[18] SBin[18]~658 sbox:sbox2|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg2 } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "12.395 ns" { key2[18] key2[18]~combout SBin[18]~658 sbox:sbox2|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg2 } { 0.000ns 0.000ns 6.091ns 4.558ns } { 0.000ns 0.934ns 0.636ns 0.176ns } } } { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "3.397 ns" { clock clock~clkctrl sbox:sbox2|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg2 } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "3.397 ns" { clock clock~combout clock~clkctrl sbox:sbox2|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|ram_block1a0~porta_address_reg2 } { 0.000ns 0.000ns 0.170ns 1.292ns } { 0.000ns 1.100ns 0.000ns 0.835ns } } }  } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "clock rk\[25\] sbox:sbox1\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|q_a\[4\] 14.370 ns memory " "Info: tco from clock \"clock\" to destination pin \"rk\[25\]\" through memory \"sbox:sbox1\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|q_a\[4\]\" is 14.370 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clock source 3.470 ns + Longest memory " "Info: + Longest clock path from clock \"clock\" to source memory is 3.470 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.100 ns) 1.100 ns clock 1 CLK PIN_T2 1 " "Info: 1: + IC(0.000 ns) + CELL(1.100 ns) = 1.100 ns; Loc. = PIN_T2; Fanout = 1; CLK Node = 'clock'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "" { clock } "NODE_NAME" } "" } } { "GetRoundKey.v" "" { Text "E:/hbx_sms4/GetRoundKey/GetRoundKey.v" 14 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.170 ns) + CELL(0.000 ns) 1.270 ns clock~clkctrl 2 COMB CLKCTRL_G3 64 " "Info: 2: + IC(0.170 ns) + CELL(0.000 ns) = 1.270 ns; Loc. = CLKCTRL_G3; Fanout = 64; COMB Node = 'clock~clkctrl'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "0.170 ns" { clock clock~clkctrl } "NODE_NAME" } "" } } { "GetRoundKey.v" "" { Text "E:/hbx_sms4/GetRoundKey/GetRoundKey.v" 14 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.385 ns) + CELL(0.815 ns) 3.470 ns sbox:sbox1\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|q_a\[4\] 3 MEM M4K_X37_Y3 7 " "Info: 3: + IC(1.385 ns) + CELL(0.815 ns) = 3.470 ns; Loc. = M4K_X37_Y3; Fanout = 7; MEM Node = 'sbox:sbox1\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|q_a\[4\]'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "2.200 ns" { clock~clkctrl sbox:sbox1|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[4] } "NODE_NAME" } "" } } { "db/altsyncram_lvp.tdf" "" { Text "E:/hbx_sms4/GetRoundKey/db/altsyncram_lvp.tdf" 38 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.915 ns 55.19 % " "Info: Total cell delay = 1.915 ns ( 55.19 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.555 ns 44.81 % " "Info: Total interconnect delay = 1.555 ns ( 44.81 % )" {  } {  } 0}  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "3.470 ns" { clock clock~clkctrl sbox:sbox1|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[4] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "3.470 ns" { clock clock~combout clock~clkctrl sbox:sbox1|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[4] } { 0.000ns 0.000ns 0.170ns 1.385ns } { 0.000ns 1.100ns 0.000ns 0.815ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.260 ns + " "Info: + Micro clock to output delay of source is 0.260 ns" {  } { { "db/altsyncram_lvp.tdf" "" { Text "E:/hbx_sms4/GetRoundKey/db/altsyncram_lvp.tdf" 38 2 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "10.640 ns + Longest memory pin " "Info: + Longest memory to pin delay is 10.640 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.109 ns) 0.109 ns sbox:sbox1\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|q_a\[4\] 1 MEM M4K_X37_Y3 7 " "Info: 1: + IC(0.000 ns) + CELL(0.109 ns) = 0.109 ns; Loc. = M4K_X37_Y3; Fanout = 7; MEM Node = 'sbox:sbox1\|altsyncram:altsyncram_component\|altsyncram_lvp:auto_generated\|q_a\[4\]'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "" { sbox:sbox1|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[4] } "NODE_NAME" } "" } } { "db/altsyncram_lvp.tdf" "" { Text "E:/hbx_sms4/GetRoundKey/db/altsyncram_lvp.tdf" 38 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.602 ns) + CELL(0.636 ns) 5.347 ns rk~25 2 COMB LCCOMB_X45_Y45_N14 1 " "Info: 2: + IC(4.602 ns) + CELL(0.636 ns) = 5.347 ns; Loc. = LCCOMB_X45_Y45_N14; Fanout = 1; COMB Node = 'rk~25'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "5.238 ns" { sbox:sbox1|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[4] rk~25 } "NODE_NAME" } "" } } { "GetRoundKey.v" "" { Text "E:/hbx_sms4/GetRoundKey/GetRoundKey.v" 16 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.392 ns) + CELL(2.901 ns) 10.640 ns rk\[25\] 3 PIN PIN_C1 0 " "Info: 3: + IC(2.392 ns) + CELL(2.901 ns) = 10.640 ns; Loc. = PIN_C1; Fanout = 0; PIN Node = 'rk\[25\]'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "5.293 ns" { rk~25 rk[25] } "NODE_NAME" } "" } } { "GetRoundKey.v" "" { Text "E:/hbx_sms4/GetRoundKey/GetRoundKey.v" 16 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.646 ns 34.27 % " "Info: Total cell delay = 3.646 ns ( 34.27 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.994 ns 65.73 % " "Info: Total interconnect delay = 6.994 ns ( 65.73 % )" {  } {  } 0}  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "10.640 ns" { sbox:sbox1|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[4] rk~25 rk[25] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "10.640 ns" { sbox:sbox1|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[4] rk~25 rk[25] } { 0.000ns 4.602ns 2.392ns } { 0.109ns 0.636ns 2.901ns } } }  } 0}  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "3.470 ns" { clock clock~clkctrl sbox:sbox1|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[4] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "3.470 ns" { clock clock~combout clock~clkctrl sbox:sbox1|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[4] } { 0.000ns 0.000ns 0.170ns 1.385ns } { 0.000ns 1.100ns 0.000ns 0.815ns } } } { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "10.640 ns" { sbox:sbox1|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[4] rk~25 rk[25] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "10.640 ns" { sbox:sbox1|altsyncram:altsyncram_component|altsyncram_lvp:auto_generated|q_a[4] rk~25 rk[25] } { 0.000ns 4.602ns 2.392ns } { 0.109ns 0.636ns 2.901ns } } }  } 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "key0\[12\] rk\[12\] 13.997 ns Longest " "Info: Longest tpd from source pin \"key0\[12\]\" to destination pin \"rk\[12\]\" is 13.997 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.934 ns) 0.934 ns key0\[12\] 1 PIN PIN_A19 1 " "Info: 1: + IC(0.000 ns) + CELL(0.934 ns) = 0.934 ns; Loc. = PIN_A19; Fanout = 1; PIN Node = 'key0\[12\]'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "" { key0[12] } "NODE_NAME" } "" } } { "GetRoundKey.v" "" { Text "E:/hbx_sms4/GetRoundKey/GetRoundKey.v" 15 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(6.912 ns) + CELL(0.664 ns) 8.510 ns rk~12 2 COMB LCCOMB_X45_Y45_N2 1 " "Info: 2: + IC(6.912 ns) + CELL(0.664 ns) = 8.510 ns; Loc. = LCCOMB_X45_Y45_N2; Fanout = 1; COMB Node = 'rk~12'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "7.576 ns" { key0[12] rk~12 } "NODE_NAME" } "" } } { "GetRoundKey.v" "" { Text "E:/hbx_sms4/GetRoundKey/GetRoundKey.v" 16 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.400 ns) + CELL(3.087 ns) 13.997 ns rk\[12\] 3 PIN PIN_F13 0 " "Info: 3: + IC(2.400 ns) + CELL(3.087 ns) = 13.997 ns; Loc. = PIN_F13; Fanout = 0; PIN Node = 'rk\[12\]'" {  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "5.487 ns" { rk~12 rk[12] } "NODE_NAME" } "" } } { "GetRoundKey.v" "" { Text "E:/hbx_sms4/GetRoundKey/GetRoundKey.v" 16 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.685 ns 33.47 % " "Info: Total cell delay = 4.685 ns ( 33.47 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "9.312 ns 66.53 % " "Info: Total interconnect delay = 9.312 ns ( 66.53 % )" {  } {  } 0}  } { { "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" "" { Report "E:/hbx_sms4/GetRoundKey/db/GetRoundKey_cmp.qrpt" Compiler "GetRoundKey" "UNKNOWN" "V1" "E:/hbx_sms4/GetRoundKey/db/GetRoundKey.quartus_db" { Floorplan "E:/hbx_sms4/GetRoundKey/" "" "13.997 ns" { key0[12] rk~12 rk[12] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "13.997 ns" { key0[12] key0[12]~combout rk~12 rk[12] } { 0.000ns 0.000ns 6.912ns 2.400ns } { 0.000ns 0.934ns 0.664ns 3.087ns } } }  } 0}