📄 fm_main.c
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#include "FM_main.h"
#include "calcfreq.h"
#include "2440addr.h"
#define DEF_DIVIDER_WAIT_1 1000 //---- Initialize
#define DEF_DIVIDER_WAIT_2 500 //----
#define DEF_DIVIDER_WAIT_3 20 //----
#define DEF_DIVIDER_WAIT_4 500 //----
#define DEF_FREQ_POINT1 95
#define DEF_FREQ_POINT2 104
#define DEF_UNLOCK_WAIT
char freq_hi;
char freq_low;
char before_f_h;
char before_f_l;
char status;
char cex_index;
#define DEF_STATE_INIT 0
#define DEF_STATE_IDLE 1
void Set_Frequency(unsigned char f_hi, unsigned char f_low);
//---- the cextable means
//--
//-- st_cex_table[0] :cex=1 max frequency
//-- st_cex_table[1] :cex=2 max frequency
//-- st_cex_table[2] :cex=3 max frequency
//--
struct St_CexTable{
char freq_hi;
char freq_low;
} st_cex_table[3];
void wait_ms(int ms)
{
// wait n ms
Delay(10*ms);
}
void ns73_main()
{
status = DEF_STATE_INIT;
initialize();
ns73_initialize();
Set_Frequency(88,0);
// wait 700ms - 1000ms
while(1);
wait_ms(700);
Initialize_cex_table();
// wait 100ms
wait_ms(100);
before_f_h = 0;
before_f_l = 0;
//---- initialize Frequency 87.5MHz - 108.0MHz
// ex. 87.5
freq_hi = 87;
freq_low = 5;
status = DEF_STATE_IDLE;
while(1)
{
//---- Change Frequency 87.5MHz - 108.0MHz
// ex. 90.0
freq_hi = 90;
freq_low = 0;
ns73_frequency_setup(freq_hi, freq_low);
}
while(1);
}
void Initialize_cex_table()
{
//---- initialize cex table
st_cex_table[0].freq_hi = 0;
st_cex_table[0].freq_low = 0;
st_cex_table[1].freq_hi = 0;
st_cex_table[1].freq_low = 0;
st_cex_table[2].freq_hi = 0;
st_cex_table[2].freq_low = 0;
freq_hi = DEF_NS73_FREQ_SPAN_MIN_H;
freq_low = DEF_NS73_FREQ_SPAN_MIN_L;
cex_index = 3;
Initialize_cex_1mhz(cex_index);
}
void Set_Frequency(unsigned char f_hi, unsigned char f_low)
{
int i,k;
int cex_index_flag=0;
for(k=0;k<30;k++)
{
if(f_hi < 90 )
{
cex_index_flag = 3;
}
else if(f_hi < 95 )
{
cex_index_flag = 2;
}
else if(f_hi < 100 )
{
cex_index_flag = 1;
}
else
{
cex_index_flag = 0;
}
ns73_sub_frequency_change(f_hi, f_low);
wait_ms(50);
ns73_sub_cex_change(cex_index_flag);
wait_ms(50);
// ns73_frequency_setup(f_hi, f_low);
}
}
void Initialize_cex_1mhz()
{
rGPFUP = ((rGPFUP & ~(1<<0)) | (1<<0)); //GPF0
rGPFCON = ((rGPFCON & ~(3<<0)) ); //GPF0=INPUT
ns73_sub_cex_change(cex_index);
while(cex_index != 0){
ns73_sub_frequency_change(freq_hi, freq_low);
wait_ms(500);
if(io_get_unlocksignal() >= DEF_JUDGE_CHECK_COUNT){
freq_hi++;
if(cex_index == 0){
break;
}
}
else{
freq_hi--;
Initialize_cex_01mhz(cex_index);
}
}
}
void Initialize_cex_01mhz()
{
while(1){
ns73_sub_frequency_change(freq_hi, freq_low);
wait_ms(500);
if(io_get_unlocksignal() >= DEF_JUDGE_CHECK_COUNT){
freq_low++;
if(freq_low >= 10){
freq_low = 0;
freq_hi++;
}
}
else{
if(freq_low == 0){
freq_low = 9;
freq_hi--;
}
else{
freq_low--;
}
cex_index--;
st_cex_table[cex_index].freq_hi = freq_hi;
st_cex_table[cex_index].freq_low = freq_low;
ns73_sub_cex_change(cex_index);
freq_hi = freq_hi - 2;
break;
}
}
}
void ns73_initialize()
{
//---- NS73 software reset
ns73_software_reset();
//---- NS73 setup Register set
// PE=on (other zero)
// 0000 0001 b
NS_IICWrite(0, 0x01);
// PLT=on, subC=on
// 1011 0100 b
NS_IICWrite(1, 0xB4);
// PL=0.5mW[0-1], ULD=Enabled[2-3]
// 0000 0101 b
NS_IICWrite(2, 0x07);
// frequency
// 95.0MHz
ns73_frequency_setup(95, 0);
// cex=1
// 0001 1011 b
NS_IICWrite(8, 0x19);
// CIA=1.25uA, CIB=320uA
// 0001 1010 b
NS_IICWrite(6, 0x1A);
}
void ns73_software_reset()
{
NS_IICWrite(DEF_NS73_RESET_ADDRESS, DEF_NS73_RESET_DATA);
}
void ns73_frequency_setup(unsigned char f_hi, unsigned char f_low)
{
char cex;
if( (f_hi < st_cex_table[2].freq_hi) || ( (f_hi == st_cex_table[2].freq_hi) && (f_low < st_cex_table[2].freq_low)) ){
//---- CEX = 3
cex = 3;
}
else if( (f_hi < st_cex_table[1].freq_hi) || ( (f_hi == st_cex_table[1].freq_hi) && (f_low < st_cex_table[1].freq_low)) ){
//---- CEX = 2
cex = 2;
}
else if( (f_hi < st_cex_table[0].freq_hi) || ( (f_hi == st_cex_table[0].freq_hi) && (f_low < st_cex_table[0].freq_low)) ){
//---- CEX = 1
cex = 1;
}
else{
//---- CEX = 0
cex = 0;
}
ns73_sub_cex_change(cex);
// CIA=80uA, CIB=320uA
// 0001 1110 b
NS_IICWrite(6, 0x1E);
ns73_sub_frequency_change(f_hi, f_low);
// CIA=1.25uA, CIB=320uA
// 0001 1010 b
NS_IICWrite(6, 0x1A);
before_f_h = f_hi;
before_f_l = f_low;
}
char ns73_sub_frequency_change(unsigned char f_hi, unsigned char f_low)
{
unsigned char pll[2]; //---- pll [0]=high, [1]=low
char result;
result = calc_pll(&pll[0], &pll[1], f_hi, f_low);
NS_IICWrite(3, pll[0]);
NS_IICWrite(4, pll[1]);
return result;
}
void ns73_sub_cex_change(unsigned char cex)
{
NS_IICWrite(8, (cex & 0x03) | 0x18 );
}
void initialize(void)
{
//---- initialize
}
void NS_IICWrite(unsigned char addr, unsigned char dat)
{
//---- IIC write
Wr24C080(0xcc,addr,dat);
}
unsigned char io_get_unlocksignal(void)
{
//---- TEB port state hi=1 / low=0
int i;
i = rGPFDAT & 0x01;
return (i);
}
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