sinewave.fit.qmsg

sinewave程序是一个正弦波发生器程序。256点查表法

{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "0 3 " "Info: Average interconnect usage is 0% of the available device resources. Peak interconnect usage is 3%." {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:00 " "Info: Fitter routing operations ending: elapsed time is 00:00:00" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0}
{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Info: Design uses memory blocks. Violating setup or hold times of memory block address registers could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements" {  } {  } 0}
{ "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE_TOP_MSG" "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[0\] " "Info: Node sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[0\] uses non-global routing resources to route signals to global destination nodes" { { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear sld_hub:sld_hub_inst\|jtag_debug_mode_usr1 " "Info: Port clear -- assigned as a global for destination node sld_hub:sld_hub_inst\|jtag_debug_mode_usr1 -- routed using non-global resources" {  } { { "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" "" { Report "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" Compiler "sinewave" "UNKNOWN" "V1" "E:/WUWEI/sinewave/db/sinewave.quartus_db" { Floorplan "E:/WUWEI/sinewave/" "" "" { sld_hub:sld_hub_inst|jtag_debug_mode_usr1 } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|jtag_debug_mode_usr1" } } } } { "sld_hub.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 381 -1 0 } } { "E:/WUWEI/sinewave/sinewave.fld" "" { Floorplan "E:/WUWEI/sinewave/sinewave.fld" "" "" { sld_hub:sld_hub_inst|jtag_debug_mode_usr1 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear sld_hub:sld_hub_inst\|jtag_debug_mode_usr0 " "Info: Port clear -- assigned as a global for destination node sld_hub:sld_hub_inst\|jtag_debug_mode_usr0 -- routed using non-global resources" {  } { { "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" "" { Report "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" Compiler "sinewave" "UNKNOWN" "V1" "E:/WUWEI/sinewave/db/sinewave.quartus_db" { Floorplan "E:/WUWEI/sinewave/" "" "" { sld_hub:sld_hub_inst|jtag_debug_mode_usr0 } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|jtag_debug_mode_usr0" } } } } { "sld_hub.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 380 -1 0 } } { "E:/WUWEI/sinewave/sinewave.fld" "" { Floorplan "E:/WUWEI/sinewave/sinewave.fld" "" "" { sld_hub:sld_hub_inst|jtag_debug_mode_usr0 } "NODE_NAME" } }  } 0}  } { { "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" "" { Report "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" Compiler "sinewave" "UNKNOWN" "V1" "E:/WUWEI/sinewave/db/sinewave.quartus_db" { Floorplan "E:/WUWEI/sinewave/" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[0\]" } } } } { "sld_hub.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 1014 -1 0 } } { "E:/WUWEI/sinewave/sinewave.fld" "" { Floorplan "E:/WUWEI/sinewave/sinewave.fld" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0] } "NODE_NAME" } }  } 0}
{ "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE_TOP_MSG" "sld_signaltap:auto_signaltap_0\|reset_all " "Info: Node sld_signaltap:auto_signaltap_0\|reset_all uses non-global routing resources to route signals to global destination nodes" { { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|dffs\[3\] " "Info: Port clear -- assigned as a global for destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|dffs\[3\] -- routed using non-global resources" {  } { { "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" "" { Report "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" Compiler "sinewave" "UNKNOWN" "V1" "E:/WUWEI/sinewave/db/sinewave.quartus_db" { Floorplan "E:/WUWEI/sinewave/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[3] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|dffs\[3\]" } } } } { "lpm_shiftreg.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/lpm_shiftreg.tdf" 54 7 0 } } { "E:/WUWEI/sinewave/sinewave.fld" "" { Floorplan "E:/WUWEI/sinewave/sinewave.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|dffs\[4\] " "Info: Port clear -- assigned as a global for destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|dffs\[4\] -- routed using non-global resources" {  } { { "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" "" { Report "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" Compiler "sinewave" "UNKNOWN" "V1" "E:/WUWEI/sinewave/db/sinewave.quartus_db" { Floorplan "E:/WUWEI/sinewave/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[4] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|dffs\[4\]" } } } } { "lpm_shiftreg.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/lpm_shiftreg.tdf" 54 7 0 } } { "E:/WUWEI/sinewave/sinewave.fld" "" { Floorplan "E:/WUWEI/sinewave/sinewave.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[4] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|dffs\[1\] " "Info: Port clear -- assigned as a global for destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|dffs\[1\] -- routed using non-global resources" {  } { { "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" "" { Report "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" Compiler "sinewave" "UNKNOWN" "V1" "E:/WUWEI/sinewave/db/sinewave.quartus_db" { Floorplan "E:/WUWEI/sinewave/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[1] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|dffs\[1\]" } } } } { "lpm_shiftreg.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/lpm_shiftreg.tdf" 54 7 0 } } { "E:/WUWEI/sinewave/sinewave.fld" "" { Floorplan "E:/WUWEI/sinewave/sinewave.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|dffs\[2\] " "Info: Port clear -- assigned as a global for destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|dffs\[2\] -- routed using non-global resources" {  } { { "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" "" { Report "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" Compiler "sinewave" "UNKNOWN" "V1" "E:/WUWEI/sinewave/db/sinewave.quartus_db" { Floorplan "E:/WUWEI/sinewave/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[2] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|dffs\[2\]" } } } } { "lpm_shiftreg.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/lpm_shiftreg.tdf" 54 7 0 } } { "E:/WUWEI/sinewave/sinewave.fld" "" { Floorplan "E:/WUWEI/sinewave/sinewave.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|dffs\[5\] " "Info: Port clear -- assigned as a global for destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|dffs\[5\] -- routed using non-global resources" {  } { { "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" "" { Report "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" Compiler "sinewave" "UNKNOWN" "V1" "E:/WUWEI/sinewave/db/sinewave.quartus_db" { Floorplan "E:/WUWEI/sinewave/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[5] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|dffs\[5\]" } } } } { "lpm_shiftreg.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/lpm_shiftreg.tdf" 54 7 0 } } { "E:/WUWEI/sinewave/sinewave.fld" "" { Floorplan "E:/WUWEI/sinewave/sinewave.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[5] } "NODE_NAME" } }  } 0}  } { { "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" "" { Report "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" Compiler "sinewave" "UNKNOWN" "V1" "E:/WUWEI/sinewave/db/sinewave.quartus_db" { Floorplan "E:/WUWEI/sinewave/" "" "" { sld_signaltap:auto_signaltap_0|reset_all } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|reset_all" } } } } { "sld_signaltap.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 415 -1 0 } } { "E:/WUWEI/sinewave/sinewave.fld" "" { Floorplan "E:/WUWEI/sinewave/sinewave.fld" "" "" { sld_signaltap:auto_signaltap_0|reset_all } "NODE_NAME" } }  } 0}
{ "Warning" "WFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN" "5 " "Warning: The following 5 pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results" { { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "DSP_RESET GND " "Info: Pin DSP_RESET has GND driving its datain port" {  } { { "sinewave.vhd" "" { Text "E:/WUWEI/sinewave/sinewave.vhd" 10 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "DSP_RESET" } } } } { "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" "" { Report "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" Compiler "sinewave" "UNKNOWN" "V1" "E:/WUWEI/sinewave/db/sinewave.quartus_db" { Floorplan "E:/WUWEI/sinewave/" "" "" { DSP_RESET } "NODE_NAME" } "" } } { "E:/WUWEI/sinewave/sinewave.fld" "" { Floorplan "E:/WUWEI/sinewave/sinewave.fld" "" "" { DSP_RESET } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "CS GND " "Info: Pin CS has GND driving its datain port" {  } { { "sinewave.vhd" "" { Text "E:/WUWEI/sinewave/sinewave.vhd" 11 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "CS" } } } } { "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" "" { Report "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" Compiler "sinewave" "UNKNOWN" "V1" "E:/WUWEI/sinewave/db/sinewave.quartus_db" { Floorplan "E:/WUWEI/sinewave/" "" "" { CS } "NODE_NAME" } "" } } { "E:/WUWEI/sinewave/sinewave.fld" "" { Floorplan "E:/WUWEI/sinewave/sinewave.fld" "" "" { CS } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "wr GND " "Info: Pin wr has GND driving its datain port" {  } { { "sinewave.vhd" "" { Text "E:/WUWEI/sinewave/sinewave.vhd" 12 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "wr" } } } } { "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" "" { Report "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" Compiler "sinewave" "UNKNOWN" "V1" "E:/WUWEI/sinewave/db/sinewave.quartus_db" { Floorplan "E:/WUWEI/sinewave/" "" "" { wr } "NODE_NAME" } "" } } { "E:/WUWEI/sinewave/sinewave.fld" "" { Floorplan "E:/WUWEI/sinewave/sinewave.fld" "" "" { wr } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "busopen GND " "Info: Pin busopen has GND driving its datain port" {  } { { "sinewave.vhd" "" { Text "E:/WUWEI/sinewave/sinewave.vhd" 13 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "busopen" } } } } { "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" "" { Report "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" Compiler "sinewave" "UNKNOWN" "V1" "E:/WUWEI/sinewave/db/sinewave.quartus_db" { Floorplan "E:/WUWEI/sinewave/" "" "" { busopen } "NODE_NAME" } "" } } { "E:/WUWEI/sinewave/sinewave.fld" "" { Floorplan "E:/WUWEI/sinewave/sinewave.fld" "" "" { busopen } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "dir VCC " "Info: Pin dir has VCC driving its datain port" {  } { { "sinewave.vhd" "" { Text "E:/WUWEI/sinewave/sinewave.vhd" 13 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "dir" } } } } { "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" "" { Report "E:/WUWEI/sinewave/db/sinewave_cmp.qrpt" Compiler "sinewave" "UNKNOWN" "V1" "E:/WUWEI/sinewave/db/sinewave.quartus_db" { Floorplan "E:/WUWEI/sinewave/" "" "" { dir } "NODE_NAME" } "" } } { "E:/WUWEI/sinewave/sinewave.fld" "" { Floorplan "E:/WUWEI/sinewave/sinewave.fld" "" "" { dir } "NODE_NAME" } }  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 1  Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Wed Aug 08 16:18:02 2007 " "Info: Processing ended: Wed Aug 08 16:18:02 2007" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:07 " "Info: Elapsed time: 00:00:07" {  } {  } 0}  } {  } 0}