sinewave.map.qmsg

sinewave程序是一个正弦波发生器程序。256点查表法

{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus50/libraries/megafunctions/lpm_decode.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/lpm_decode.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_decode " "Info: Found entity 1: lpm_decode" {  } { { "lpm_decode.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/lpm_decode.tdf" 62 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/decode_9ie.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/decode_9ie.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 decode_9ie " "Info: Found entity 1: decode_9ie" {  } { { "db/decode_9ie.tdf" "" { Text "E:/WUWEI/sinewave/db/decode_9ie.tdf" 22 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus50/libraries/megafunctions/sld_dffex.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/sld_dffex.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_dffex-DFFEX " "Info: Found design unit 1: sld_dffex-DFFEX" {  } { { "sld_dffex.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_dffex.vhd" 11 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_dffex " "Info: Found entity 1: sld_dffex" {  } { { "sld_dffex.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_dffex.vhd" 4 -1 0 } }  } 0}  } {  } 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "1 " "Info: Inferred 1 megafunctions from design logic" { { "Info" "IOPT_ALTSYNCRAM_ROM_INFERRED" "Mux~1920 256 8 " "Info: Inferred altsyncram megafunction (OPERATION_MODE=ROM, NUMWORDS_A=256, WIDTH_A=8) from the following design logic: \"Mux~1920\"" {  } {  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_mcj.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_mcj.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_mcj " "Info: Found entity 1: altsyncram_mcj" {  } { { "db/altsyncram_mcj.tdf" "" { Text "E:/WUWEI/sinewave/db/altsyncram_mcj.tdf" 34 1 0 } }  } 0}  } {  } 0}
{ "Info" "IOPT_MLS_IGNORED_SUMMARY" "5 " "Info: Ignored 5 buffer(s)" { { "Info" "IOPT_MLS_IGNORED_SOFT" "5 " "Info: Ignored 5 SOFT buffer(s)" {  } {  } 0}  } {  } 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[7\] sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[7\] " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[7\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[7\]\"" {  } { { "sld_signaltap.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 434 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[7\] sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:7:sm1\|holdff " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[7\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:7:sm1\|holdff\"" {  } { { "sld_signaltap.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[0\] sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[0\] " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[0\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[0\]\"" {  } { { "sld_signaltap.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 434 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[0\] sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1\|holdff " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[0\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1\|holdff\"" {  } { { "sld_signaltap.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[1\] sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[1\] " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[1\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[1\]\"" {  } { { "sld_signaltap.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 434 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[1\] sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:1:sm1\|holdff " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[1\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:1:sm1\|holdff\"" {  } { { "sld_signaltap.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[2\] sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[2\] " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[2\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[2\]\"" {  } { { "sld_signaltap.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 434 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[2\] sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1\|holdff " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[2\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1\|holdff\"" {  } { { "sld_signaltap.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[3\] sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[3\] " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[3\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[3\]\"" {  } { { "sld_signaltap.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 434 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[3\] sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:3:sm1\|holdff " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[3\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:3:sm1\|holdff\"" {  } { { "sld_signaltap.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[4\] sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[4\] " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[4\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[4\]\"" {  } { { "sld_signaltap.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 434 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[4\] sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1\|holdff " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[4\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1\|holdff\"" {  } { { "sld_signaltap.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[6\] sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[6\] " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[6\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[6\]\"" {  } { { "sld_signaltap.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 434 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[6\] sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:6:sm1\|holdff " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[6\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:6:sm1\|holdff\"" {  } { { "sld_signaltap.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[5\] sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[5\] " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[5\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[5\]\"" {  } { { "sld_signaltap.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 434 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[5\] sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:5:sm1\|holdff " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[5\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:5:sm1\|holdff\"" {  } { { "sld_signaltap.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0}  } {  } 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "DSP_RESET GND " "Warning: Pin \"DSP_RESET\" stuck at GND" {  } { { "sinewave.vhd" "" { Text "E:/WUWEI/sinewave/sinewave.vhd" 10 -1 0 } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "CS GND " "Warning: Pin \"CS\" stuck at GND" {  } { { "sinewave.vhd" "" { Text "E:/WUWEI/sinewave/sinewave.vhd" 11 -1 0 } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "wr GND " "Warning: Pin \"wr\" stuck at GND" {  } { { "sinewave.vhd" "" { Text "E:/WUWEI/sinewave/sinewave.vhd" 12 -1 0 } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "busopen GND " "Warning: Pin \"busopen\" stuck at GND" {  } { { "sinewave.vhd" "" { Text "E:/WUWEI/sinewave/sinewave.vhd" 13 -1 0 } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "dir VCC " "Warning: Pin \"dir\" stuck at VCC" {  } { { "sinewave.vhd" "" { Text "E:/WUWEI/sinewave/sinewave.vhd" 13 -1 0 } }  } 0}  } {  } 0}
{ "Info" "IFTM_FTM_PRESET_POWER_UP" "" "Info: Registers with preset signals will power-up high" {  } { { "sld_hub.vhd" "" { Text "d:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "369 " "Info: Implemented 369 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "4 " "Info: Implemented 4 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "14 " "Info: Implemented 14 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_LCELLS" "334 " "Info: Implemented 334 logic cells" {  } {  } 0} { "Info" "ISCL_SCL_TM_RAMS" "16 " "Info: Implemented 16 RAM segments" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 6 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 6 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Wed Aug 08 16:17:54 2007 " "Info: Processing ended: Wed Aug 08 16:17:54 2007" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:09 " "Info: Elapsed time: 00:00:09" {  } {  } 0}  } {  } 0}