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📄 sinewave.fit.eqn

📁 sinewave程序是一个正弦波发生器程序。256点查表法
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--FB1_q_a[7] is altsyncram:Mux_rtl_0|altsyncram_mcj:auto_generated|q_a[7] at M4K_X33_Y18
--RAM Block Operation Mode: ROM
--Port A Depth: 256, Port A Width: 8
--Port A Logical Depth: 256, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Un-registered
FB1_q_a[7]_PORT_A_address = BUS(count_out[0], count_out[1], count_out[2], count_out[3], count_out[4], count_out[5], count_out[6], count_out[7]);
FB1_q_a[7]_PORT_A_address_reg = DFFE(FB1_q_a[7]_PORT_A_address, FB1_q_a[7]_clock_0, , , );
FB1_q_a[7]_clock_0 = GLOBAL(clk_temp);
FB1_q_a[7]_PORT_A_data_out = MEMORY(, , FB1_q_a[7]_PORT_A_address_reg, , , , , , FB1_q_a[7]_clock_0, , , , , );
FB1_q_a[7] = FB1_q_a[7]_PORT_A_data_out[0];

--FB1_q_a[0] is altsyncram:Mux_rtl_0|altsyncram_mcj:auto_generated|q_a[0] at M4K_X33_Y18
FB1_q_a[7]_PORT_A_address = BUS(count_out[0], count_out[1], count_out[2], count_out[3], count_out[4], count_out[5], count_out[6], count_out[7]);
FB1_q_a[7]_PORT_A_address_reg = DFFE(FB1_q_a[7]_PORT_A_address, FB1_q_a[7]_clock_0, , , );
FB1_q_a[7]_clock_0 = GLOBAL(clk_temp);
FB1_q_a[7]_PORT_A_data_out = MEMORY(, , FB1_q_a[7]_PORT_A_address_reg, , , , , , FB1_q_a[7]_clock_0, , , , , );
FB1_q_a[0] = FB1_q_a[7]_PORT_A_data_out[7];

--FB1_q_a[1] is altsyncram:Mux_rtl_0|altsyncram_mcj:auto_generated|q_a[1] at M4K_X33_Y18
FB1_q_a[7]_PORT_A_address = BUS(count_out[0], count_out[1], count_out[2], count_out[3], count_out[4], count_out[5], count_out[6], count_out[7]);
FB1_q_a[7]_PORT_A_address_reg = DFFE(FB1_q_a[7]_PORT_A_address, FB1_q_a[7]_clock_0, , , );
FB1_q_a[7]_clock_0 = GLOBAL(clk_temp);
FB1_q_a[7]_PORT_A_data_out = MEMORY(, , FB1_q_a[7]_PORT_A_address_reg, , , , , , FB1_q_a[7]_clock_0, , , , , );
FB1_q_a[1] = FB1_q_a[7]_PORT_A_data_out[6];

--FB1_q_a[2] is altsyncram:Mux_rtl_0|altsyncram_mcj:auto_generated|q_a[2] at M4K_X33_Y18
FB1_q_a[7]_PORT_A_address = BUS(count_out[0], count_out[1], count_out[2], count_out[3], count_out[4], count_out[5], count_out[6], count_out[7]);
FB1_q_a[7]_PORT_A_address_reg = DFFE(FB1_q_a[7]_PORT_A_address, FB1_q_a[7]_clock_0, , , );
FB1_q_a[7]_clock_0 = GLOBAL(clk_temp);
FB1_q_a[7]_PORT_A_data_out = MEMORY(, , FB1_q_a[7]_PORT_A_address_reg, , , , , , FB1_q_a[7]_clock_0, , , , , );
FB1_q_a[2] = FB1_q_a[7]_PORT_A_data_out[5];

--FB1_q_a[3] is altsyncram:Mux_rtl_0|altsyncram_mcj:auto_generated|q_a[3] at M4K_X33_Y18
FB1_q_a[7]_PORT_A_address = BUS(count_out[0], count_out[1], count_out[2], count_out[3], count_out[4], count_out[5], count_out[6], count_out[7]);
FB1_q_a[7]_PORT_A_address_reg = DFFE(FB1_q_a[7]_PORT_A_address, FB1_q_a[7]_clock_0, , , );
FB1_q_a[7]_clock_0 = GLOBAL(clk_temp);
FB1_q_a[7]_PORT_A_data_out = MEMORY(, , FB1_q_a[7]_PORT_A_address_reg, , , , , , FB1_q_a[7]_clock_0, , , , , );
FB1_q_a[3] = FB1_q_a[7]_PORT_A_data_out[4];

--FB1_q_a[4] is altsyncram:Mux_rtl_0|altsyncram_mcj:auto_generated|q_a[4] at M4K_X33_Y18
FB1_q_a[7]_PORT_A_address = BUS(count_out[0], count_out[1], count_out[2], count_out[3], count_out[4], count_out[5], count_out[6], count_out[7]);
FB1_q_a[7]_PORT_A_address_reg = DFFE(FB1_q_a[7]_PORT_A_address, FB1_q_a[7]_clock_0, , , );
FB1_q_a[7]_clock_0 = GLOBAL(clk_temp);
FB1_q_a[7]_PORT_A_data_out = MEMORY(, , FB1_q_a[7]_PORT_A_address_reg, , , , , , FB1_q_a[7]_clock_0, , , , , );
FB1_q_a[4] = FB1_q_a[7]_PORT_A_data_out[3];

--FB1_q_a[5] is altsyncram:Mux_rtl_0|altsyncram_mcj:auto_generated|q_a[5] at M4K_X33_Y18
FB1_q_a[7]_PORT_A_address = BUS(count_out[0], count_out[1], count_out[2], count_out[3], count_out[4], count_out[5], count_out[6], count_out[7]);
FB1_q_a[7]_PORT_A_address_reg = DFFE(FB1_q_a[7]_PORT_A_address, FB1_q_a[7]_clock_0, , , );
FB1_q_a[7]_clock_0 = GLOBAL(clk_temp);
FB1_q_a[7]_PORT_A_data_out = MEMORY(, , FB1_q_a[7]_PORT_A_address_reg, , , , , , FB1_q_a[7]_clock_0, , , , , );
FB1_q_a[5] = FB1_q_a[7]_PORT_A_data_out[2];

--FB1_q_a[6] is altsyncram:Mux_rtl_0|altsyncram_mcj:auto_generated|q_a[6] at M4K_X33_Y18
FB1_q_a[7]_PORT_A_address = BUS(count_out[0], count_out[1], count_out[2], count_out[3], count_out[4], count_out[5], count_out[6], count_out[7]);
FB1_q_a[7]_PORT_A_address_reg = DFFE(FB1_q_a[7]_PORT_A_address, FB1_q_a[7]_clock_0, , , );
FB1_q_a[7]_clock_0 = GLOBAL(clk_temp);
FB1_q_a[7]_PORT_A_data_out = MEMORY(, , FB1_q_a[7]_PORT_A_address_reg, , , , , , FB1_q_a[7]_clock_0, , , , , );
FB1_q_a[6] = FB1_q_a[7]_PORT_A_data_out[1];


--A1L6 is altera_internal_jtag~TDO at JTAG_X1_Y13_N1
A1L6 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !D1_hub_tdo);

--A1L7 is altera_internal_jtag~TMSUTAP at JTAG_X1_Y13_N1
A1L7 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !D1_hub_tdo);

--A1L5 is altera_internal_jtag~TCKUTAP at JTAG_X1_Y13_N1
A1L5 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !D1_hub_tdo);

--altera_internal_jtag is altera_internal_jtag at JTAG_X1_Y13_N1
altera_internal_jtag = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !D1_hub_tdo);


--clk_temp is clk_temp at LC_X8_Y13_N4
--operation mode is normal

clk_temp_lut_out = !clk_temp;
clk_temp = DFFEAS(clk_temp_lut_out, GLOBAL(clk), VCC, , A1L71, , , , );


--count_out[0] is count_out[0] at LC_X32_Y18_N0
--operation mode is arithmetic

count_out[0]_lut_out = !count_out[0];
count_out[0] = DFFEAS(count_out[0]_lut_out, GLOBAL(clk_temp), VCC, , , , , , );

--A1L64 is count_out[0]~57 at LC_X32_Y18_N0
--operation mode is arithmetic

A1L64_cout_0 = count_out[0];
A1L64 = CARRY(A1L64_cout_0);

--A1L74 is count_out[0]~57COUT1_89 at LC_X32_Y18_N0
--operation mode is arithmetic

A1L74_cout_1 = count_out[0];
A1L74 = CARRY(A1L74_cout_1);


--count_out[1] is count_out[1] at LC_X32_Y18_N1
--operation mode is arithmetic

count_out[1]_lut_out = count_out[1] $ (A1L64);
count_out[1] = DFFEAS(count_out[1]_lut_out, GLOBAL(clk_temp), VCC, , , , , , );

--A1L94 is count_out[1]~61 at LC_X32_Y18_N1
--operation mode is arithmetic

A1L94_cout_0 = !A1L64 # !count_out[1];
A1L94 = CARRY(A1L94_cout_0);

--A1L05 is count_out[1]~61COUT1_90 at LC_X32_Y18_N1
--operation mode is arithmetic

A1L05_cout_1 = !A1L74 # !count_out[1];
A1L05 = CARRY(A1L05_cout_1);


--count_out[2] is count_out[2] at LC_X32_Y18_N2
--operation mode is arithmetic

count_out[2]_lut_out = count_out[2] $ (!A1L94);
count_out[2] = DFFEAS(count_out[2]_lut_out, GLOBAL(clk_temp), VCC, , , , , , );

--A1L25 is count_out[2]~65 at LC_X32_Y18_N2
--operation mode is arithmetic

A1L25_cout_0 = count_out[2] & (!A1L94);
A1L25 = CARRY(A1L25_cout_0);

--A1L35 is count_out[2]~65COUT1_91 at LC_X32_Y18_N2
--operation mode is arithmetic

A1L35_cout_1 = count_out[2] & (!A1L05);
A1L35 = CARRY(A1L35_cout_1);


--count_out[3] is count_out[3] at LC_X32_Y18_N3
--operation mode is arithmetic

count_out[3]_lut_out = count_out[3] $ A1L25;
count_out[3] = DFFEAS(count_out[3]_lut_out, GLOBAL(clk_temp), VCC, , , , , , );

--A1L55 is count_out[3]~69 at LC_X32_Y18_N3
--operation mode is arithmetic

A1L55_cout_0 = !A1L25 # !count_out[3];
A1L55 = CARRY(A1L55_cout_0);

--A1L65 is count_out[3]~69COUT1 at LC_X32_Y18_N3
--operation mode is arithmetic

A1L65_cout_1 = !A1L35 # !count_out[3];
A1L65 = CARRY(A1L65_cout_1);


--count_out[4] is count_out[4] at LC_X32_Y18_N4
--operation mode is arithmetic

count_out[4]_lut_out = count_out[4] $ !A1L55;
count_out[4] = DFFEAS(count_out[4]_lut_out, GLOBAL(clk_temp), VCC, , , , , , );

--A1L85 is count_out[4]~73 at LC_X32_Y18_N4
--operation mode is arithmetic

A1L85 = A1L95;


--count_out[5] is count_out[5] at LC_X32_Y18_N5
--operation mode is arithmetic

count_out[5]_carry_eqn = (!A1L85 & GND) # (A1L85 & VCC);
count_out[5]_lut_out = count_out[5] $ count_out[5]_carry_eqn;
count_out[5] = DFFEAS(count_out[5]_lut_out, GLOBAL(clk_temp), VCC, , , , , , );

--A1L26 is count_out[5]~77 at LC_X32_Y18_N5
--operation mode is arithmetic

A1L26_cout_0 = !A1L85 # !count_out[5];
A1L26 = CARRY(A1L26_cout_0);

--A1L36 is count_out[5]~77COUT1_92 at LC_X32_Y18_N5
--operation mode is arithmetic

A1L36_cout_1 = !A1L85 # !count_out[5];
A1L36 = CARRY(A1L36_cout_1);


--count_out[6] is count_out[6] at LC_X32_Y18_N6
--operation mode is arithmetic

count_out[6]_carry_eqn = (!A1L85 & A1L26) # (A1L85 & A1L36);
count_out[6]_lut_out = count_out[6] $ (!count_out[6]_carry_eqn);
count_out[6] = DFFEAS(count_out[6]_lut_out, GLOBAL(clk_temp), VCC, , , , , , );

--A1L56 is count_out[6]~81 at LC_X32_Y18_N6
--operation mode is arithmetic

A1L56_cout_0 = count_out[6] & (!A1L26);
A1L56 = CARRY(A1L56_cout_0);

--A1L66 is count_out[6]~81COUT1_93 at LC_X32_Y18_N6
--operation mode is arithmetic

A1L66_cout_1 = count_out[6] & (!A1L36);
A1L66 = CARRY(A1L66_cout_1);


--count_out[7] is count_out[7] at LC_X32_Y18_N7
--operation mode is normal

count_out[7]_carry_eqn = (!A1L85 & A1L56) # (A1L85 & A1L66);
count_out[7]_lut_out = count_out[7] $ (count_out[7]_carry_eqn);
count_out[7] = DFFEAS(count_out[7]_lut_out, GLOBAL(clk_temp), VCC, , , , , , );


--D1_hub_tdo is sld_hub:sld_hub_inst|hub_tdo at LC_X30_Y14_N0
--operation mode is normal

D1_hub_tdo = AMPP_FUNCTION(!A1L5, D1L51, D1L71, GB5_Q[0], D1L31, !JB1_state[8], JB1L81);


--count_clk[0] is count_clk[0] at LC_X9_Y12_N0
--operation mode is arithmetic

count_clk[0]_lut_out = !count_clk[0];
count_clk[0] = DFFEAS(count_clk[0]_lut_out, GLOBAL(clk), VCC, , , , , A1L08, );

--A1L22 is count_clk[0]~187 at LC_X9_Y12_N0
--operation mode is arithmetic

A1L22_cout_0 = count_clk[0];
A1L22 = CARRY(A1L22_cout_0);

--A1L32 is count_clk[0]~187COUT1_219 at LC_X9_Y12_N0
--operation mode is arithmetic

A1L32_cout_1 = count_clk[0];
A1L32 = CARRY(A1L32_cout_1);


--count_clk[1] is count_clk[1] at LC_X9_Y12_N1
--operation mode is arithmetic

count_clk[1]_lut_out = count_clk[1] $ (A1L22);
count_clk[1] = DFFEAS(count_clk[1]_lut_out, GLOBAL(clk), VCC, , , , , A1L08, );

--A1L52 is count_clk[1]~191 at LC_X9_Y12_N1
--operation mode is arithmetic

A1L52_cout_0 = !A1L22 # !count_clk[1];
A1L52 = CARRY(A1L52_cout_0);

--A1L62 is count_clk[1]~191COUT1_220 at LC_X9_Y12_N1
--operation mode is arithmetic

A1L62_cout_1 = !A1L32 # !count_clk[1];
A1L62 = CARRY(A1L62_cout_1);


--count_clk[2] is count_clk[2] at LC_X9_Y12_N2
--operation mode is arithmetic

count_clk[2]_lut_out = count_clk[2] $ (!A1L52);
count_clk[2] = DFFEAS(count_clk[2]_lut_out, GLOBAL(clk), VCC, , , , , A1L08, );

--A1L82 is count_clk[2]~195 at LC_X9_Y12_N2
--operation mode is arithmetic

A1L82_cout_0 = count_clk[2] & (!A1L52);
A1L82 = CARRY(A1L82_cout_0);

--A1L92 is count_clk[2]~195COUT1_221 at LC_X9_Y12_N2
--operation mode is arithmetic

A1L92_cout_1 = count_clk[2] & (!A1L62);
A1L92 = CARRY(A1L92_cout_1);


--count_clk[3] is count_clk[3] at LC_X9_Y12_N3
--operation mode is arithmetic

count_clk[3]_lut_out = count_clk[3] $ A1L82;
count_clk[3] = DFFEAS(count_clk[3]_lut_out, GLOBAL(clk), VCC, , , , , A1L08, );

--A1L13 is count_clk[3]~199 at LC_X9_Y12_N3
--operation mode is arithmetic

A1L13_cout_0 = !A1L82 # !count_clk[3];
A1L13 = CARRY(A1L13_cout_0);

--A1L23 is count_clk[3]~199COUT1 at LC_X9_Y12_N3
--operation mode is arithmetic

A1L23_cout_1 = !A1L92 # !count_clk[3];
A1L23 = CARRY(A1L23_cout_1);


--count_clk[4] is count_clk[4] at LC_X9_Y12_N4
--operation mode is arithmetic

count_clk[4]_lut_out = count_clk[4] $ !A1L13;
count_clk[4] = DFFEAS(count_clk[4]_lut_out, GLOBAL(clk), VCC, , , , , A1L08, );

--A1L43 is count_clk[4]~203 at LC_X9_Y12_N4
--operation mode is arithmetic

A1L43 = A1L53;

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