sinewave.map.eqn

sinewave程序是一个正弦波发生器程序。256点查表法

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--FB1_q_a[7] is altsyncram:Mux_rtl_0|altsyncram_mcj:auto_generated|q_a[7]
--RAM Block Operation Mode: ROM
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Un-registered
FB1_q_a[7]_PORT_A_address = BUS(count_out[0], count_out[1], count_out[2], count_out[3], count_out[4], count_out[5], count_out[6], count_out[7]);
FB1_q_a[7]_PORT_A_address_reg = DFFE(FB1_q_a[7]_PORT_A_address, FB1_q_a[7]_clock_0, , , );
FB1_q_a[7]_clock_0 = clk_temp;
FB1_q_a[7]_PORT_A_data_out = MEMORY(, , FB1_q_a[7]_PORT_A_address_reg, , , , , , FB1_q_a[7]_clock_0, , , , , );
FB1_q_a[7] = FB1_q_a[7]_PORT_A_data_out[0];


--FB1_q_a[6] is altsyncram:Mux_rtl_0|altsyncram_mcj:auto_generated|q_a[6]
--RAM Block Operation Mode: ROM
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Un-registered
FB1_q_a[6]_PORT_A_address = BUS(count_out[0], count_out[1], count_out[2], count_out[3], count_out[4], count_out[5], count_out[6], count_out[7]);
FB1_q_a[6]_PORT_A_address_reg = DFFE(FB1_q_a[6]_PORT_A_address, FB1_q_a[6]_clock_0, , , );
FB1_q_a[6]_clock_0 = clk_temp;
FB1_q_a[6]_PORT_A_data_out = MEMORY(, , FB1_q_a[6]_PORT_A_address_reg, , , , , , FB1_q_a[6]_clock_0, , , , , );
FB1_q_a[6] = FB1_q_a[6]_PORT_A_data_out[0];


--FB1_q_a[5] is altsyncram:Mux_rtl_0|altsyncram_mcj:auto_generated|q_a[5]
--RAM Block Operation Mode: ROM
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Un-registered
FB1_q_a[5]_PORT_A_address = BUS(count_out[0], count_out[1], count_out[2], count_out[3], count_out[4], count_out[5], count_out[6], count_out[7]);
FB1_q_a[5]_PORT_A_address_reg = DFFE(FB1_q_a[5]_PORT_A_address, FB1_q_a[5]_clock_0, , , );
FB1_q_a[5]_clock_0 = clk_temp;
FB1_q_a[5]_PORT_A_data_out = MEMORY(, , FB1_q_a[5]_PORT_A_address_reg, , , , , , FB1_q_a[5]_clock_0, , , , , );
FB1_q_a[5] = FB1_q_a[5]_PORT_A_data_out[0];


--FB1_q_a[4] is altsyncram:Mux_rtl_0|altsyncram_mcj:auto_generated|q_a[4]
--RAM Block Operation Mode: ROM
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Un-registered
FB1_q_a[4]_PORT_A_address = BUS(count_out[0], count_out[1], count_out[2], count_out[3], count_out[4], count_out[5], count_out[6], count_out[7]);
FB1_q_a[4]_PORT_A_address_reg = DFFE(FB1_q_a[4]_PORT_A_address, FB1_q_a[4]_clock_0, , , );
FB1_q_a[4]_clock_0 = clk_temp;
FB1_q_a[4]_PORT_A_data_out = MEMORY(, , FB1_q_a[4]_PORT_A_address_reg, , , , , , FB1_q_a[4]_clock_0, , , , , );
FB1_q_a[4] = FB1_q_a[4]_PORT_A_data_out[0];


--FB1_q_a[3] is altsyncram:Mux_rtl_0|altsyncram_mcj:auto_generated|q_a[3]
--RAM Block Operation Mode: ROM
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Un-registered
FB1_q_a[3]_PORT_A_address = BUS(count_out[0], count_out[1], count_out[2], count_out[3], count_out[4], count_out[5], count_out[6], count_out[7]);
FB1_q_a[3]_PORT_A_address_reg = DFFE(FB1_q_a[3]_PORT_A_address, FB1_q_a[3]_clock_0, , , );
FB1_q_a[3]_clock_0 = clk_temp;
FB1_q_a[3]_PORT_A_data_out = MEMORY(, , FB1_q_a[3]_PORT_A_address_reg, , , , , , FB1_q_a[3]_clock_0, , , , , );
FB1_q_a[3] = FB1_q_a[3]_PORT_A_data_out[0];


--FB1_q_a[2] is altsyncram:Mux_rtl_0|altsyncram_mcj:auto_generated|q_a[2]
--RAM Block Operation Mode: ROM
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Un-registered
FB1_q_a[2]_PORT_A_address = BUS(count_out[0], count_out[1], count_out[2], count_out[3], count_out[4], count_out[5], count_out[6], count_out[7]);
FB1_q_a[2]_PORT_A_address_reg = DFFE(FB1_q_a[2]_PORT_A_address, FB1_q_a[2]_clock_0, , , );
FB1_q_a[2]_clock_0 = clk_temp;
FB1_q_a[2]_PORT_A_data_out = MEMORY(, , FB1_q_a[2]_PORT_A_address_reg, , , , , , FB1_q_a[2]_clock_0, , , , , );
FB1_q_a[2] = FB1_q_a[2]_PORT_A_data_out[0];


--FB1_q_a[1] is altsyncram:Mux_rtl_0|altsyncram_mcj:auto_generated|q_a[1]
--RAM Block Operation Mode: ROM
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Un-registered
FB1_q_a[1]_PORT_A_address = BUS(count_out[0], count_out[1], count_out[2], count_out[3], count_out[4], count_out[5], count_out[6], count_out[7]);
FB1_q_a[1]_PORT_A_address_reg = DFFE(FB1_q_a[1]_PORT_A_address, FB1_q_a[1]_clock_0, , , );
FB1_q_a[1]_clock_0 = clk_temp;
FB1_q_a[1]_PORT_A_data_out = MEMORY(, , FB1_q_a[1]_PORT_A_address_reg, , , , , , FB1_q_a[1]_clock_0, , , , , );
FB1_q_a[1] = FB1_q_a[1]_PORT_A_data_out[0];


--FB1_q_a[0] is altsyncram:Mux_rtl_0|altsyncram_mcj:auto_generated|q_a[0]
--RAM Block Operation Mode: ROM
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Un-registered
FB1_q_a[0]_PORT_A_address = BUS(count_out[0], count_out[1], count_out[2], count_out[3], count_out[4], count_out[5], count_out[6], count_out[7]);
FB1_q_a[0]_PORT_A_address_reg = DFFE(FB1_q_a[0]_PORT_A_address, FB1_q_a[0]_clock_0, , , );
FB1_q_a[0]_clock_0 = clk_temp;
FB1_q_a[0]_PORT_A_data_out = MEMORY(, , FB1_q_a[0]_PORT_A_address_reg, , , , , , FB1_q_a[0]_clock_0, , , , , );
FB1_q_a[0] = FB1_q_a[0]_PORT_A_data_out[0];


--A1L6 is altera_internal_jtag~TDO
A1L6 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !D1_hub_tdo);

--A1L7 is altera_internal_jtag~TMSUTAP
A1L7 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !D1_hub_tdo);

--A1L5 is altera_internal_jtag~TCKUTAP
A1L5 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !D1_hub_tdo);

--altera_internal_jtag is altera_internal_jtag
altera_internal_jtag = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !D1_hub_tdo);


--clk_temp is clk_temp
--operation mode is normal

clk_temp_lut_out = !clk_temp;
clk_temp = DFFEAS(clk_temp_lut_out, clk, VCC, , A1L71, , , , );


--count_out[0] is count_out[0]
--operation mode is arithmetic

count_out[0]_lut_out = !count_out[0];
count_out[0] = DFFEAS(count_out[0]_lut_out, clk_temp, VCC, , , , , , );

--A1L83 is count_out[0]~57
--operation mode is arithmetic

A1L83 = CARRY(count_out[0]);


--count_out[1] is count_out[1]
--operation mode is arithmetic

count_out[1]_carry_eqn = A1L83;
count_out[1]_lut_out = count_out[1] $ (count_out[1]_carry_eqn);
count_out[1] = DFFEAS(count_out[1]_lut_out, clk_temp, VCC, , , , , , );

--A1L04 is count_out[1]~61
--operation mode is arithmetic

A1L04 = CARRY(!A1L83 # !count_out[1]);


--count_out[2] is count_out[2]
--operation mode is arithmetic

count_out[2]_carry_eqn = A1L04;
count_out[2]_lut_out = count_out[2] $ (!count_out[2]_carry_eqn);
count_out[2] = DFFEAS(count_out[2]_lut_out, clk_temp, VCC, , , , , , );

--A1L24 is count_out[2]~65
--operation mode is arithmetic

A1L24 = CARRY(count_out[2] & (!A1L04));


--count_out[3] is count_out[3]
--operation mode is arithmetic

count_out[3]_carry_eqn = A1L24;
count_out[3]_lut_out = count_out[3] $ (count_out[3]_carry_eqn);
count_out[3] = DFFEAS(count_out[3]_lut_out, clk_temp, VCC, , , , , , );

--A1L44 is count_out[3]~69
--operation mode is arithmetic

A1L44 = CARRY(!A1L24 # !count_out[3]);


--count_out[4] is count_out[4]
--operation mode is arithmetic

count_out[4]_carry_eqn = A1L44;
count_out[4]_lut_out = count_out[4] $ (!count_out[4]_carry_eqn);
count_out[4] = DFFEAS(count_out[4]_lut_out, clk_temp, VCC, , , , , , );

--A1L64 is count_out[4]~73
--operation mode is arithmetic

A1L64 = CARRY(count_out[4] & (!A1L44));


--count_out[5] is count_out[5]
--operation mode is arithmetic

count_out[5]_carry_eqn = A1L64;
count_out[5]_lut_out = count_out[5] $ (count_out[5]_carry_eqn);
count_out[5] = DFFEAS(count_out[5]_lut_out, clk_temp, VCC, , , , , , );

--A1L84 is count_out[5]~77
--operation mode is arithmetic

A1L84 = CARRY(!A1L64 # !count_out[5]);


--count_out[6] is count_out[6]
--operation mode is arithmetic

count_out[6]_carry_eqn = A1L84;
count_out[6]_lut_out = count_out[6] $ (!count_out[6]_carry_eqn);
count_out[6] = DFFEAS(count_out[6]_lut_out, clk_temp, VCC, , , , , , );

--A1L05 is count_out[6]~81
--operation mode is arithmetic

A1L05 = CARRY(count_out[6] & (!A1L84));


--count_out[7] is count_out[7]
--operation mode is normal

count_out[7]_carry_eqn = A1L05;
count_out[7]_lut_out = count_out[7] $ (count_out[7]_carry_eqn);
count_out[7] = DFFEAS(count_out[7]_lut_out, clk_temp, VCC, , , , , , );


--D1_hub_tdo is sld_hub:sld_hub_inst|hub_tdo
--operation mode is normal

D1_hub_tdo = AMPP_FUNCTION(!A1L5, D1L31, D1L71, GB5_Q[0], D1L51, !JB1_state[8], JB1L81);


--count_clk[0] is count_clk[0]
--operation mode is arithmetic

count_clk[0]_lut_out = !count_clk[0];
count_clk[0] = DFFEAS(count_clk[0]_lut_out, clk, VCC, , , , , A1L46, );

--A1L22 is count_clk[0]~187
--operation mode is arithmetic

A1L22 = CARRY(count_clk[0]);


--count_clk[1] is count_clk[1]
--operation mode is arithmetic

count_clk[1]_carry_eqn = A1L22;
count_clk[1]_lut_out = count_clk[1] $ (count_clk[1]_carry_eqn);
count_clk[1] = DFFEAS(count_clk[1]_lut_out, clk, VCC, , , , , A1L46, );

--A1L42 is count_clk[1]~191
--operation mode is arithmetic

A1L42 = CARRY(!A1L22 # !count_clk[1]);


--count_clk[2] is count_clk[2]
--operation mode is arithmetic

count_clk[2]_carry_eqn = A1L42;
count_clk[2]_lut_out = count_clk[2] $ (!count_clk[2]_carry_eqn);
count_clk[2] = DFFEAS(count_clk[2]_lut_out, clk, VCC, , , , , A1L46, );

--A1L62 is count_clk[2]~195
--operation mode is arithmetic

A1L62 = CARRY(count_clk[2] & (!A1L42));


--count_clk[3] is count_clk[3]
--operation mode is arithmetic

count_clk[3]_carry_eqn = A1L62;
count_clk[3]_lut_out = count_clk[3] $ (count_clk[3]_carry_eqn);
count_clk[3] = DFFEAS(count_clk[3]_lut_out, clk, VCC, , , , , A1L46, );

--A1L82 is count_clk[3]~199
--operation mode is arithmetic

A1L82 = CARRY(!A1L62 # !count_clk[3]);


--count_clk[4] is count_clk[4]
--operation mode is arithmetic

count_clk[4]_carry_eqn = A1L82;
count_clk[4]_lut_out = count_clk[4] $ (!count_clk[4]_carry_eqn);
count_clk[4] = DFFEAS(count_clk[4]_lut_out, clk, VCC, , , , , A1L46, );

--A1L03 is count_clk[4]~203
--operation mode is arithmetic

A1L03 = CARRY(count_clk[4] & (!A1L82));


--A1L81 is clk_temp~48
--operation mode is normal

A1L81 = !count_clk[1] & !count_clk[2] & !count_clk[3] & !count_clk[4];


--count_clk[5] is count_clk[5]
--operation mode is arithmetic

count_clk[5]_carry_eqn = A1L03;
count_clk[5]_lut_out = count_clk[5] $ (count_clk[5]_carry_eqn);
count_clk[5] = DFFEAS(count_clk[5]_lut_out, clk, VCC, , , , , A1L46, );

--A1L23 is count_clk[5]~207
--operation mode is arithmetic

A1L23 = CARRY(!A1L03 # !count_clk[5]);


--count_clk[6] is count_clk[6]
--operation mode is arithmetic

count_clk[6]_carry_eqn = A1L23;
count_clk[6]_lut_out = count_clk[6] $ (!count_clk[6]_carry_eqn);
count_clk[6] = DFFEAS(count_clk[6]_lut_out, clk, VCC, , , , , A1L46, );

--A1L43 is count_clk[6]~211
--operation mode is arithmetic

A1L43 = CARRY(count_clk[6] & (!A1L23));


--count_clk[7] is count_clk[7]
--operation mode is normal

count_clk[7]_carry_eqn = A1L43;
count_clk[7]_lut_out = count_clk[7] $ (count_clk[7]_carry_eqn);
count_clk[7] = DFFEAS(count_clk[7]_lut_out, clk, VCC, , , , , A1L46, );


--A1L91 is clk_temp~49
--operation mode is normal

A1L91 = A1L81 & !count_clk[5] & !count_clk[6] & !count_clk[7];