smi.h

SM501基于ARMV4/ARMV4I平台

/*++
THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
PARTICULAR PURPOSE.

Module Name:    smi.h

Abstract:       SMI display class header definition

Notes:

--*/

#ifndef __SMI_H__
#define __SMI_H__

#define SMI_VERSION					0x00010001
#define SMI_DATE					0x20040310

#include "CaptureRegs.h"
#include "ci.h"
#include "DisplayControllerRegs.h"
#include "DrawingEngineRegs.h"
#include "SystemConfigurationRegs.h"
#include "GPIORegs.h"
#include "PWMRegs.h"
#include "I2CRegs.h"
#include "SSPRegs.h"
#include "interrupt.h"
#include "panel.h"
#include "power.h"
#include "pwm.h"
#include "i2c.h"
#include "ssp.h"
#include "sspescape.h"
#include "modetbl.h"
#include <pwingdi.h>
#include "memory.h"

#ifdef ENABLE_DIRECT3D
#include "smi3d.h"
#endif // ENABLE_DIRECT3D

#define CURSUR_IMAGE_SIZE 2048
#define USB_MEM_SIZE 0x10000

#ifdef	DD_ENABLE						 
// SMI Driver GUID
// {CBF6A608-F9A4-44fc-866E-CB8F0B5DA069}
DEFINE_GUID(SMI_DD_GUID, 
0xcbf6a608, 0xf9a4, 0x44fc, 0x86, 0x6e, 0xcb, 0x8f, 0xb, 0x5d, 0xa0, 0x69);

#endif // DD_ENABLE


// PCI bus config area constants
#define PCI_CLASS_DISPLAY       0x03        // this specifies a display device
#define PCI_SUBCLASS_DISPLAY    0x00        // this specifies a VGA style display device
#define PCI_VENDOR_SMI          0x126F      // this specifies a chipset by SMI
#define CHIPID_SM501			0x0501
#define CHIPID_SM501ALPHA		0x0510

#ifndef UMA
#ifdef MEMORY_RESERVE						// reserve 1M for Alpha Blend 
#define SM501_MAXVIDEOMEMORYSIZE	(0x700000)	// 7M bytes
#else
//#define SM501_MAXVIDEOMEMORYSIZE	(0x800000 - 0x10000) // 8M - 64k bytes 64K for USB Host
#define SM501_MAXVIDEOMEMORYSIZE	(0x1000000 - 0x10000) // 8M - 64k bytes 64K for USB Host
#endif
#else
#define SM501_MAXVIDEOMEMORYSIZE    0x00400000
#endif

#define SM501_REGMEMORYSIZE			2*1024*1024

// Default Bpp
#define SSBPP_DEFAULT 			16
#define SSFREQ_DEFAULT 			60

// Special Panel Settings Items
#define SSS_MAX							32
#define SSS_ANY							0xFFFFFFFF
#define SSS_PANEL_HORIZONTAL_TOTAL		0x00000001
#define SSS_PANEL_HORIZONTAL_SYNC		0x00000002
#define SSS_PANEL_VERTICAL_TOTAL		0x00000004
#define SSS_PANEL_VERTICAL_SYNC			0x00000008
#define SSS_POWER_MODE_CLOCK			0x00000010
#define SSS_PANEL_DISPLAY_CTRL			0x00000020


// Panel Type Definition
// Sample define SSP_<ManufacturerName><Width>x<Height><Model/Customer>
#define SSP_DEFAULT				0x00000000
#define SSP_HITACHI320x240MSTN	0x00000100		// Hitachi Mono STN 320x240 SP14Q003
#define SSP_PLEXUS800x600TFT	0x00000200		// Plexus 800x600 TFT

// Feature Type Definition 
#define SSF_DEFAULT				0x00000000
#define SSF_LCDON				0x00000001
#define SSF_CRTON				0x00000002
#define SSF_TVON				0x00000004

// Display Type Definition (which output to enable)
#define PANEL_OUTPUT            0x00000001
#define CRT_OUTPUT              0x00000002

// SaveRestore constants
#define NUM_SYSCFG_REGS         9
#define NUM_POWER_REGS          6
#define NUM_IRQ_REGS            2
#define NUM_PANEL_REGS          13
#define NUM_PANEL_HWC_REGS      4
#define NUM_CRT_REGS            7
#define NUM_CRT_HWC_REGS        4
#define NUM_ENGINE_REGS         21
#define NUM_CSC_REGS            14
#define NUM_ALPHA_REGS          14
#define NUM_VIDEO_REGS          11
#define NUM_VIDEO_ALPHA_REGS    17
#define NUM_CRT_PALETTE_REGS    256
#define NUM_PANEL_PALETTE_REGS  256
#define NUM_VIDEO_PALETTE_REGS  256

// Structure containing save/restore register values
typedef struct ModeInit_t
{
    ULONG sysCfg[NUM_SYSCFG_REGS];              // System configuration registers
	ULONG power[NUM_POWER_REGS];                // Power management registers
	ULONG irq[NUM_IRQ_REGS];                    // Interrupt registers
	ULONG panel[NUM_PANEL_REGS];                // Panel registers
	ULONG panelHwc[NUM_PANEL_HWC_REGS];         // Panel Hwc registers
	ULONG crt[NUM_CRT_REGS];                    // CRT registers
	ULONG crtHwc[NUM_CRT_HWC_REGS];             // CRT Hwc registers
	ULONG de[NUM_ENGINE_REGS];                  // Drawing engine registers
	ULONG csc[NUM_CSC_REGS];                    // Color space conversion registers
	ULONG alpha[NUM_ALPHA_REGS];                // Alpha registers
	ULONG video[NUM_VIDEO_REGS];                // Video registers
	ULONG videoAlpha[NUM_VIDEO_ALPHA_REGS];     // Video Alpha registers
	ULONG crtPalette[NUM_CRT_PALETTE_REGS];     // CRT palette registers
	ULONG panelPalette[NUM_PANEL_PALETTE_REGS]; // Panel palette registers
	ULONG videoPalette[NUM_VIDEO_PALETTE_REGS]; // Video palette registers
} ModeInit;

// SMI Settings
class SMISETTINGS
{
public:
	DWORD m_dwBpp;
	DWORD m_dwCxScreen;
	DWORD m_dwCyScreen;
	DWORD m_dwCxPanel;
	DWORD m_dwCyPanel;
	DWORD m_dwCxZoom;		     // Zoom Size 
	DWORD m_dwCyZoom;
	DWORD m_dwPanningX;		     // These two are only used if Screen size > Panel Size
	DWORD m_dwPanningY;		     // for Panning
	ULONG m_nModeId;
	ULONG m_nFrequency;
	ULONG m_nChipID;
	ULONG m_nLAWPhysical;
	PUCHAR m_pLAW;
	ULONG m_nREGPhysical;
	PUCHAR m_pREG;
	UCHAR m_IRQ;
	ULONG m_nRotateAngle;	     // Rotation Angle, only work if Rotation is enabled
	ULONG m_nTestClock;
	ULONG m_nBusNo;
	ULONG m_nSlotNo;
	ULONG m_nDualMonEnabled;     // DualMon feature Enabled
	ULONG m_nCursorZoomEnabled;  // Enabled/Disabled Cursor Zoom in Zoom-In/Zoom-Out mode
	ULONG m_nDisplayType;        // Display output to enable (PANEL_OUTPUT, CRT_OUTPUT)
	ULONG m_nSaveRestoreEnabled; // SaveRestore is enabled?
	ULONG m_nGamma;              // Gamma correction
	BOOL  m_bOverlayDisabled;	 // Disable or Enable Video Overlay
	BOOL  m_bCSCDisabled;	 	 // Disable or Enable Video Overlay
#ifdef CMDLIST
    ULONG m_cmdlist_address;
    ULONG m_cmdlist_size;
#endif // CMDLIST
     ULONG m_sdrambase;
#ifdef VGXDMA
    ULONG m_VGXDMA_address;
    ULONG m_VGXDMA_size;
#endif // VGXDMA

	// UMA Attributes
	UCHAR m_bUMA;
	ULONG m_nUMAOffset;

	BOOL  m_bEnablePowerMonitor;

#ifndef DISABLE_INTERRUPT_MANAGEMENT
	INTERRUPT_INFO m_IntInfo;
#endif

private:
	DWORD m_dwPanelType;	// Special Panel settings
	DWORD m_dwFeature;		// Special SMI Feature ie. LVDS Panel, DualApp, LCD & TV
	DWORD m_dwPanelSettings[SSS_MAX]; // Special Mode Settings Buffer

public:
	BOOL	isSupportedChipID(ULONG nChipID)
	{
		if (nChipID == CHIPID_SM501)
			return TRUE;

		if (nChipID == CHIPID_SM501ALPHA)
			return TRUE;

		return FALSE;
	}
	ULONG	MaxVideoMemorySize(void)
	{
		if (m_nChipID == CHIPID_SM501)
			return SM501_MAXVIDEOMEMORYSIZE;

		return 0;
	}
	ULONG	RegMemorySize(void)
	{
		if (m_nChipID == CHIPID_SM501)
			return SM501_REGMEMORYSIZE;

		return 0;
	}
	BOOL	isPanelType(DWORD dwPanelType)
	{
		// This function can be expanded to include more panel type
		return (m_dwPanelType == dwPanelType);
	}
	void	SetPanelType(DWORD dwPanelType)
	{
		// This function can be expanded to include more panel type
		m_dwPanelType = dwPanelType;
	}
	BOOL	isFeature(DWORD dwFeature)
	{
		// This function can be expanded to include more feature type
		return (m_dwFeature == dwFeature);
	}
	void	SetFeature(DWORD dwFeature)
	{
		// This function can be expanded to include more feature type
		m_dwFeature = dwFeature;
	}

	void	SetPanelSettings(DWORD *pdwPS)
	{
		memcpy(m_dwPanelSettings, (PUCHAR)pdwPS, SSS_MAX * sizeof(DWORD));
	}

	BOOL	isPanelSettings(DWORD dwSettings)
	{
		return (m_dwPanelSettings[0] & dwSettings);
	}

	DWORD   getPanelSettings(DWORD dwNum)
	{
		return m_dwPanelSettings[dwNum];
	}


	SMISETTINGS(void)
	{
		m_dwBpp = 0;
		m_nModeId = 0;
		m_dwCxPanel = 0; 
		m_dwCyPanel = 0;
		m_dwCxScreen = 0;
		m_dwCyScreen = 0;
		m_dwCxZoom = 0; 
		m_dwCyZoom = 0;
		m_dwPanningX = 0;
		m_dwPanningY = 0;
		m_nREGPhysical = 0;
		m_nLAWPhysical = 0;
		m_nFrequency = 0;
		m_IRQ = 0;
		m_nRotateAngle = 0;
		m_nTestClock = 0;
		m_nBusNo = 0;
		m_nSlotNo = 0;
		m_nDualMonEnabled = 0;
		m_nCursorZoomEnabled = 0;
		m_nDisplayType = CRT_OUTPUT; // Default is panel output only
		m_nSaveRestoreEnabled = 0;
		m_nGamma = 0;
		m_bOverlayDisabled = 0;
		m_bCSCDisabled = 0;
#ifdef CMDLIST
        m_cmdlist_address=0;
        m_cmdlist_size=0;
#endif // CMDLIST
        m_sdrambase=0;
#ifdef VGXDMA
        m_VGXDMA_address=0;
        m_VGXDMA_size=0;
#endif // VGXDMA
		
		// UMA Feature
		m_bUMA = 0;
		m_nUMAOffset = 0;

#ifndef DISABLE_INTERRUPT_MANAGEMENT
		ZeroMemory(&m_IntInfo, sizeof(m_IntInfo));
#endif
		m_bEnablePowerMonitor = FALSE;

		SetPanelType(SSP_DEFAULT);
		SetFeature(SSF_DEFAULT);

		ZeroMemory(m_dwPanelSettings, SSS_MAX * sizeof(DWORD));

	}
	SMISETTINGS(const SMISETTINGS &ss)
	{
		memcpy(this, &ss, sizeof(SMISETTINGS));
	}  

};

class RWReg8
{
private:
	volatile UCHAR m_nV;
public:
	UCHAR operator = (UCHAR v)	{ return (m_nV = v); }
	operator UCHAR() { return m_nV; }
};

class RWReg16
{
private:
	volatile USHORT m_nV;
public:
	USHORT operator = (USHORT v)	{ return (m_nV = v); }
	operator USHORT() { return m_nV; }
};

class RWReg32
{
private:
	volatile ULONG m_nV;
public:
	ULONG operator = (ULONG v) 	{ return (m_nV = v); }
	operator ULONG() { return m_nV; }
};

class IndexedReg8
{
private:
	RWReg8 *m_pRegAddress;
	RWReg8 *m_pRegData;

public:
	void Init(RWReg8 &regAddress, RWReg8 &regData)
	{
		m_pRegAddress = &regAddress;
		m_pRegData = &regData;
	}

	RWReg8& operator [](int nSubscript)
	{
		*m_pRegAddress = (UCHAR) nSubscript;
		return *m_pRegData;
	}

};

class RWSplitReg8
{
private:
	RWReg8 *m_pRegRead;
	RWReg8 *m_pRegWrite;

public:
	void Init(RWReg8 &regRead, RWReg8 &regWrite)
	{
		m_pRegRead = &regRead;
		m_pRegWrite = &regWrite;
	}

	UCHAR operator = (UCHAR v) { return (*m_pRegWrite = v); }
	operator UCHAR() { return *m_pRegRead; }
};



class FlipIndexedReg8
{
private:
	RWReg8 *m_pRegRW;
	RWReg8 *m_pRegReadData;
	RWReg8 *m_pRegReset;
	RWSplitReg8 m_regData;

public:
	void ResetToAddr()
	{
		// Set m_pRWPort[writes] to addr
		volatile UCHAR temp = *m_pRegReset;
	}

	void Init(RWReg8 &regRW, RWReg8 &regReadData, RWReg8 &regReset)
	{