cpu.c

用freescale公司的DSP56F8013芯片实现的PMSM的SVPWM 驱动

/** ###################################################################
**     THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
**     Filename  : Cpu.C
**     Project   : PMSM
**     Processor : 56F8013VFAE
**     Beantype  : 56F8013VFAE
**     Version   : Bean 01.017, Driver 01.29, CPU db: 2.87.089
**     Datasheet :  MC56F8300UM/D - Rev. 1.0
**     Compiler  : Metrowerks DSP C Compiler
**     Date/Time : 2008-1-30, 下午 02:43
**     Abstract  :
**
**     Settings  :
**
**     Contents  :
**         EnableInt   - void Cpu_EnableInt(void);
**         DisableInt  - void Cpu_DisableInt(void);
**         SetWaitMode - void Cpu_SetWaitMode(void);
**         SetStopMode - void Cpu_SetStopMode(void);
**
**     (c) Freescale Semiconductor
**     2004 All Rights Reserved
**
**     (c) Copyright UNIS, spol. s r.o. 1997-2006
**     UNIS, spol. s r.o.
**     Jundrovska 33
**     624 00 Brno
**     Czech Republic
**     http      : www.processorexpert.com
**     mail      : [e-mail]
** ###################################################################*/

/* MODULE Cpu. */
#include "PWM.h"
#include "MFR.h"
#include "ADC1.h"
#include "PB413.h"
#include "TI1.h"
#include "TO1.h"
#include "ACRELAY.h"
#include "LEDSPI.h"
#include "SCIAS.h"
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "Events.h"
#include "Cpu.h"


/* Global variables */
volatile word SR_lock=0;               /* Lock */
volatile word SR_reg;                  /* Current value of the SR register */

/*Definition of global shadow variables*/
word Shadow_GPIO_B_DR;

/*
** ===================================================================
**     Method      :  Cpu_Interrupt (bean 56F8013VFAE)
**
**     Description :
**         The method services unhandled interrupt vectors.
**         This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
#pragma interrupt alignsp
void Cpu_Interrupt(void)
{
  asm(DEBUGHLT);                       /* Halt the core and placing it in the debug processing state */
}

/*
** ===================================================================
**     Method      :  Cpu_DisableInt (bean 56F8013VFAE)
**
**     Description :
**         Disables all maskable interrupts
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*
void Cpu_DisableInt(void)

**      This method is implemented as macro in the header module. **
*/

/*
** ===================================================================
**     Method      :  Cpu_EnableInt (bean 56F8013VFAE)
**
**     Description :
**         Enables all maskable interrupts
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*
void Cpu_EnableInt(void)

**      This method is implemented as macro in the header module. **
*/

/*
** ===================================================================
**     Method      :  Cpu_SetStopMode (bean 56F8013VFAE)
**
**     Description :
**         Sets low power mode - Stop mode.
**         For more information about the stop mode see this CPU
**         documentation.
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*
void Cpu_SetStopMode(void)

**      This method is implemented as macro in the header module. **
*/

/*
** ===================================================================
**     Method      :  Cpu_SetWaitMode (bean 56F8013VFAE)
**
**     Description :
**         Sets low power mode - Wait mode.
**         For more information about the wait mode see this CPU
**         documentation.
**         Release from wait mode: Reset or interrupt
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*
void Cpu_SetWaitMode(void)

**      This method is implemented as macro in the header module. **
*/

/*
** ===================================================================
**     Method      :  _EntryPoint (bean 56F8013VFAE)
**
**     Description :
**         Initializes the whole system like timing and so on. At the end 
**         of this function, the C startup is invoked to initialize stack,
**         memory areas and so on.
**         This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
extern void init_56800_(void);         /* Forward declaration of external startup function declared in startup file */

/*** !!! Here you can place your own code using property "User data declarations" on the build options tab. !!! ***/

void _EntryPoint(void)
{

  /*** !!! Here you can place your own code before PE initialization using property "User code before PE initialization" on the build options tab. !!! ***/

  /*** ### 56F8013VFAE "Cpu" init code ... ***/
  /*** PE initialization code after reset ***/
  /* System clock initialization */
  setRegBitGroup(OSCTL, TRIM, (word)getReg(FMOPT1)); /* Set the trim osc freq with factory programmed value */
  clrRegBit(PLLCR, PRECS);             /* Select an internal clock source for the CPU core */
  setReg(PLLCR, (PLLCR_LCKON_MASK | PLLCR_ZSRC0_MASK)); /* Enable PLL, LCKON and select clock source from prescaler */
  /* PLLDB: LORTP=2,??=0,PLLCOD=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
  setReg16(PLLDB, 8192);               /* Set the clock prescalers */ 
  while(!getRegBit(PLLSR, LCK0)){}     /* Wait for PLL lock */
  setReg(PLLCR, (PLLCR_LCKON_MASK | PLLCR_ZSRC1_MASK)); /* Select clock source from postscaler */
  /* FMCLKD: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,DIVLD=0,PRDIV8=0,DIV=40 */
  setReg16(FMCLKD, 40);                /* Set the flash clock prescaler */ 
  /*** End of PE initialization code after reset ***/

  /*** !!! Here you can place your own code after PE initialization using property "User code after PE initialization" on the build options tab. !!! ***/

  asm(JMP init_56800_);                /* Jump to C startup code */
}

/*
** ===================================================================
**     Method      :  PE_low_level_init (bean 56F8013VFAE)
**
**     Description :
**         Initializes beans and provides common register initialization. 
**         The method is called automatically as a part of the 
**         application initialization code.
**         This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
void PE_low_level_init(void)
{
  /* GPIO_A_DRIVE: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,DRIVE=0 */
  setReg16(GPIO_A_DRIVE, 0);           /* Set High/Low drive strength on GPIOA pins according to the CPU bean settings */ 
  /* GPIO_B_DRIVE: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,DRIVE=0 */
  setReg16(GPIO_B_DRIVE, 0);           /* Set High/Low drive strength on GPIOB pins according to the CPU bean settings */ 
  /* GPIO_C_DRIVE: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,DRIVE6=0,DRIVE5=0,DRIVE4=0,??=0,DRIVE2=0,DRIVE1=0,DRIVE0=0 */
  setReg16(GPIO_C_DRIVE, 0);           /* Set High/Low drive strength on GPIOC pins according to the CPU bean settings */ 
  /* GPIO_D_DRIVE: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,DRIVE=0 */
  setReg16(GPIO_D_DRIVE, 0);           /* Set High/Low drive strength on GPIOD pins according to the CPU bean settings */ 
  /* SIM_GPS: TCR=0,PCR=0,??=0,??=0,CFG_B7=0,CFG_B6=0,CFG_B5=0,CFG_B4=0,CFG_B3=0,CFG_B2=0,CFG_B1=0,CFG_B0=0,CFG_A5=0,CFG_A4=0 */
  setReg16(SIM_GPS, 0);                /* Set the TMR and PWM module clock rates */ 
  /* SIM_PCE: I2C=1,??=0,ADC=1,??=0,??=0,??=0,??=0,??=0,??=0,TMR=1,??=0,SCI=1,??=0,SPI=1,??=0,PWM=1 */
  setReg16(SIM_PCE, 41045);            /* Set up the peripheral clock enable register */ 
  /* SIM_CTRL: TC3_SD=0,TC2_SD=0,TC1_SD=0,TC0_SD=0,SCI_SD=0,??=0,TC3_INP=0,??=0,??=0,??=0,ONCEEBL=0,SWRST=0,STOP_DISABLE=0,WAIT_DISABLE=0 */
  setReg16(SIM_CTRL, 0);               /* Set up the SIM control register */ 
  /* SIM_CLKOUT: ??=0,??=0,??=0,??=0,??=0,??=0,PWM3_b=0,PWM2_b=0,PWM1_b=0,PWM0_b=0,CLKDIS=1,CLKOSEL=0 */
  setReg16(SIM_CLKOUT, 32);            /* Set up the SIM clock output select register */ 
  /* Common initialization of the CPU registers */
  /* GPIO_A_PER: PE|=63 */
  setReg16Bits(GPIO_A_PER, 63);         
  /* SIM_CLKOUT: PWM3_b=0,PWM2_b=0,PWM1_b=0,PWM0_b=0 */
  clrReg16Bits(SIM_CLKOUT, 960);        
  /* SIM_GPS: CFG_B4=0,CFG_B3=0,CFG_B1=0,CFG_B0=0,CFG_A5=0,CFG_A4=0 */
  clrReg16Bits(SIM_GPS, 447);           
  /* INTC_IPR4: PWM_RL_IPL=2 */
  clrSetReg16Bits(INTC_IPR4, 16, 32);   
  /* GPIO_C_PER: PE5=1,PE1=1,PE0=1 */
  setReg16Bits(GPIO_C_PER, 35);         
  /* GPIO_D_IENR: IEN&=~1 */
  clrReg16Bits(GPIO_D_IENR, 1);         
  /* GPIO_D_IAR: IA&=~1 */
  clrReg16Bits(GPIO_D_IAR, 1);          
  /* GPIO_D_IESR: IES|=1 */
  setReg16Bits(GPIO_D_IESR, 1);         
  /* GPIO_D_PPMODE: PPMODE|=1 */
  setReg16Bits(GPIO_D_PPMODE, 1);       
  /* GPIO_D_DR: D&=~1 */
  clrReg16Bits(GPIO_D_DR, 1);           
  /* GPIO_D_DDR: DD|=1 */
  setReg16Bits(GPIO_D_DDR, 1);          
  /* GPIO_D_PER: PE&=~1 */
  clrReg16Bits(GPIO_D_PER, 1);          
  /* INTC_IPR3: TMR_1_IPL=2,TMR_0_IPL=2 */
  clrSetReg16Bits(INTC_IPR3, 320, 640); 
  /* GPIO_B_PER: PE&=~33,PE|=26 */
  clrSetReg16Bits(GPIO_B_PER, 33, 26);  
  /* GPIO_B_IENR: IEN&=~32 */
  clrReg16Bits(GPIO_B_IENR, 32);        
  /* GPIO_B_IAR: IA&=~32 */
  clrReg16Bits(GPIO_B_IAR, 32);         
  /* GPIO_B_IESR: IES|=32 */
  setReg16Bits(GPIO_B_IESR, 32);        
  /* GPIO_B_PUR: PU&=~32 */
  clrReg16Bits(GPIO_B_PUR, 32);         
  /* GPIO_B_PPMODE: PPMODE|=32 */
  setReg16Bits(GPIO_B_PPMODE, 32);      
  /* GPIO_B_DR: D&=~33 */
  clrReg16Bits(GPIO_B_DR, 33);          
  /* GPIO_B_DDR: DD|=33 */
  setReg16Bits(GPIO_B_DDR, 33);         
  /* INTC_IPR2: SCI_RCV_IPL=2,SCI_RERR_IPL=2,SCI_TIDL_IPL=2,SCI_XMIT_IPL=2 */
  clrSetReg16Bits(INTC_IPR2, 20800, 41600); 
  /* ### PWMMC "PWM" init code ... */
  PWM_Init();


  /* ### Init_ADC "ADC1" init code ... */
  ADC1_Init();
  /* ### TimerInt "TI1" init code ... */
  TI1_Init();
  /* ### TimerOut "TO1" init code ... */
  TO1_Init();
  /* ### BitIO "ACRELAY" init code ... */
  Shadow_GPIO_B_DR &= ~(word)32;       /* Initialize shadow variable */
  /* ### SynchroMaster "LEDSPI" init code ... */
  LEDSPI_Init();
  /* ### Asynchro serial "SCIAS" init code ... */
  SCIAS_Init();
  __EI(0);                             /* Enable interrupts of the selected priority level */
}

/* END Cpu. */

/*
** ###################################################################
**
**     This file was created by UNIS Processor Expert 2.98 [03.79]
**     for the Freescale 56800 series of microcontrollers.
**
** ###################################################################
*/