syslib.c

Freescale mpc827x 系列CPU的VxWorks平台的BSP源代码。

/* use pci auto config */

#include "pci/pciAutoConfigLib.c"    /* automatic PCI configuration */
#include "sysBusPci.c"               /* pciAutoConfig BSP support file */
#include "mot82xxPci.c"

#endif /* INCLUDE_PCI */

UINT32 vxImmrGet();

#include "sysSerial.c"
#include "m827xIntrCtl.c"
#include "timer/m8260Timer.c"
#define M82XX_SIO_FIXES
#include "sio/m8260Sio.c"

#ifdef INCLUDE_FLASH
#include "mem/flashMem.c"
#include "mem/nvRamToFlash.c"
#else
#include "mem/nullNvRam.c"
#endif

#include "mem/m82xxDpramLib.c"

#ifdef  INCLUDE_MOTFCCEND
/* set the following array to a unique Ethernet hardware address */

/* last 5 nibbles are board specific, initialized in sysHwInit */

unsigned char sysFccEnetAddr [2][6] = {{0x08, 0x00, 0x3e, 0x33, 0x02, 0x01},
				       {0x08, 0x00, 0x3e, 0x33, 0x02, 0x02}};
STATUS sysFccEnetAddrGet (int unit, UCHAR * address);

#endif  /* INCLUDE_MOTFCCEND */

/* locals */
STATUS sysFccEnetDisable (UINT32 immrVal, UINT8 fccNum);
void sysControlLED ( int LED, int on);

/* defines */

#define ZERO    0
#define SYS_MODEL       "Motorola MPC8260 ADS"
#define SYS_MODEL_HIP4  "Motorola MPC8260 ADS - HIP4"
#define SYS_MODEL_HIP7  "Motorola MPC8260 ADS - HIP7"
#define SYS_MODEL_8272  "Motorola MPC8272 ADS"
#define SYS_MODEL_8272E  "Motorola MPC8272 ADS - Encryption"

/* needed to enable timer base via SIUMCR */
#ifdef INCLUDE_PCI
#define      M8260_DPPC_MASK	0x0C000000 /* bits 4 and 5 */
#define      M8260_DPPC_VALUE	0x0C000000 /* bits (4,5) should be (1,0) */
#else
#define      M8260_DPPC_MASK	0x0C000000 /* bits 4 and 5 */
#define      M8260_DPPC_VALUE	0x08000000 /* bits (4,5) should be (1,0) */
#endif /*INCLUDE_PCI */

/* Enable IRQ5 for Phy via SIUMCR */
#define M8272_BAC_MASK (0x03 << 24)
#define M8272_BAC_VALUE (0x01 << 24)

/* Enable bit for Security engine in SIUMCR */
#define M8272_SEC_ENG_ENABLE 0x200

#include "drv/sio/m8260Sio.h"
#ifdef  INCLUDE_MOTFCCEND
#   include "sysMotFcc2End.c"
#   include "sysNet.c"
#endif /* INCLUDE_MOTFCCEND */

#ifdef INCLUDE_FEI_END
#   include "sysFei82557End.c"
#endif /* INCLUDE_FEI_END */

#ifdef PCI_BRIDGE_READ_ERRATA_WORKAROUND
UCHAR	sysInByte(ULONG port)
{
return(pciBridgeRegisterReadByte(port));
}
USHORT	sysInWord(ULONG port)
{
return(pciBridgeRegisterReadWord(port));
}
ULONG	sysInLong(ULONG port)
{
return(pciBridgeRegisterReadLong(port));
}
#endif /*PCI_BRIDGE_READ_ERRATA_WORKAROUND */

/******************************************************************************
*
* sysModel - return the model name of the CPU board
*
* This routine returns the model name of the CPU board.
*
* RETURNS: A pointer to the string.
*/

char * sysModel (void)
    {
    UINT device;
    UINT32 maskNum = 0;

    /* Read Immr for processor info and Svr TBD */ 
    maskNum = ((*(UINT32*)(PQII_REG_BASE | IMMR_OFFSET)) & 0xfff0);

    if (((device = vxPvrGet()) & HIP4_MASK) == HIP4_ID)
        return(SYS_MODEL_HIP4);

    if (((device = vxPvrGet()) & HIP4_MASK) == HIP7_ID)
	{
	if((maskNum==0xC00) || (maskNum==0xD00))
	    {		
	    return(SYS_MODEL_8272);
	    }

	if((maskNum==0xC10) || (maskNum==0xD10))
	    {		
	    return(SYS_MODEL_8272E);
	    }
	else
	    {
	    return(SYS_MODEL_HIP7);
	    }
    }
    return (SYS_MODEL);
    }

/******************************************************************************
*
* sysBspRev - return the bsp version with the revision eg 1.0/<x>
*
* This function returns a pointer to a bsp version with the revision.
* for eg. 1.0/<x>. BSP_REV defined in config.h is concatenated to
* BSP_VERSION and returned.
*
* RETURNS: A pointer to the BSP version/revision string.
*/

char * sysBspRev (void)
    {
    return (BSP_VERSION BSP_REV);
    }

/******************************************************************************
*
* sysHwMemInit - initialize and configure system memory.
*
* This routine is called before sysHwInit(). It performs memory auto-sizing
* and updates the system's physical regions table, `sysPhysRgnTbl'. It may
* include the code to do runtime configuration of extra memory controllers.
*
* NOTE: This routine should not be called directly by the user application.  It
* cannot be used to initialize interrupt vectors.
*
* RETURNS: N/A
*/

void sysHwMemInit (void)
    {
    /* Call sysPhysMemTop() to do memory autosizing if available */

    sysPhysMemDesc[1].len = (UINT)(sysPhysMemTop () -  RAM_LOW_ADRS);
#ifdef INCLUDE_PCI
    sysPhysMemDesc[4].len = (UINT)(sysPhysMemTop ());
#endif
}

/******************************************************************************
*
* sysHwInit - initialize the system hardware
*
* This routine initializes various feature of the MPC8260 ADS board. It sets up
* the control registers, initializes various devices if they are present.
*
* NOTE: This routine should not be called directly by the user.
*
* RETURNS: N/A
*/

void sysHwInit (void)
    {
    int	immrVal = vxImmrGet();

    /* put correct memory size in sysPhysMemDesc[1].len for
     * size of local memory
     */
    sysHwMemInit();

    /* Zero IO Port registers */
    /* reset the parallel ports */

    * M8260_IOP_PADIR(immrVal) = 0x00000000;
    * M8260_IOP_PAPAR(immrVal) = 0x00000000;
    * M8260_IOP_PASO(immrVal) = 0x00000000;
    * M8260_IOP_PAODR(immrVal) = 0x00000000;
    * M8260_IOP_PADAT(immrVal) = 0x00000000;

    * M8260_IOP_PBDIR(immrVal) = 0x00000000;
    * M8260_IOP_PBPAR(immrVal) = 0x00000000;
    * M8260_IOP_PBSO(immrVal) = 0x00000000;
    * M8260_IOP_PBODR(immrVal) = 0x00000000;
    * M8260_IOP_PBDAT(immrVal) = 0x00000000;

    * M8260_IOP_PCDIR(immrVal) = 0x00000000;
    * M8260_IOP_PCPAR(immrVal) = 0x00000000;
    * M8260_IOP_PCSO(immrVal) = 0x00000000;
    * M8260_IOP_PCODR(immrVal) = 0x00000000;
    * M8260_IOP_PCDAT(immrVal) = 0x00000000;

    * M8260_IOP_PDDIR(immrVal) = 0x00000000;
    * M8260_IOP_PDPAR(immrVal) = 0x00000000;
    * M8260_IOP_PDSO(immrVal) = 0x00000000;
    * M8260_IOP_PDODR(immrVal) = 0x00000000;
    * M8260_IOP_PDDAT(immrVal) = 0x00000000;

    m82xxDpramLibInit();

    /* set the BRGCLK division factor */

    * M8260_SCCR(immrVal) = BRGCLK_DIV_FACTOR;

    /* set DPPC in SIUMCR to 10 so that timer is enabled (TBEN) */
	
    * M8260_SIUMCR(immrVal) &= ~M8260_DPPC_MASK;  /* clear the dppc */

    * M8260_SIUMCR(immrVal) |= M8260_DPPC_VALUE;  /* or in the desired value */

    /* Setup IRQ5 routing to interrupt controller */
    * M8260_SIUMCR(immrVal) &= ~M8272_BAC_MASK;

    * M8260_SIUMCR(immrVal) |= M8272_BAC_VALUE;    

    /* Enable Security Engine */
    * M8260_SIUMCR(immrVal) &= ~M8272_SEC_ENG_ENABLE;    

    /* Use rising edge as trigger for IRQ5 */ 
    * M8260_SIEXR(immrVal) |= 0x400;

    /* reset the Communications Processor */

    *M8260_CPCR(immrVal) = M8260_CPCR_RESET | M8260_CPCR_FLG;

    CACHE_PIPE_FLUSH();

    /* set pointer to BAT initialization functions */

    _pSysBatInitFunc = (FUNCPTR) mmuPpcBatInitMPC7x5;

    /* Get the Baud Rate Generator Clock  frequency */

    baudRateGenClk = sysBaudClkFreq();

#ifdef INCLUDE_PCI

#ifdef PCI_BRIDGE_READ_ERRATA_WORKAROUND
    /* Setup to do IDMA for PCI Bridge reads */
    pciBridgeIdmaInit();
#endif /*PCI_BRIDGE_READ_ERRATA_WORKAROUND */

    /* config pci */
    if (pciConfigLibInit (PCI_MECHANISM_0,(ULONG) sysPciConfigRead,
                              (ULONG) sysPciConfigWrite,(ULONG) sysPciSpecialCycle) != OK)
        {
        sysToMonitor (BOOT_NO_AUTOBOOT);  /* BAIL */
        }

    /*  Initialize PCI interrupt library. */
    if ((pciIntLibInit ()) != OK)
        {
        sysToMonitor (BOOT_NO_AUTOBOOT);
        }

    if (*((char*)PCI_AUTO_CONFIG_ADRS)==FALSE)
        {
	mot82xxBridgeInit();
#if (PCI_CFG_TYPE == PCI_CFG_AUTO)
            sysPciAutoConfig();
#endif
        *((char*)PCI_AUTO_CONFIG_ADRS)=TRUE;
	}
#endif /* INCLUDE_PCI */


    /* Reset serial channels */

    sysSerialHwInit();

    /* Initialize interrupts */

    m8260IntrInit();

    /* Initialize the Security Block  - should match TLB entry */
    *M82XX_SECMR (immrVal) = SEC_ENG_SIZE_MASK;    
    *M82XX_SECBR (immrVal) = SEC_ENG_BASE_ADRS | 0x1;
    
    /*
     * The power management mode is initialized here. Reduced power mode
     * is activated only when the kernel is idle (cf vxPowerDown).
     * Power management mode is selected via vxPowerModeSet().
     * DEFAULT_POWER_MGT_MODE is defined in config.h.
     */

    vxPowerModeSet (DEFAULT_POWER_MGT_MODE);

    }

/*******************************************************************************
*
* sysPhysMemTop - get the address of the top of physical memory
*
* This routine returns the address of the first missing byte of memory,
* which indicates the top of memory.
*
* Determine installed memory by reading memory control registers
* and calculating if one or 2 chip selects are used for SDRAM.
* Use the address mask and valid bit to determine each bank size.
*
* RETURNS: The address of the top of physical memory.
*
* SEE ALSO: sysMemTop()
*/

char * sysPhysMemTop (void)
    {
    LOCAL char * physTop = NULL;

    physTop = (char *)(LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE);

    return (physTop) ;
    }

/***************************************************************************
*
* sysMemTop - get the address of the top of VxWorks memory
*
* This routine returns a pointer to the first byte of memory not
* controlled or used by VxWorks.
*
* The user can reserve memory space by defining the macro USER_RESERVED_MEM
* in config.h.  This routine returns the address of the reserved memory
* area.  The value of USER_RESERVED_MEM is in bytes.
*
* RETURNS: The address of the top of VxWorks memory.
*
* ERRNO
*/

char * sysMemTop (void)
    {
    LOCAL char * memTop = NULL;

    if (memTop == NULL)
        {
        memTop = sysPhysMemTop () - USER_RESERVED_MEM;

#ifdef INCLUDE_EDR_PM

        /* account for ED&R persistent memory */

        memTop = memTop - PM_RESERVED_MEM;
#endif
        }

    return memTop;
    }


/******************************************************************************
*
* sysToMonitor - transfer control to the ROM monitor
*
* This routine transfers control to the ROM monitor.  Normally, it is called
* only by reboot()--which services ^X--and bus errors at interrupt level.
* However, in some circumstances, the user may wish to introduce a
* <startType> to enable special boot ROM facilities.
*
* RETURNS: Does not return.
*/

STATUS sysToMonitor
    (
     int startType	/* parameter passed to ROM to tell it how to boot */
    )
    {
    FUNCPTR pRom = (FUNCPTR) (ROM_TEXT_ADRS + 8);	/* Warm reboot */

    intLock();

    cacheDisable(INSTRUCTION_CACHE);
    cacheDisable(DATA_CACHE);

#ifdef INCLUDE_AUX_CLK
    sysAuxClkDisable();
#endif /* INCLUDE_AUX_CLK */

    /* disable both RS232 ports on the board */

    *BCSR1 |= (BCSR1_RS232EN_1_L);
    *BCSR1 |= (BCSR1_RS232EN_2_L);

    sysSerialReset();		/* reset the serial device */

    vxMsrSet (0);

    (*pRom) (startType);	/* jump to bootrom entry point */

    return (OK);	/* in case we ever continue from ROM monitor */
    }

/******************************************************************************
*
* sysHwInit2 - additional system configuration and initialization
*
* This routine connects system interrupts and does any additional
* configuration necessary.
*
* RETURNS: N/A
*/

void sysHwInit2 (void)
    {
    LOCAL BOOL configured = FALSE;
    int immrVal = vxImmrGet();

    CACHE_PIPE_FLUSH();