mot82xxpci.c

Freescale mpc827x 系列CPU的VxWorks平台的BSP源代码。

    if ( (esrRegVal & PCIERR_MSK_I2O_OFQO ) != 0)
       {
#      ifdef PCI_MULTI_DEBUG
       logMsg("PCI Error I2O_OFQO\n",0,0,0,0,0,0);
#      endif /* PCI_MULTI_DEBUG */
       pciErrorCount.i2o_ofqo++;
       }

    if ( ( esrRegVal & PCIERR_MSK_PERR_WR ) != 0)
        {
#       ifdef PCI_MULTI_DEBUG
        logMsg("PCI Error Parity Error on write\n",0,0,0,0,0,0);
#       endif /* PCI_MULTI_DEBUG */
        pciErrorCount.perr_wr++;
        }

    if ( ( esrRegVal & PCIERR_MSK_PERR_RD )!=0)
        {
#       ifdef PCI_MULTI_DEBUG
        logMsg("PCI Error Parity Error on read\n",0,0,0,0,0,0);
#       endif /* PCI_MULTI_DEBUG */
        pciErrorCount.perr_rd++;
        }

    if ( ( esrRegVal & PCIERR_MSK_SERR ) != 0)
        {
#       ifdef PCI_MULTI_DEBUG
        logMsg("PCI Error SERR\n",0,0,0,0,0,0);
#       endif /* PCI_MULTI_DEBUG */
        pciErrorCount.serr++;
        }

    if ( ( esrRegVal & PCIERR_MSK_TAR_ABT ) != 0 )
        {
#       ifdef PCI_MULTI_DEBUG
        logMsg("PCI Error\n",0,0,0,0,0,0);
#       endif /* PCI_MULTI_DEBUG */
        pciErrorCount.tar_abt++;
        }

    if (( esrRegVal&PCIERR_MSK_NO_RSP)!=0)
        { 
#       ifdef PCI_MULTI_DEBUG
        logMsg("PCI Error no response\n",0,0,0,0,0,0);
#       endif /* PCI_MULTI_DEBUG */
        pciErrorCount.no_rsp++;
        }

    if ( ( esrRegVal & PCIERR_MSK_DATA_PAR_RD ) != 0 )
        {
#       ifdef PCI_MULTI_DEBUG
        logMsg("PCI Error data parity error on read\n",0,0,0,0,0,0);
#       endif /* PCI_MULTI_DEBUG */
        pciErrorCount.datapar_rd++;
        }

    if ( ( esrRegVal & PCIERR_MSK_DATA_PAR_WR ) != 0 )
        {
#       ifdef PCI_MULTI_DEBUG
        logMsg("PCI Error data parity error on write\n",0,0,0,0,0,0);
#       endif /* PCI_MULTI_DEBUG */
        pciErrorCount.datapar_wr++;
        }

    if ( ( esrRegVal & PCIERR_MSK_ADDR_PAR ) != 0)
        {
#       ifdef PCI_MULTI_DEBUG
        logMsg("PCI Error address parity error\n",0,0,0,0,0,0);
#       endif /* PCI_MULTI_DEBUG */
        pciErrorCount.addrpar++;
        }
   
    sysPciOutLong ( (UINT32*)PCI_ESR(INTERNAL_MEM_MAP_ADDR), 0xfff );
    esrRegVal = PCI_IN_LONG ( (int)PCI_ESR( INTERNAL_MEM_MAP_ADDR ) );
  
}

/****************************************************************************
*   
* pciMessageHandler - message interrupt handler
*
* This function is called from the pciMultiInterrupt handler and handles 
* the interrupts for the messages.
*
* \NOMANUAL       It's not implemented at the momemt    
*
* RETURNS: N/A
*
* ERRNO
*/

void pciMessageHandler(void)
    {
    /* Clear reg for now TBD */ 
    }

#ifdef INCLUDE_SHOW_ROUTINES

/****************************************************************************
*   
* pciErrorShow - dump PCI Bridge errors
*
* This function can be called by the user and displays the number and type 
* of errors detected by the PCI bridge.
*
* RETURNS: N/A
*
* ERRNO
*/

void pciErrorShow (void)
    {

    printf("PCI Error Statistics\n");
    printf("--------------------\n");
    printf("Number of NMI Errors %d\n",pciErrorCount.nmi);
    printf("Number of IRA Errors %d\n",pciErrorCount.ira);
    printf("Number of I2O_IPQO Errors %d\n",pciErrorCount.i2o_ipqo);
    printf("Number of I2O_OFQO Errors %d\n",pciErrorCount.i2o_ofqo);
    printf("Number of Parity Write Errors %d\n",pciErrorCount.perr_wr);
    printf("Number of Parity Read  Errors %d\n",pciErrorCount.perr_rd);
    printf("Number of SERR Errors %d\n",pciErrorCount.serr);
    printf("Number of Target Abort Errors %d\n",pciErrorCount.tar_abt);
    printf("Number of No Response Errors %d\n",pciErrorCount.no_rsp);
    printf("Number of Data Parity Read Errors %d\n",pciErrorCount.datapar_rd);
    printf("Number of Data Parity Write Errors %d\n",pciErrorCount.datapar_wr);
    printf("Number of Address Parity Errors %d\n",pciErrorCount.addrpar);

    }
#endif /* INCLUDE_SHOW_ROUTINES */


#ifdef PCI_BRIDGE_READ_ERRATA_WORKAROUND

/**************************************************************************
*
* pciBridgeIdmaInit -  initialize IDMA2 PCI errata fix
*
* This is called to initialize IDMA2 for the PCI errata fix.
* It Initialises the IDMA. It can be called one time only. For any IDMA 
* transfer used in the code after this initialization only the source ptr
* has to be changed. The dest ptr in this case is conveniently positioned 
* in the DPRAM and not in the external memory in order to reduce the
* access latency.
*
* RETURNS: N/A
*
* ERRNO
*/

void pciBridgeIdmaInit(void)
    {
    char *pramBuf  = (char *)m82xxDpramAlignedMalloc(0x100,0x100);
    char *dpramBuf = (char *)m82xxDpramAlignedMalloc(0x40,0x40);
    char *bdBuf    = (char *)m82xxDpramAlignedMalloc(0x40,0x40);

    /*
     * init bds
     */

    idmaBd = (BD_DMA*)bdBuf;
    idmaBd->dstptr = (UINT32)dpramBuf; /* Destination for the idma is a one empty word location is DPRAM */

    /*
     * init idma
     */

    *(VUINT16*)IDMA2_BASE =  (UINT16)((UINT32)pramBuf & 0xffff); 
    pIdmaParam = (IDMA_PARAM *)pramBuf;
    pIdmaParam->ibase =   (UINT16)((UINT32)bdBuf & 0xffff);
    pIdmaParam->ibdptr =  (UINT16)((UINT32)bdBuf & 0xffff);
    pIdmaParam->dcm   = DCM_DUAL_ADDR | DCM_TRANS_BUF_128 | 
                        DCM_MEM_MEM | DCM_DINC | DCM_SINC;

    pIdmaParam->dpr_buf = (UINT16)((UINT32)dpramBuf & 0xffff);   /* DPR_BUF=64x2(DMA_WRAP)-32  */
    pIdmaParam->ss_max =  0x0060;   /*  Steady state value from peripheral to memory 96 bytes */
    pIdmaParam->sts =     0x0060;   /*Transfers from peripheral is 96 bytes*/
    pIdmaParam->dts =     0x0060;   /*Transfer to memory is 96 bytes (60x) bursts*/

    }

/****************************************************************************
*
* pciBridgeRegisterReadLong - read a long from PCI Bridge using IDMA 
*
* This routine reads 32-bit values from the PCI Bridge using IDMA.
*  
* RETURNS: 32-bit value at location  
*
* ERRNO
*/

UINT32 pciBridgeRegisterReadLong
    (
    int src
    ) 
    {
    volatile int key;
    UINT32 value;

    if ((src >= CPU_PCI_MEM_ADRS) && (src < CPU_PCI_IO_ADRS))
        {
        key = intLock();  /* Need to make sure only one access at a time */

        /* Setup buffer descriptor */ 
        idmaBd->srcptr = (UINT32)src; 
        idmaBd->length = 4; /* Need to set to prevent alignment issues */
        /* This needs to be set each time for the valid bit */ 
        idmaBd->cstatus = (IDMABD_INT_ENABLE | IDMABD_WRAP | IDMABD_LAST |
	   		      IDMABD_DBO_BIG_ENDIAN | IDMABD_SBO_BIG_ENDIAN |
			      IDMABD_VALID | IDMABD_DST_DONE |
			      IDMABD_SRC_LOCAL);	


        while (*((VUINT32*)CPCR_REG) & CPCR_FLG); /* Wait till CPA available */
        /* IDMA2 PAGE/CODE IDMA command start_idma */
        *((VUINT32*)CPCR_REG) = IDMA2_PAGE_SUBBLOCK|CPCR_FLG|CPCR_START_IDMA;

        while (*((VUINT32*)CPCR_REG) & CPCR_FLG); /* Wait till CPCR available */

        while (!((*(VUINT8*)IDSR2) & 0x1)); /* Wait for completion of IDMA */ 

        value = sysLong(idmaBd->dstptr); /* Byte Swap  */

        /*Clear the IDSR2 status bit so each access waits for actual completion*/ 
        *((VUINT8*)IDSR2) = 0x1;  

        intUnlock(key);  /* Allow access to idma */
        }
    else
        { 
        value = sysLong((int)src); /* Byte Swap  */
        }

    return (value);
    }
                  

/****************************************************************************
*
* pciBridgeRegisterReadWord - read a word from PCI Bridge using IDMA 
*
* This routine reads 16-bit values from the PCI Bridge using IDMA.
*  
* RETURNS: 16-bit value at location  
*
* ERRNO
*/

UINT16 pciBridgeRegisterReadWord
    (
    int src
    ) 
    {
    volatile int key;
    UINT16 value;

    if (((UINT32)src >= CPU_PCI_MEM_ADRS) && ((UINT32)src < CPU_PCI_IO_ADRS))
        {
        key = intLock();  /* Need to make sure only one access at a time */

        /* Setup buffer descriptor */ 
        idmaBd->srcptr = (UINT32)src; 
        idmaBd->length = 2; /* Need to set to prevent alignment issues  */
        /* This needs to be set each time for the valid bit */ 
        idmaBd->cstatus = (IDMABD_INT_ENABLE | IDMABD_WRAP | IDMABD_LAST |
	   		      IDMABD_DBO_BIG_ENDIAN | IDMABD_SBO_BIG_ENDIAN |
			      IDMABD_VALID | IDMABD_DST_DONE |
			      IDMABD_SRC_LOCAL);	

        while (*((VUINT32*)CPCR_REG) & CPCR_FLG); /* Wait till CPCR available */

        /* IDMA2 PAGE/CODE IDMA command start_idma */
        *((VUINT32*)CPCR_REG) = IDMA2_PAGE_SUBBLOCK|CPCR_FLG|CPCR_START_IDMA;

        while (*((VUINT32*)CPCR_REG) & CPCR_FLG); /* Wait till CPCR available */

        while (!((*(VUINT8*)IDSR2) & 0x1));  /* Wait for completion of IDMA */ 

        value = sysWord(idmaBd->dstptr); /* Byte Swap  */

        /*Clear the IDSR2 status bit so each access waits for actual completion*/ 
        *((VUINT8*)IDSR2) = 0x1;  

        intUnlock(key);  /* Allow access to idma */
        }
    else
        { 
        value = sysWord((int)src); /* Byte Swap  */
        }

    return (value);
}

/****************************************************************************
*
* pciBridgeRegisterReadByte - read a byte from PCI Bridge using IDMA 
*
* This routine reads 8-bit values from the PCI Bridge using IDMA.
*  
* RETURNS: 8-bit value at location  
*
* ERRNO
*/

UINT8 pciBridgeRegisterReadByte
    (
    int src
    ) 
    {
    volatile int key;
    UINT8 value;

    if ((src >= CPU_PCI_MEM_ADRS) && (src < CPU_PCI_IO_ADRS))
        {
        key = intLock();  /* Need to make sure only one access at a time */

        /* Setup buffer descriptor */ 
        idmaBd->srcptr = (UINT32)src; 
        idmaBd->length = 1; /* Need to set to prevent alignment issues */
        /* This needs to be set each time for the valid bit */ 
        idmaBd->cstatus = (IDMABD_INT_ENABLE | IDMABD_WRAP | IDMABD_LAST |
	   		      IDMABD_DBO_BIG_ENDIAN | IDMABD_SBO_BIG_ENDIAN |
			      IDMABD_VALID | IDMABD_DST_DONE |
			      IDMABD_SRC_LOCAL);	

        while (*((VUINT32*)CPCR_REG) & CPCR_FLG); /* Wait till CPCR available */
        /* IDMA2 PAGE/CODE IDMA command start_idma */
        *((VUINT32*)CPCR_REG) = IDMA2_PAGE_SUBBLOCK|CPCR_FLG|CPCR_START_IDMA;

        while (*((VUINT32*)CPCR_REG) & CPCR_FLG); /* Wait till CPCR available */

        while (!((*(VUINT8*)IDSR2) & 0x1)); /* Wait for completion of IDMA */ 

        value = sysByte(idmaBd->dstptr);

        /*Clear the IDSR2 status bit so each access waits for actual completion*/ 
        *((VUINT8*)IDSR2) = 0x1;  

        intUnlock(key);  /* Allow access to idma */
        }
    else
        { 
        value = sysByte((int)src); /* Byte Swap  */
        }

    return (value);
    }

#endif /* PCI_BRIDGE_READ_ERRATA_WORKAROUND */