syslib.c

Freescale mpc834x 的VxWorks平台的BSP源代码。

        model = SYS_MODEL_8347ET;
        break;
        case 0x80530000:
        model = SYS_MODEL_8347T;
        break;
        case 0x80540000:
        model = SYS_MODEL_8347EP;
        break;
        case 0x80550000:
        model = SYS_MODEL_8347P;
        break;
        case 0x80560000:
        model = SYS_MODEL_8343E;
        break;
        case 0x80570000:
        model = SYS_MODEL_8343;
        break;
        default:
        model = "Motorola E300 - Unknown version";
        break;
        }
    }
    else
    {
    model = SYS_MODEL_UNKNOWN;
    }
    return(model);

    }

/******************************************************************************
*
* sysBspRev - return the bsp version with the revision eg 1.0/<x>
*
* This function returns a pointer to a bsp version with the revision.
* for eg. 1.0/<x>. BSP_REV defined in config.h is concatenated to
* BSP_VERSION and returned.
*
* RETURNS: A pointer to the BSP version/revision string.
*/

char * sysBspRev (void)
    {
    return (BSP_VERSION BSP_REV);
    }

/******************************************************************************
*
* sysHwMemInit - initialize and configure system memory.
*
* This routine is called before sysHwInit(). It performs memory auto-sizing
* and updates the system's physical regions table, `sysPhysRgnTbl'. It may
* include the code to do runtime configuration of extra memory controllers.
*
* NOTE: This routine should not be called directly by the user application.  It
* cannot be used to initialize interrupt vectors.
*
* RETURNS: N/A
*/

void sysHwMemInit (void)
    {
    /* Call sysPhysMemTop() to do memory autosizing if available */

    sysPhysMemDesc[1].len = (UINT)(sysPhysMemTop () -  RAM_LOW_ADRS);


    }

/******************************************************************************
*
* sysHwInit - initialize the system hardware
*
* This routine initializes various feature of the SBC834x board. It sets up
* the control registers, initializes various devices if they are present.
*
* NOTE: This routine should not be called directly by the user.
*
* RETURNS: N/A
*/

void sysHwInit (void)
    {
    
    /* This is a workaround for errata PCI9 */
#ifdef INCLUDE_PCI
    *M83XX_ACR(CCSBAR) |= M83XX_ACR_PARKM_PCI;  /* Park on PCI */
#else
    *M83XX_ACR(CCSBAR) &= ~M83XX_ACR_PARKM_PCI; /* Park PPC core */
#endif
	    

    /* Initialize Machine Check pin */
    vxHid0Set(0x80000000);

    vxHid2Set(vxHid2Get()|0x04e00000);
    vxMsrSet(vxMsrGet()|0x00000002);

    /* Set TSEC/CSB 1:1 clock ratio for performance */
    *M83XX_SCCR(CCSBAR) &= 0x5fffffff;

    /* set pointer to BAT initialization functions */

    _pSysBatInitFunc = (FUNCPTR) mmuPpcBatInitMPC7x5;

    /* Enable the e300 core timebase */
    *M83XX_SPCR(CCSBAR) |= M83XX_SPCR_TBEN;

    sysDuartHwInit();


    /* put correct memory size in sysPhysMemDesc[1].len for
     * size of local memory
     */
    sysHwMemInit();

    /* set the TSEC/SEC/USB/PCI 1-1 enabled clocking with CSB */

    /* Do we need to set these and if so in romInit.s */

    CACHE_PIPE_FLUSH();

    /* Get the Baud Rate Generator Clock  frequency */

    baudRateGenClk = sysBaudClkFreq();


#if defined(INCLUDE_MPC834X_USB) && defined(INCLUDE_USB) /* on board USB */
                                                                                                                    
    /* USB/CSB 1:1 clk ratio for performance and disable DR clk */
    *M83XX_SCCR(CCSBAR)  &= 0xff4fffff;

    /* Make sure USBMPH pins are available */
    *M83XX_SICRL(CCSBAR)   = 0x00000000 ;

    /* 256 MB */
    *M83XX_SNOOP1(CCSBAR) = 0x0000001b;

    /* Enable ports */
    *M83XX_PORTSC1(CCSBAR) = LONGSWAP(0x80000000) ;
    *M83XX_PORTSC2(CCSBAR) = LONGSWAP(0x80000000) ;

    /* Recommended values if not setting repeat mode */
    *M83XX_BURSTSIZE(CCSBAR) = LONGSWAP(0x00000808) ;

    /* rd prefetch 32byte base on burst size 8 x 4 */
    *M83XX_SI_CTRL(CCSBAR) = 0x00000000;

    /* Recommended prio and age cnt threshold */
    *M83XX_PRI_CTRL(CCSBAR) = 0x0000000c;
    *M83XX_AGE_CNT_THRESH(CCSBAR) = 0x00000040 ;

    /* Enable the phy */
    *M83XX_CONTROL(CCSBAR) = 0x00000004 ;

    /* Light the PCTL LED on the SBC834x */
    *M83XX_PORTSC1(CCSBAR) = LONGSWAP(0x80004000) ;
    
#endif /* INCLUDE_MPC834X_USB && INCLUDE_USB */

#ifdef INCLUDE_PCI

    /* config pci */
    if (pciConfigLibInit (PCI_MECHANISM_0,(ULONG) sysPciConfigRead,
                              (ULONG) sysPciConfigWrite,(ULONG) sysPciSpecialCycle) != OK)
        {
        sysToMonitor (BOOT_NO_AUTOBOOT);  /* BAIL */
        }

    /*  Initialize PCI interrupt library. */

    if ((pciIntLibInit ()) != OK)
        {
        sysToMonitor (BOOT_NO_AUTOBOOT);
        }


    mot83xxBridgeInit();

#  ifdef INCLUDE_PCI_AUTOCONF
            sysPciAutoConfig();
#  endif /* INCLUDE_PCI_AUTOCONF */

#endif /* INCLUDE_PCI */


    /* Initialize interrupts */

    quiccIntrInit();


#ifdef INCLUDE_SECURITY_ENGINE
    /* Initialize the Security Block */
    *QUICC_SECMR (CCSBAR) = 0xfffe0000;
    *QUICC_SECBR (CCSBAR) = SEC_ENG_BASE_ADRS | 0x1;

    /* SEC/CSB Engine 1:1 clk ratio for performance and disable DR clock */
    *M83XX_SCCR(CCSBAR) &= 0xfdffffff;
#endif /* INCLUDE_SECURITY_ENGINE */

    /*
     * The power management mode is initialized here. Reduced power mode
     * is activated only when the kernel is idle (cf vxPowerDown).
     * Power management mode is selected via vxPowerModeSet().
     * DEFAULT_POWER_MGT_MODE is defined in config.h.
     */

    vxPowerModeSet (DEFAULT_POWER_MGT_MODE);

    }


UINT32 spmfTable[] =
    {16, 0, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13 ,14, 15};


uint32_t sysBaudClkFreq(void)
    {
    /* Temp until better solution found */
    return(sysClkFreqGet());
    }

UINT32 sysClkFreqGet()
    {
    /* Temp base freq until better solution found */
    UINT32 baseFreq = OSCILLATOR_FREQ;
    UINT32 csb,lbiu,ddr,spmf,clkDiv,clkPll,coreFreq,tempVal;

    /* Read dip switches*/
    tempVal = *M83XX_SPMR(CCSBAR);
    lbiu = M83XX_SPMR_LBIU_VAL(tempVal);
    ddr = M83XX_SPMR_DDR_VAL(tempVal);
    spmf = M83XX_SPMR_SPMF_VAL(tempVal);
    clkDiv = M83XX_SPMR_CLK_DIV(tempVal);
    clkPll = M83XX_SPMR_CLK_PLL(tempVal);

    /* Calculate Freq of Core TBD*/
    csb  = baseFreq * spmfTable[spmf];
    coreFreq = csb * 0x3 /* TBD */;

    return(csb);

    }

/*******************************************************************************
*
* sysPhysMemTop - get the address of the top of physical memory
*
* This routine returns the address of the first missing byte of memory,
* which indicates the top of memory.
*
* Determine installed memory by reading memory control registers
* and calculating if one or 2 chip selects are used for SDRAM.
* Use the address mask and valid bit to determine each bank size.
*
* RETURNS: The address of the top of physical memory.
*
* SEE ALSO: sysMemTop()
*/

char * sysPhysMemTop (void)
    {
    LOCAL char * physTop = NULL;

    physTop = (char *)(LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE);

    return (physTop) ;
    }

/*******************************************************************************
*
* sysMemTop - get the address of the top of VxWorks memory
*
* This routine returns a pointer to the first byte of memory not
* controlled or used by VxWorks.
*
* The user can reserve memory space by defining the macro USER_RESERVED_MEM
* in config.h.  This routine returns the address of the reserved memory
* area.  The value of USER_RESERVED_MEM is in bytes.
*
* RETURNS: The address of the top of VxWorks memory.
*/

char * sysMemTop (void)
    {
    LOCAL char * memTop = NULL;

    if (memTop == NULL)
        {
        memTop = sysPhysMemTop () - USER_RESERVED_MEM;

#ifdef INCLUDE_EDR_PM

        /* account for ED&R persistent memory */

        memTop = memTop - PM_RESERVED_MEM;
#endif
        }

    return memTop;
    }


/******************************************************************************
*
* sysToMonitor - transfer control to the ROM monitor
*
* This routine transfers control to the ROM monitor.  Normally, it is called
* only by reboot()--which services ^X--and bus errors at interrupt level.
* However, in some circumstances, the user may wish to introduce a
* <startType> to enable special boot ROM facilities.
*
* RETURNS: Does not return.
*/

STATUS sysToMonitor
    (
     int startType  /* parameter passed to ROM to tell it how to boot */
    )
    {
    FUNCPTR pRom = (FUNCPTR) (ROM_TEXT_ADRS + 8);   /* Warm reboot */

    intLock();

    cacheDisable(INSTRUCTION_CACHE);
    cacheDisable(DATA_CACHE);

#ifdef INCLUDE_AUX_CLK
    sysAuxClkDisable();
#endif

#if (defined(INCLUDE_MPC834X_USB) && defined(INCLUDE_USB))
 
    /* Make sure the USB controller is stopped. */
    *M83XX_USBCMD(CCSBAR) &= LONGSWAP(~0x1) ;

#endif
										
    vxMsrSet (0);

    (*pRom) (startType);    /* jump to bootrom entry point */

    return (OK);    /* in case we ever continue from ROM monitor */
    }

/******************************************************************************
*
* sysHwInit2 - additional system configuration and initialization
*
* This routine connects system interrupts and does any additional
* configuration necessary.
*
* RETURNS: N/A
*/

void sysHwInit2 (void)
    {
    LOCAL BOOL configured = FALSE;

    if (!configured)
        {

        /* initialize serial interrupts */
        sysSerialHwInit2();

        configured = TRUE;

        /* Configure GPIO for user LEDs (output) and user switches (input) */
        *M83XX_GP1DIR(CCSBAR) = (0x0FF << 20);

        sysMsDelay(1);

#ifdef INCLUDE_PCI

#ifdef INCLUDE_GEI8254X_END
   sysPciConfigEnable (PCI_1_BUS);
#ifdef INCLUDE_PCI_AUTOCONF
   pciConfigForeachFunc (0, FALSE, (PCI_FOREACH_FUNC) sys8254xDeviceCheck, \
   (void *)&sysPci1SysNum);
#else
  #ifdef INCLUDE_GEI8254X_END_PCI1
     sys8254xDeviceCheck(0,0x11,0,(void *)&sysPci1SysNum);
  #endif /*INCLUDE_GEI8254X_END_PCI1 */
#endif /* INCLUDE_PCI_AUTOCONF */
										
#endif /* INCLUDE_GEI8254X_END */
#endif /* INCLUDE_PCI */

#ifdef INCLUDE_SYSLED

        /* cascade the user LEDs */
        sysLedsCascade();

#  if defined(INCLUDE_AUX_CLK)
        /*
         * initialize and start auxiliary clock support
         */
        sysAuxClkEnable ();

        sysAuxClkConnect((FUNCPTR)sysLedClkRoutine, 0);

#  endif /* INCLUDE_AUX_CLK */

#endif /* INCLUDE_SYSLED */

#ifdef INCLUDE_SYSLED
        sysLedHex(0xA);
#endif /* INCLUDE_SYSLED */

        }
    }


/******************************************************************************
*
* sysUsDelay - delay at least the specified amount of time (in microseconds)
*
* This routine will delay for at least the specified amount of time using the
* lower 32 bit "word" of the Time Base register as the timer.  The accuracy of
* the delay increases as the requested delay increases due to a certain amount
* of overhead.  As an example, a requested delay of 10 microseconds is
* accurate within approximately twenty percent, and a requested delay of 100
* microseconds is accurate within approximately two percent.
*
* NOTE:  This routine will not relinquish the CPU; it is meant to perform a
* busy loop delay.  The minimum delay that this routine will provide is
* approximately 10 microseconds.  The maximum delay is approximately the
* size of UINT32; however, there is no roll-over compensation for the total
* delay time, so it is necessary to back off two times the system tick rate
* from the maximum.
*
* RETURNS: N/A
*/

void sysUsDelay
    (
    UINT32    delay        /* length of time in microsec to delay */
    )
    {
    volatile int loop;
    volatile UINT32 decValue;

    for(loop=0;loop<(delay/10);loop++)
        decValue = vxDecGet();
    }

/*********************************************************************
*
* sysMsDelay - Uses the decrementer to calculate time elapsed
*
* void sysMsDelay
*   (
*   UINT        delay              * length of time in MS to delay *
*   )
*
* RETURNS : NONE