syslib.c

Freescale MPC85xx BSP (8555/8541)。绝对可用的。

* <startType> to enable special boot ROM facilities.
*
* RETURNS: Does not return.
*
* ERRNO
*/

STATUS sysToMonitor
    (
    int startType   /* parameter passed to ROM to tell it how to boot */
    )
    {
    FUNCPTR pRom = (FUNCPTR) (ROM_TEXT_ADRS + 4);   /* Warm reboot */

    intLock();

#ifdef INCLUDE_BRANCH_PREDICTION
    disableBranchPrediction();
#endif /* INCLUDE_BRANCH_PREDICTION */

#ifdef INCLUDE_CACHE_SUPPORT
    cacheDisable(INSTRUCTION_CACHE);
    cacheDisable(DATA_CACHE);
#endif
    sysClkDisable();

#ifdef INCLUDE_AUX_CLK
    sysAuxClkDisable();
#endif

    vxMsrSet (0);                     /* Let bootrom re-initialize */

    (*pRom) (startType);    /* jump to bootrom entry point */

    return(OK);    /* in case we ever continue from ROM monitor */
    }

/******************************************************************************
*
* sysHwInit2 - additional system configuration and initialization
*
* This routine connects system interrupts and does any additional
* configuration necessary.
*
* RETURNS: N/A
*
* ERRNO
*/

void sysHwInit2 (void)
    {

    excIntConnect ((VOIDFUNCPTR *) _EXC_OFF_DECR,
                   (VOIDFUNCPTR) sysClkInt);

    sysClkEnable();

#ifdef INCLUDE_AUX_CLK
    excIntConnect ((VOIDFUNCPTR *) _EXC_OFF_FIT, (VOIDFUNCPTR) sysAuxClkInt);
#endif

    /* This was previously reqd for errata workaround #29, the workaround 
     * has been replaced with patch for spr99776, so it now serves as an 
     * example of implementing an l1 instruction parity handler 
     */  
#ifdef INCLUDE_L1_IPARITY_HDLR_INBSP
    memcpy((void*)_EXC_OFF_L1_PARITY, (void *)jumpIParity, sizeof(INSTR));
    cacheTextUpdate((void *)_EXC_OFF_L1_PARITY, sizeof(INSTR));
    sysIvor1Set(_EXC_OFF_L1_PARITY);
    cacheDisable(INSTRUCTION_CACHE);
    vxL1CSR1Set(vxL1CSR1Get() | _PPC_L1CSR_CPE);
    cacheEnable(INSTRUCTION_CACHE);
#endif  /* INCLUDE_L1_IPARITY_HDLR_INBSP */

    /* initialize the EPIC interrupts */
    sysEpicIntrInit ();

#ifdef INCLUDE_CPM 
    sysCpmHwInit2();
#endif

    /* initialize serial interrupts */

#if defined(INCLUDE_DUART)
    sysSerialHwInit2 ();
#endif /* INCLUDE_DUART */

#if     defined (INCLUDE_SPE)
    _func_speProbeRtn = sysSpeProbe;
#endif  /* INCLUDE_SPE */

#ifdef INCLUDE_PCI
#ifdef INCLUDE_GEI8254X_END

    sysPciConfigEnable (CDS85XX_PCI_1_BUS);
    pciConfigForeachFunc (0, FALSE, (PCI_FOREACH_FUNC) sys8254xDeviceCheck, (void *)&sysPci1SysNum);

#ifdef  INCLUDE_CDS85XX_SECONDARY_PCI
    sysPciConfigEnable (CDS85XX_PCI_2_BUS);

    pciConfigForeachFunc (0, FALSE, (PCI_FOREACH_FUNC) sys8254xDeviceCheck, (void *)&sysPci2SysNum); 
#endif  /*  INCLUDE_CDS85XX_SECONDARY_PCI */

#endif /* INCLUDE_GEI8254X_END */
#endif /* INCLUDE_PCI */


    }

/******************************************************************************
*
* sysProcNumGet - get the processor number
*
* This routine returns the processor number for the CPU board, which is
* set with sysProcNumSet().
* 
* RETURNS: The processor number for the CPU board.
*
* ERRNO
*
* SEE ALSO: sysProcNumSet()
*/

int sysProcNumGet (void)
    {
    return(sysProcNum);
    }

/******************************************************************************
*
* sysProcNumSet - set the processor number
*
* This routine sets the processor number for the CPU board.  Processor numbers
* should be unique on a single backplane.
*
* Not applicable for the bus-less 8260Ads.
*
* RETURNS: N/A
*
* ERRNO
*
* SEE ALSO: sysProcNumGet()
*/

void sysProcNumSet
    (
    int     procNum         /* processor number */
    )
    {
    sysProcNum = procNum;
    }

/******************************************************************************
*
* sysLocalToBusAdrs - convert a local address to a bus address
*
* This routine gets the VMEbus address that accesses a specified local
* memory address.
*
* Not applicable for the 8260Ads
*
* RETURNS: ERROR, always.
*
* ERRNO
*
* SEE ALSO: sysBusToLocalAdrs()
*/

STATUS sysLocalToBusAdrs
    (
    int     adrsSpace,  /* bus address space where busAdrs resides */
    char *  localAdrs,  /* local address to convert */ 
    char ** pBusAdrs    /* where to return bus address */ 
    )
    {
    return(ERROR);
    }

/******************************************************************************
*
* sysBusToLocalAdrs - convert a bus address to a local address
*
* This routine gets the local address that accesses a specified VMEbus
* physical memory address.
*
* Not applicable for the 8260Ads
*
* RETURNS: ERROR, always.
*
* ERRNO
*
* SEE ALSO: sysLocalToBusAdrs()
*/

STATUS sysBusToLocalAdrs
    (
    int     adrsSpace,  /* bus address space where busAdrs resides */
    char *  busAdrs,    /* bus address to convert */
    char ** pLocalAdrs  /* where to return local address */
    )
    {
    return(ERROR);
    }

/******************************************************************************
*
* sysBusTas - test and set a location across the bus
*
* This routine does an atomic test-and-set operation across the backplane.
*
* Not applicable for the 8260Ads.
*
* RETURNS: FALSE, always.
*
* ERRNO
*
* SEE ALSO: vxTas()
*/

BOOL sysBusTas
    (
    char *  adrs        /* address to be tested-and-set */
    )
    {
    return(FALSE);
    }

/******************************************************************************
*
* sysBusClearTas - test and clear 
*
* This routine is a null function.
*
* RETURNS: N/A
*
* ERRNO
*/

void sysBusClearTas
    (
    volatile char * address /* address to be tested-and-cleared */
    )
    {
    } 

#ifdef INCLUDE_MOTFCCEND
/*******************************************************************************
*
* sysFccEnetAddrGet - get the hardware Ethernet address
*
* This routine provides the six byte Ethernet hardware address that will be
* used by each individual FCC device unit.  This routine must copy
* the six byte address to the space provided by <addr>.
*
* RETURNS: OK, or ERROR if the Ethernet address cannot be returned.
*
* ERRNO
*/

STATUS sysFccEnetAddrGet
    (
    int         unit,       /* base address of the on-chip RAM */
    UCHAR *     addr            /* where to copy the Ethernet address */
    )
    {

    bcopy ((char *) &sysFccEnetAddr[unit][0], (char *) addr, 6);

    return(OK);
    }

#endif /* INCLUDE_MOTFCCEND */


#ifdef INCLUDE_PCI 	/* board level PCI routines */

/*******************************************************************************
* sysPciConfigEnable -  enable PCI 1 or PCI 2 bus configuration
*
* This function enables PCI 1 or PCI 2 bus configuration
*  
* RETURNS: N/A
*
* ERRNO
*/

void sysPciConfigEnable 
    (
    int pciHost
    )
    {
    int level;

    level = intLock ();

    if (pciHost == CDS85XX_PCI_2_BUS)
        {
        sysPciConfAddr = PCI2_CFG_ADR_REG;   /* PCI Configuration Address */
        sysPciConfData = PCI2_CFG_DATA_REG;  /* PCI Configuration Data */
        }
    else /* default is for PCI 1 host */
        {
        sysPciConfAddr = PCI_CFG_ADR_REG;   /* PCI Configuration Address */
        sysPciConfData = PCI_CFG_DATA_REG;  /* PCI Configuration Data */
        }

    WRS_ASM("sync;eieio");

    intUnlock (level);
    }

/*******************************************************************************
*
* sysPciSpecialCycle - generate a special cycle with a message
*
* This routine generates a special cycle with a message.
*
* \NOMANUAL
*
* RETURNS: OK
*
* ERRNO
*/

STATUS sysPciSpecialCycle
    (
    int     busNo,
    UINT32  message
    )
    {
    int deviceNo    = 0x0000001f;
    int funcNo      = 0x00000007;

    pciRegWrite ((UINT32 *)sysPciConfAddr,
                 (UINT32)pciConfigBdfPack (busNo, deviceNo, funcNo) |
                 0x80000000);

    PCI_OUT_LONG (sysPciConfData, message);

    return(OK);
    }

/*******************************************************************************
*
* sysPciConfigRead - read from the PCI configuration space
*
* This routine reads either a byte, word or a long word specified by
* the argument <width>, from the PCI configuration space
* This routine works around a problem in the hardware which hangs
* PCI bus if device no 12 is accessed from the PCI configuration space.
*
* \NOMANUAL
*
* RETURNS: OK, or ERROR if this library is not initialized
*
* ERRNO
*/

STATUS sysPciConfigRead
    (
    int busNo,    /* bus number */
    int deviceNo, /* device number */
    int funcNo,   /* function number */
    int offset,   /* offset into the configuration space */
    int width,    /* width to be read */
    void * pData /* data read from the offset */
    )
    {
    UINT8  retValByte = 0;
    UINT16 retValWord = 0;
    UINT32 retValLong = 0;
    STATUS retStat = ERROR;

    if ((busNo == 0) && (deviceNo == 0x1f) /* simulator doesn't like this device being used */)
        return(ERROR);

    switch (width)
        {
        case 1: /* byte */
            pciRegWrite ((UINT32 *)sysPciConfAddr,
                         (UINT32)pciConfigBdfPack (busNo, deviceNo, funcNo) |
                         (offset & 0xfc) | 0x80000000);

            retValByte = PCI_IN_BYTE (sysPciConfData + (offset & 0x3));
            *((UINT8 *)pData) = retValByte;
            retStat = OK;
            break;

        case 2: /* word */
            pciRegWrite ((UINT32 *)sysPciConfAddr,
                         (UINT32)pciConfigBdfPack (busNo, deviceNo, funcNo) |
                         (offset & 0xfc) | 0x80000000);

            retValWord = PCI_IN_WORD (sysPciConfData + (offset & 0x2));
            *((UINT16 *)pData) = retValWord;
            retStat = OK;
            break;

        case 4: /* long */
            pciRegWrite ((UINT32 *)sysPciConfAddr,
                         (UINT32)pciConfigBdfPack (busNo, deviceNo, funcNo) |
                         (offset & 0xfc) | 0x80000000);
            retValLong = PCI_IN_LONG (sysPciConfData);
            *((UINT32 *)pData) = retValLong;
            retStat = OK;
            break;

        default:
            retStat = ERROR;
            break;
        }

    return(retStat);
    }

/*******************************************************************************
*
* sysPciConfigWrite - write to the PCI configuration space
*
* This routine writes either a byte, word or a long word specified by
* the argument <width>, to the PCI configuration space
* This routine works around a problem in the hardware which hangs
* PCI bus if device no 12 is accessed from the PCI configuration space.
*
* \NOMANUAL
*
* RETURNS: OK, or ERROR if this library is not initialized
*
* ERRNO
*/

STATUS sysPciConfigWrite
    (
    int busNo,    /* bus number */
    int deviceNo, /* device number */
    int funcNo,   /* function number */
    int offset,   /* offset into the configuration space */
    int width,    /* width to write */
    ULONG data    /* data to write */
    )
    {
    if ((busNo == 0) && (deviceNo == 0x1f))
        return(ERROR);

    switch (width)
        {
        case 1: /* byte */
            pciRegWrite ((UINT32 *)sysPciConfAddr,
                         (UINT32)pciConfigBdfPack (busNo, deviceNo, funcNo) |
                         (offset & 0xfc) | 0x80000000);
            PCI_OUT_BYTE ((sysPciConfData + (offset & 0x3)), data);
            break;

        case 2: /* word */
            pciRegWrite ((UINT32 *)sysPciConfAddr,
                         (UINT32)pciConfigBdfPack (busNo, deviceNo, funcNo) |
                         (offset & 0xfc) | 0x80000000);
            PCI_OUT_WORD ((sysPciConfData + (offset & 0x2)), data);
            break;

        case 4: /* long */
            pciRegWrite ((UINT32 *)sysPciConfAddr,
                         (UINT32)pciConfigBdfPack (busNo, deviceNo, funcNo) |
                         (offset & 0xfc) | 0x80000000);
            PCI_OUT_LONG (sysPciConfData, data);
            break;

        default:
            return(ERROR);

        }
    return(OK);
    }
#endif /* INCLUDE_PCI */

/******************************************************************************
*
* sysUsDelay - delay at least the specified amount of time (in microseconds)
*
* This routine will delay for at least the specified amount of time using the
* lower 32 bit "word" of the Time Base register as the timer.  
*
* NOTE:  This routine will not relinquish the CPU; it is meant to perform a
* busy loop delay.  The minimum delay that this routine will provide is
* approximately 10 microseconds.  The maximum delay is approximately the
* size of UINT32; however, there is no roll-over compensation for the total
* delay time, so it is necessary to back off two times the system tick rate
* from the maximum.
*
* RETURNS: N/A
*
* ERRNO
*/

void sysUsDelay
    (
    UINT32    delay        /* length of time in microsec to delay */
    )
    {
    register UINT baselineTickCount;
    register UINT curTickCount;
    register UINT terminalTickCount;
    register int actualRollover = 0;
    register int calcRollover = 0;
    UINT ticksToWait;
    UINT requestedDelay;
    UINT oneUsDelay;

    /* Exit if no delay count */

    if ((requestedDelay = delay) == 0)
        return;

    /*
     * Get the Time Base Lower register tick count, this will be used
     * as the baseline.
     */

    baselineTickCount = sysTimeBaseLGet();

    /*
     * Calculate number of ticks equal to 1 microsecond