hwinit.c

Freescale ARM11系列CPU MX31的WINCE 5.0下的BSP

        OUTREG16(&cpld->BCTRL3_CLEAR,(1<<PBC_BCTRL3_FSH_VBUS_EN));//bit 9: USB_FSH_VBUS_EN
        OUTREG16(&cpld->BCTRL3_CLEAR,(1<<PBC_BCTRL3_FSH_MODE));  //bit 6: "0" to select single ended mode
        
        #if (USB_HOST_MODE==2)
            *sel=1;
        #else
            *sel=0;  
        #endif
        if (*sel)
            OUTREG16(&cpld->BCTRL3_SET,(1<<PBC_BCTRL3_FSH_SEL));         //bit 2: "1" to select CSPI route
        else
            OUTREG16(&cpld->BCTRL3_CLEAR,(1<<PBC_BCTRL3_FSH_SEL));       //bit 2: "0" to select STX route

        r=FULL_SPEED;
    }
#else
    {
        *sel = 0;
        DEBUGMSG(1, (L"High speed USB host\r\n"));
        OUTREG16(&cpld->BCTRL3_CLEAR, (1<<PBC_BCTRL3_HSH_EN));
        OUTREG16(&cpld->BCTRL3_SET, (1<<PBC_BCTRL3_HSH_SEL));
        OUTREG16(&cpld->BCTRL3_CLEAR, (1<<PBC_BCTRL3_OTG_HS_EN));
         
        r=HIGH_SPEED;
    }
#endif
#endif  
 
     MmUnmapIoSpace(cpld, sizeof(CSP_PBC_REGS));
    return r;
}

extern BOOL Initialize1105();
extern BOOL Initialize1301(CSP_USB_REGS * regs);
extern BOOL Initialize1504(CSP_USB_REGS * regs, WORD sel);
extern void DumpULPIRegs(PCSP_USB_REGS pRegs, WORD sel);

//-----------------------------------------------------------------------------
//
//  Function: DumpDeviceState
//
//  This function is to dump the device status
//
//  Parameters:
//     state - pointer to PORTSC register
//     
//  Returns:
//     NULL
//
//-----------------------------------------------------------------------------
static void DumpDeviceState( USB_PORTSC_T * state)  
{ 
    if (state->CCS)
        DEBUGMSG(1, (L"\t\tCurrent Connect Status: Attached\r\n"));
    if (state->CSC)
        DEBUGMSG (1, (L"\t\tConnect Status Change: Changed\r\n"));
    if (state->PE)
        DEBUGMSG (1, (L"\t\tPort Enabled\r\n"));
    if (state->PEC)
        DEBUGMSG (1, (L"\t\tPort Enable/Disable Change\r\n"));
    if (state->OCA)
        DEBUGMSG (1, (L"\t\tOver-current Active\r\n"));
    if (state->OCC)
        DEBUGMSG (1, (L"\t\tOver-current Change\r\n"));
    if (state->FPR)
        DEBUGMSG (1, (L"\t\tForce Port Resume\r\n"));
    if (state->SUSP)
        DEBUGMSG (1, (L"\t\tSuspend\r\n"));
    if (state->PR)
        DEBUGMSG (1, (L"\t\tPort Reset\r\n"));
    if (state->HSP)
        DEBUGMSG (1, (L"\t\tHigh-Speed Port \r\n"));
    
    DEBUGMSG (1, (L"\t\tLine Status: %x", state->LS));
    switch (state->LS) 
	{
        case 0:
            DEBUGMSG (1, (L"\t\t\tSE0\r\n"));
            break;
        case 1:
            DEBUGMSG (1, (L"\t\t\tJ-state\r\n"));
            break;
        case 2:
            DEBUGMSG (1, (L"\t\t\tK-state\r\n"));
            break;
        default:
            DEBUGMSG (1, (L"\t\t\tUndefined\r\n"));
            break;
    }

    if (state->PP)
        DEBUGMSG (1, (L"\t\t??? Should be 0 for device\r\n"));
    if (state->PO)
        DEBUGMSG (1, (L"\t\tPort Owner\r\n"));
    if (state->PIC) {
        DEBUGMSG (1, (L"\t\tPort Indicator Control"));
        switch (state->PIC) {
            case 1:
                DEBUGMSG (1, (L"\t\t\tAmber\r\n"));
                break;
            case 2:
                DEBUGMSG (1, (L"\t\t\tGreen\r\n"));
                break;
          
            default:
                DEBUGMSG (1, (L"\t\t\tUndefined\r\n"));
                break;
        }
    }   
    if (state->PTC) 
        DEBUGMSG (1, (L"\t\tPort Test Control: %x\r\n", state->PTC));
        
    if (state->WKCN) 
        DEBUGMSG (1, (L"\t\tWake on Connect Enable (WKCNNT_E)\r\n"));
                        
    if (state->WKDC) 
        DEBUGMSG (1, (L"\t\tWake on Disconnect Enable (WKDSCNNT_E) \r\n"));

    if (state->WKOC) 
        DEBUGMSG (1, (L"\t\tWake on Over-current Enable (WKOC_E) \r\n"));
    
    if (state->PHCD) 
        DEBUGMSG (1, (L"\t\tPHY Low Power Suspend - Clock Disable (PLPSCD) \r\n"));

    if (state->PFSC) 
        DEBUGMSG (1, (L"\t\tPort Force Full Speed Connect \r\n"));

    DEBUGMSG (1, (L"\t\tPort Speed: %x->", state->PSPD));
    switch (state->PSPD) 
	{
        case 0:
            DEBUGMSG (1, (L"\t\t\tFull Speed\r\n"));
            break;
        case 1:
            DEBUGMSG (1, (L"\t\t\tLow Speed\r\n"));
            break;
        case 2:
            DEBUGMSG (1, (L"\t\t\tHigh Speed\r\n"));
            break;
        
        default:
            DEBUGMSG (1, (L"\t\t\tUndefined\r\n"));
            break;
    }
    DEBUGMSG (1, (L"\t\tParallel Transceiver Width:%x->", state->PTW));
    if (state->PTW) 
        DEBUGMSG (1, (L"\t\t\t16 bits\r\n"));
    else
        DEBUGMSG (1, (L"\t\t\t8 bits\r\n"));
    if (state->STS) 
        DEBUGMSG (1, (L"\t\tSerial Transceiver Select \r\n"));
    
    DEBUGMSG (1, (L"\t\tParallel Transceiver Select:%x->", state->PTS));
    switch (state->PTS) {
        case 0:
            DEBUGMSG (1, (L"\t\t\tUTMI/UTMI+\r\n"));
            break;
        case 1:
            DEBUGMSG (1, (L"\t\t\tPhilips Classic\r\n"));
            break;
        case 2:
            DEBUGMSG (1, (L"\t\t\tULPI\r\n"));
            break;
        case 3:
            DEBUGMSG (1, (L"\t\t\tSerial/1.1 PHY (FS Only)\r\n"));
            break;
        default:
            DEBUGMSG (1, (L"\t\t\tUndefined\r\n"));
            break;
    }                   
}

//-----------------------------------------------------------------------------
//
//  Function: DumpUSBRegs
//
//  This function is to dump the USB Register detail
//
//  Parameters:
//     regs - Pointer to 3 USB Core Register
//     sel - 0: H2, 1: H1, 2: OTG
//     
//  Returns:
//     NULL
//
//-----------------------------------------------------------------------------
static void DumpUSBRegs(PCSP_USB_REGS regs, WORD sel)
{    
    CSP_USB_REG *pReg;
    
    if (sel == 2)
        DEBUGMSG (1, (L"Dump OTG Regs\r\n"));
    else
        DEBUGMSG (1,(L"Dump H%s USB Regs\r\n", ((sel == 0)? "2": "1")));
    
    if (sel == 0)
        pReg = (PCSP_USB_REG)(&(regs->H2));
    else if (sel==1)
        pReg = (PCSP_USB_REG)(&(regs->H1));
    else
        pReg=(PCSP_USB_REG)(&(regs->OTG));

    DEBUGMSG (1,(L"\tID(%xh)=%x\r\n",offset(CSP_USB_REG,ID), INREG32(&pReg->ID)));
    DEBUGMSG (1,(L"\tHWGENERAL(%xh)=%x\r\n",offset(CSP_USB_REG,HWGENERAL),INREG32(&pReg->HWGENERAL)));
    DEBUGMSG (1,(L"\tHWHOST(%xh)=%x\r\n",offset(CSP_USB_REG,HWHOST),INREG32(&pReg->HWHOST)));
    DEBUGMSG (1,(L"\tHWDEVICE(%xh)=%x\r\n",offset(CSP_USB_REG,HWDEVICE),INREG32(&pReg->HWDEVICE)));
    DEBUGMSG (1,(L"\tHWTXBUF(%xh)=%x\r\n",offset(CSP_USB_REG,HWTXBUF),INREG32(&pReg->HWTXBUF)));
    DEBUGMSG (1,(L"\tHWRXBUF(%xh)=%x\r\n",offset(CSP_USB_REG,HWRXBUF),INREG32(&pReg->HWRXBUF)));
    DEBUGMSG (1,(L"\tCAPLENGTH(%xh)=%x\r\n",offset(CSP_USB_REG,CAPLENGTH),INREG8(&pReg->CAPLENGTH)));
    DEBUGMSG (1,(L"\tHCIVERSION(%xh)=%x\r\n",offset(CSP_USB_REG,HCIVERSION),INREG16(&pReg->HCIVERSION)));
    DEBUGMSG (1,(L"\tHCSPARAMS(%xh)=%x\r\n",offset(CSP_USB_REG,HCSPARAMS),INREG32(&pReg->HCSPARAMS)));
    DEBUGMSG (1,(L"\tHCCPARAMS(%xh)=%x\r\n",offset(CSP_USB_REG,HCCPARAMS),INREG32(&pReg->HCCPARAMS)));
    DEBUGMSG (1,(L"\tDCIVERSION(%xh)=%x\r\n",offset(CSP_USB_REG,DCIVERSION),INREG16(&pReg->DCIVERSION)));
    DEBUGMSG (1,(L"\tDCCPARAMS(%xh)=%x\r\n",offset(CSP_USB_REG,DCCPARAMS),INREG32(&pReg->DCCPARAMS)));
    DEBUGMSG (1,(L"\tUSBCMD(%xh)=%x\r\n",offset(CSP_USB_REG,USBCMD),INREG32(&pReg->USBCMD)));
    DEBUGMSG (1,(L"\tUSBSTS(%xh)=%x\r\n",offset(CSP_USB_REG,USBSTS),INREG32(&pReg->USBSTS)));
    DEBUGMSG (1,(L"\tUSBINTR(%xh)=%x\r\n",offset(CSP_USB_REG,USBINTR),INREG32(&pReg->USBINTR)));
    DEBUGMSG (1,(L"\tPORTSC(%xh)[0]=%x\r\n",offset(CSP_USB_REG,PORTSC[0]),INREG32(&pReg->PORTSC[0])));
    {
        USB_PORTSC_T state;
        DWORD * temp=(DWORD*)&state;
        *temp=INREG32(&pReg->PORTSC[0]);
        DumpDeviceState( & state);
    }
    DEBUGMSG (1,(L"\tOTGSC(%xh)=%x\r\n",offset(CSP_USB_REG,OTGSC),INREG32(&pReg->OTGSC)));
    DEBUGMSG (1,(L"\tUSBMODE(%xh)=%x\r\n",offset(CSP_USB_REG,USBMODE),INREG32(&pReg->USBMODE)));
    DEBUGMSG (1,(L"\tULPI_VIEWPORT(%xh)=%x\r\n",offset(CSP_USB_REG,ULPI_VIEWPORT),INREG32(&pReg->ULPI_VIEWPORT)));

    DEBUGMSG (1,(L"\t*********************\r\n"));
    DEBUGMSG (1,(L"\tAddress of ASYNCLISTADDR at 0x%x\r\n", &pReg->T_158H.ASYNCLISTADDR));
    DEBUGMSG (1,(L"\tASYNCLISTADDR(%xh)=%x\r\n",offset(CSP_USB_REG,T_158H),INREG32(&pReg->T_158H.ASYNCLISTADDR)));
    DEBUGMSG (1,(L"\tENDPTSETUPSTAT(%xh)=%x\r\n",offset(CSP_USB_REG,ENDPTSETUPSTAT),INREG32(&pReg->ENDPTSETUPSTAT)));
    DEBUGMSG (1,(L"\tENDPTPRIME(%xh)=%x\r\n",offset(CSP_USB_REG,ENDPTPRIME),INREG32(&pReg->ENDPTPRIME)));
    DEBUGMSG (1,(L"\tENDPTFLUSH(%xh)=%x\r\n",offset(CSP_USB_REG,ENDPTFLUSH),INREG32(&pReg->ENDPTFLUSH)));
    DEBUGMSG (1,(L"\tENDPTSTATUS(%xh)=%x\r\n",offset(CSP_USB_REG,ENDPTSTATUS),INREG32(&pReg->ENDPTSTATUS)));
    DEBUGMSG (1,(L"\tENDPTCOMPLETE(%xh)=%x\r\n",offset(CSP_USB_REG,ENDPTCOMPLETE),INREG32(&pReg->ENDPTCOMPLETE)));
    DEBUGMSG (1,(L"\tENDPTCTRL0(%xh)=%x\r\n",offset(CSP_USB_REG,ENDPTCTRL0),INREG32(&pReg->ENDPTCTRL0)));
    DEBUGMSG (1,(L"\t*********************\r\n"));
    
    DEBUGMSG (1,(L"\tUSB_CTRL(%xh)=%x\r\n",offset(CSP_USB_REGS,USB_CTRL),INREG32(&regs->USB_CTRL)));
    DEBUGMSG (1,(L"\tUSB_OTG_MIRROR(%xh)=%x\r\n",offset(CSP_USB_REGS,USB_OTG_MIRROR),INREG32(&regs->USB_OTG_MIRROR)));
}


//-----------------------------------------------------------------------------
//
//  Function: ConfigH1
//
//  This function is to configure the USB H1 Core.
//
//  Parameters:
//     pRegs - Pointer to 3 USB Core Registers
//     
//  Returns:
//     NULL
//
//-----------------------------------------------------------------------------
static void ConfigH1(CSP_USB_REGS *pRegs)
{
    USB_PORTSC_T portsc;
    USB_CTRL_T ctrl;
    USB_USBCMD_T  cmd;
    USB_USBMODE_T mode;
    DWORD *temp;

     temp =  (DWORD *)&ctrl;
    *temp = INREG32(&pRegs->USB_CTRL);
    ctrl.H1SIC = 0x2;
    OUTREG32(&pRegs->USB_CTRL, *temp);

     temp = (DWORD *)&ctrl;
    *temp = INREG32(&pRegs->USB_CTRL);
    ctrl.H1WIE = 0x1;
    OUTREG32(&pRegs->USB_CTRL, *temp);

     temp = (DWORD *)&ctrl;
    *temp = INREG32(&pRegs->USB_CTRL);
    ctrl.H1PM = 0x1;
    OUTREG32(&pRegs->USB_CTRL, *temp);

     temp = (DWORD *)&ctrl;
    *temp = INREG32(&pRegs->USB_CTRL);
    ctrl.H1DT = 0x1;
    OUTREG32(&pRegs->USB_CTRL, *temp);

     temp = (DWORD *)&ctrl;
    *temp = INREG32(&pRegs->USB_CTRL);
    ctrl.BPE = 0x1;
    OUTREG32(&pRegs->USB_CTRL, *temp);
    
     temp = (DWORD *)&cmd;
    *temp = INREG32(&pRegs->H1.USBCMD);
    cmd.RST = 1;
    OUTREG32(&pRegs->H1.USBCMD, *temp);

    while (INREG32(&pRegs->H1.USBCMD)& (0x1 << 1));

    temp = (DWORD *)&mode;
    *temp = INREG32(&pRegs->H1.USBMODE);
    mode.CM = 0x3;
    OUTREG32(&pRegs->H1.USBMODE, *temp);

    Sleep(10);
    if ((INREG32(&pRegs->H1.USBMODE)& 0x3) != 0x3)
    {
        DEBUGMSG (1, (TEXT("USBMode setting failure\r\n")));
        return;
    }

     if (INREG32(&pRegs->H1.HCSPARAMS) &(0x1 << 4))
    {
        temp = (DWORD *)&portsc;
        *temp = INREG32(&pRegs->H1.PORTSC);
        portsc.PP = 1;
        OUTREG32(&pRegs->H1.PORTSC, *temp);
    }
    else
        DEBUGMSG (1, (TEXT("Host does not control power\r\n")));

     temp=(DWORD *)&cmd; 
    *temp=0;
    cmd.RST=1;  
    CLRREG32(&pRegs->H1.USBCMD, *temp);
    *temp = INREG32(&pRegs->H1.USBCMD);
    cmd.RST=1;
    OUTREG32(&pRegs->H1.USBCMD, *temp);
    while (INREG32(&pRegs->H1.USBCMD) & (0x1 << 1));

    temp = (DWORD *)&mode;
    *temp = INREG32(&pRegs->H1.USBMODE);
    mode.CM = 0x3;
    OUTREG32(&pRegs->H1.USBMODE, *temp);

    Sleep(10);
    while ((INREG32(&pRegs->H1.USBMODE)& 0x3) != 0x3);

    
     return;
}
//-----------------------------------------------------------------------------
//
//  Function: ConfigH2
//
//  This function is to configure the USB H2 Core.
//
//  Parameters:
//     pRegs - Pointer to 3 USB Core Registers
//     
//  Returns:
//     NULL
//
//-----------------------------------------------------------------------------
static void ConfigH2(CSP_USB_REGS *pRegs)
{
    USB_PORTSC_T portsc;
    USB_CTRL_T   ctrl;
    USB_USBMODE_T mode;
    USB_USBCMD_T cmd;
    DWORD *temp;