debug.c

Freescale ARM11系列CPU MX31的WINCE 5.0下的BSP

//-----------------------------------------------------------------------------
//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
//------------------------------------------------------------------------------
//
//  Copyright (C) 2004-2006, Freescale Semiconductor, Inc. All Rights Reserved.
//  THIS SOURCE CODE, AND ITS USE AND DISTRIBUTION, IS SUBJECT TO THE TERMS
//  AND CONDITIONS OF THE APPLICABLE LICENSE AGREEMENT
//
//------------------------------------------------------------------------------
//
//  File:  debug.c
//
//  This module is provides the interface to the serial port.
//
//-----------------------------------------------------------------------------
#include <bsp.h>
#include <nkintr.h>

#if (DEBUG_PORT == DBG_SC16C652_PORTA) || (DEBUG_PORT == DBG_SC16C652_PORTB)
#include "sc16c652.h"
#endif


//------------------------------------------------------------------------------
// Defines

//------------------------------------------------------------------------------
// Externs

//------------------------------------------------------------------------------
// Global Variables
UINT16 g_PBCversion;
PCSP_PBC_REGS g_pPBC;
PCSP_IOMUX_REGS g_pIOMUX;
UINT32 g_oalPerClkFreq;
PCSP_CCM_REGS g_pCCM;

//------------------------------------------------------------------------------
// Local Variables
static PCSP_UART_REG g_pUART;

#if (DEBUG_PORT == DBG_SC16C652_PORTA) || (DEBUG_PORT == DBG_SC16C652_PORTB)
static PBSP_SC16C652_REGS g_pExtUART;
#endif

//------------------------------------------------------------------------------
// Local Functions

//------------------------------------------------------------------------------
//
//  Function: OEMInitDebugSerial
//
//  Initializes the debug serial port
//
//------------------------------------------------------------------------------
VOID OEMInitDebugSerial()
{
#if DEBUG_PORT == DBG_UART1
    UINT32 refClkFreq;
#endif
    
    // Disable all OAL log zones until serial debug properly configured
    OALLogSetZones(0);

    g_pPBC = (PCSP_PBC_REGS) OALPAtoUA(BSP_BASE_REG_PA_PBC_BASE);
    if (g_pPBC == NULL)
    {
        return;
    }

    g_pIOMUX = (PCSP_IOMUX_REGS) OALPAtoUA(CSP_BASE_REG_PA_IOMUXC);
    if (g_pIOMUX == NULL)
    {
        return;
    }

    g_pCCM = (PCSP_CCM_REGS) OALPAtoUA(CSP_BASE_REG_PA_CCM);
    if (g_pCCM == NULL)
    {
        return;
    }

#if DEBUG_PORT == DBG_UART1

    g_pUART = (PCSP_UART_REG) OALPAtoUA(CSP_BASE_REG_PA_UART1);
    if (g_pUART == NULL)
    {
        return;
    }

    // Configure IOMUX for UART1
    OAL_IOMUX_SET_MUX(g_pIOMUX, DDK_IOMUX_PIN_RXD1, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
    OAL_IOMUX_SET_MUX(g_pIOMUX, DDK_IOMUX_PIN_TXD1, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
    OAL_IOMUX_SET_MUX(g_pIOMUX, DDK_IOMUX_PIN_RTS1, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);
    OAL_IOMUX_SET_MUX(g_pIOMUX, DDK_IOMUX_PIN_CTS1, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);

    OAL_IOMUX_SET_MUX(g_pIOMUX, DDK_IOMUX_PIN_WATCHDOG_RST, DDK_IOMUX_OUT_FUNC, DDK_IOMUX_IN_FUNC);

    
    // Map UART1 to UARTC
    OUTREG16(&g_pPBC->BCTRL2_SET, (1 << PBC_BCTRL2_USELC_LSH));

    // Enable UART transceiver
    OUTREG16(&g_pPBC->BCTRL1_CLEAR, (1 << PBC_BCTRL1_CLEAR_UENCE_LSH));

    OUTREG32(&g_pUART->UCR2,
        CSP_BITFVAL(UART_UCR2_SRST, UART_UCR2_SRST_RESET) |
        CSP_BITFVAL(UART_UCR2_RXEN, UART_UCR2_RXEN_ENABLE) |
        CSP_BITFVAL(UART_UCR2_TXEN, UART_UCR2_TXEN_ENABLE) |
        CSP_BITFVAL(UART_UCR2_ATEN, UART_UCR2_ATEN_DISABLE) |
        CSP_BITFVAL(UART_UCR2_RTSEN, UART_UCR2_RTSEN_DISABLE) |
        CSP_BITFVAL(UART_UCR2_WS, UART_UCR2_WS_8BIT) |
        CSP_BITFVAL(UART_UCR2_STPB, UART_UCR2_STPB_1STOP) |
        CSP_BITFVAL(UART_UCR2_PROE, UART_UCR2_PROE_EVEN) |
        CSP_BITFVAL(UART_UCR2_PREN, UART_UCR2_PREN_DISBLE) |
        CSP_BITFVAL(UART_UCR2_RTEC, UART_UCR2_RTEC_RISEDGE) |
        CSP_BITFVAL(UART_UCR2_ESCEN, UART_UCR2_ESCEN_DISABLE) |
        CSP_BITFVAL(UART_UCR2_CTS, UART_UCR2_CTS_HIGH) |
        CSP_BITFVAL(UART_UCR2_CTSC, UART_UCR2_CTSC_BITCTRL) |
        CSP_BITFVAL(UART_UCR2_IRTS, UART_UCR2_IRTS_IGNORERTS) |
        CSP_BITFVAL(UART_UCR2_ESCI, UART_UCR2_ESCI_DISABLE));

    // Software reset clears RX/TX state machines, FIFOs, and all status bits
    // which means all interrupts will be cleared

    // Wait until UART comes out of reset (reset asserted via UCR2 SRST)
    while (!(INREG32(&g_pUART->UCR2) & CSP_BITFMASK(UART_UCR2_SRST)));

    OUTREG32(&g_pUART->UCR1,
        CSP_BITFVAL(UART_UCR1_UARTEN, UART_UCR1_UARTEN_ENABLE) |
        CSP_BITFVAL(UART_UCR1_DOZE, UART_UCR1_DOZE_ENABLE) |
        CSP_BITFVAL(UART_UCR1_TDMAEN, UART_UCR1_TXDMAEN_DISABLE) |
        CSP_BITFVAL(UART_UCR1_SNDBRK, UART_UCR1_SNDBRK_NOBREAK) |
        CSP_BITFVAL(UART_UCR1_RTSDEN, UART_UCR1_RTSDEN_DISABLE) |
        CSP_BITFVAL(UART_UCR1_TXMPTYEN, UART_UCR1_TXMPTYEN_DISABLE) |
        CSP_BITFVAL(UART_UCR1_IREN, UART_UCR1_IREN_DISABLE) |
        CSP_BITFVAL(UART_UCR1_RDMAEN, UART_UCR1_RXDMAEN_DISABLE) |
        CSP_BITFVAL(UART_UCR1_RRDYEN, UART_UCR1_RRDYEN_DISABLE) |
        CSP_BITFVAL(UART_UCR1_ICD, UART_UCR1_ICD_8FRAMES) |
        CSP_BITFVAL(UART_UCR1_IDEN, UART_UCR1_IDEN_DISABLE) |
        CSP_BITFVAL(UART_UCR1_TRDYEN, UART_UCR1_TRDYEN_DISABLE) |
        CSP_BITFVAL(UART_UCR1_ADBR, UART_UCR1_ADBR_DISABLE) |
        CSP_BITFVAL(UART_UCR1_ADEN, UART_UCR1_ADEN_DISABLE));

    OUTREG32(&g_pUART->UCR3,
        CSP_BITFVAL(UART_UCR3_ACIEN, UART_UCR3_ACIEN_DISABLE) |
        CSP_BITFVAL(UART_UCR3_INVT, UART_UCR3_INVT_ACTIVELOW) |
        CSP_BITFVAL(UART_UCR3_RXDMUXSEL, UART_UCR3_RXDMUXSEL_MUX) |
        CSP_BITFVAL(UART_UCR3_DTRDEN, UART_UCR3_DTRDEN_DISABLE) |
        CSP_BITFVAL(UART_UCR3_AWAKEN, UART_UCR3_AWAKEN_DISABLE) |
        CSP_BITFVAL(UART_UCR3_AIRINTEN, UART_UCR3_AIRINTEN_DISABLE) |
        CSP_BITFVAL(UART_UCR3_RXDSEN, UART_UCR3_RXDSEN_DISABLE) |
        CSP_BITFVAL(UART_UCR3_RI, UART_UCR3_RI_LOW) |
        CSP_BITFVAL(UART_UCR3_DCD, UART_UCR3_DCD_LOW) |
        CSP_BITFVAL(UART_UCR3_DSR, UART_UCR3_DSR_LOW) |
        CSP_BITFVAL(UART_UCR3_FRAERREN, UART_UCR3_FRAERREN_DISABLE) |
        CSP_BITFVAL(UART_UCR3_PARERREN, UART_UCR3_PARERREN_DISABLE) |
        CSP_BITFVAL(UART_UCR3_DTREN, UART_UCR3_DTREN_DISABLE) |
        CSP_BITFVAL(UART_UCR3_DPEC, UART_UCR3_DPEC_RISEDGE));

    OUTREG32(&g_pUART->UCR4,
        CSP_BITFVAL(UART_UCR4_DREN, UART_UCR4_DREN_DISABLE) |
        CSP_BITFVAL(UART_UCR4_OREN, UART_UCR4_OREN_DISABLE) |
        CSP_BITFVAL(UART_UCR4_BKEN, UART_UCR4_BKEN_DISABLE) |
        CSP_BITFVAL(UART_UCR4_TCEN, UART_UCR4_TCEN_DISABLE) |
        CSP_BITFVAL(UART_UCR4_LPBYP, UART_UCR4_LPBYP_DISABLE) |
        CSP_BITFVAL(UART_UCR4_IRSC, UART_UCR4_IRSC_SAMPCLK) |
        CSP_BITFVAL(UART_UCR4_WKEN, UART_UCR4_WKEN_DISABLE) |
        CSP_BITFVAL(UART_UCR4_ENIRI, UART_UCR4_ENIRI_DISABLE) |
        CSP_BITFVAL(UART_UCR4_INVR, UART_UCR4_INVR_ACTIVELOW) |
        CSP_BITFVAL(UART_UCR4_CTSTL, 24));

    OUTREG32(&g_pUART->UFCR,
        CSP_BITFVAL(UART_UFCR_RXTL, 16) |
        CSP_BITFVAL(UART_UFCR_DCEDTE, UART_UFCR_DCEDTE_DCE) |
        CSP_BITFVAL(UART_UFCR_RFDIV, UART_UFCR_RFDIV_DIV2) |
        CSP_BITFVAL(UART_UFCR_TXTL, 4));

    OUTREG32(&g_pUART->UTS,
        CSP_BITFVAL(UART_UTS_RXDBG, UART_UTS_RXDBG_NOINCREMENT) |
        CSP_BITFVAL(UART_UTS_LOOPIR, UART_UTS_LOOPIR_NOLOOP) |
        CSP_BITFVAL(UART_UTS_DBGEN, UART_UTS_DBGEN_DEBUG) |
        CSP_BITFVAL(UART_UTS_LOOP, UART_UTS_LOOP_NOLOOP) |
        CSP_BITFVAL(UART_UTS_FRCPERR, UART_UTS_FRCPERR_NOERROR));

    // Determine the UART_REF_CLK frequency
    if (EXTREG32BF(&g_pCCM->CCMR, CCM_CCMR_PERCS) == CCM_CCMR_PERCS_USB_CLK)
    {
        refClkFreq = BSP_CLK_PERCK_FREQ;        
    }
    else if (INREG16(&g_pPBC->BSTAT2) & BSP_PBC_DSW_ALT_CLK)
    {
        refClkFreq = BSP_CLK_IPG_FREQ_ALT;
    }
    else
    {
        refClkFreq = BSP_CLK_IPG_FREQ;
    }

    // BAUD_RATE = 115200
    // RFFDIV set to /2 above
    // UART_REF_CLK = PERCLK / RFDIV
    // UBIR = (BAUD_RATE / 100) - 1
    // UBMR = (UART_REF_CLK / 1600) - 1    
    OUTREG32(&g_pUART->UBIR, (115200 / 100) - 1);
    OUTREG32(&g_pUART->UBMR, ((refClkFreq / 2) / 1600) - 1);

#elif (DEBUG_PORT == DBG_SC16C652_PORTA) || (DEBUG_PORT == DBG_SC16C652_PORTB)

    // Reset UART
    INSREG16BF(&g_pPBC->BCTRL1_SET, PBC_BCTRL1_SET_URST, 1);

#if DEBUG_PORT == DBG_SC16C652_PORTA
    g_pExtUART = (PBSP_SC16C652_REGS)OALPAtoUA(BSP_BASE_REG_PA_PBC_BASE +
                                               PBC_SC16C652_PORTA_OFFSET);
    OUTREG16(&g_pPBC->BCTRL1_SET,
        CSP_BITFVAL(PBC_BCTRL1_SET_URST, 0) |
        CSP_BITFVAL(PBC_BCTRL1_SET_UENA, 1));
#else
    g_pExtUART = (PBSP_SC16C652_REGS)OALPAtoUA(BSP_BASE_REG_PA_PBC_BASE +
                                               PBC_SC16C652_PORTB_OFFSET);
    OUTREG16(&g_pPBC->BCTRL1_SET,
        CSP_BITFVAL(PBC_BCTRL1_SET_URST, 0) |
        CSP_BITFVAL(PBC_BCTRL1_SET_UENB, 1));
#endif

    if (g_pExtUART == NULL)
    {
        return;
    }

    OUTREG8(&g_pExtUART->General.IER, 0x0);                 // Int Disabled

    OUTREG8(&g_pExtUART->General.LCR,                       
        CSP_BITFVAL(SC16C652_LCR_DIVISOR_LATCH_EN, SC16C652_ENABLE)); // DLAB = 1

    OUTREG8(&g_pExtUART->Special.DLL, 0x3);                 // Divisor LSB = 3
    OUTREG8(&g_pExtUART->Special.DLM, 0x0);                    // Divisor MSB =0
    
    OUTREG8(&g_pExtUART->General.LCR,
        CSP_BITFVAL(SC16C652_LCR_DIVISOR_LATCH_EN, SC16C652_DISABLE) |  // DLAB = 0
        CSP_BITFVAL(SC16C652_LCR_WORD_LEN, SC16C652_LCR_WORD_LEN_8) |   // Word Length 8 bits
        CSP_BITFVAL(SC16C652_LCR_STOP_BITS, SC16C652_LCR_STOP_BITS_1) | // 1 stop bit
        CSP_BITFVAL(SC16C652_LCR_SET_PARITY, SC16C652_DISABLE));        // No Parity

    OUTREG8(&g_pExtUART->General.MCR,
        CSP_BITFVAL(SC16C652_MCR_DTR, 1) |                      // DTR = 0
        CSP_BITFVAL(SC16C652_MCR_RTS, 1) |                      // RTS = 0
        CSP_BITFVAL(SC16C652_MCR_OP2_INT_EN, SC16C652_ENABLE)); // enable UART Interrupt

    OUTREG8(&g_pExtUART->General.FCR_ISR,
        CSP_BITFVAL(SC16C652_FCR_FIFO_EN, SC16C652_ENABLE) |    // TX/RX FIFOs enabled
        CSP_BITFVAL(SC16C652_FCR_RCVR_FIFO_RESET, 1) |          // Clear FIFOS
        CSP_BITFVAL(SC16C652_FCR_XMIT_FIFO_RESET, 1));          // Trigger Level =0
    
    OUTREG8(&g_pExtUART->General.IER,      
        CSP_BITFVAL(SC16C652_IER_RHR, SC16C652_ENABLE));        // Int Enabled
    
#endif

    // Configure default log settings
    OALLogSetZones(OALMASK(OAL_LOG_ERROR) | OALMASK(OAL_LOG_WARN) |
        OALMASK(OAL_LOG_INFO));

    g_PBCversion = EXTREG16BF(&g_pPBC->VERSION, PBC_VERSION_PBC);
    OALMSG(OAL_INFO, (_T("INFO:  PBC Version = 0x%x\r\n"), g_PBCversion));        

}


//------------------------------------------------------------------------------
//
//  Function: OEMWriteDebugByte
//
//  Transmits a character out the debug serial port.
//
VOID OEMWriteDebugByte(UINT8 ch) 
{
#if DEBUG_PORT == DBG_UART1

    // Wait until there is room in the FIFO
    while(INREG32(&g_pUART->UTS) & CSP_BITFMASK(UART_UTS_TXFULL));
    
    // Send the character
    OUTREG32(&g_pUART->UTXD, ch);

#elif (DEBUG_PORT == DBG_SC16C652_PORTA) || (DEBUG_PORT == DBG_SC16C652_PORTB)

    // Wait for THR is empty
    while(!(INREG8(&g_pExtUART->General.LSR) & CSP_BITFMASK(SC16C652_LSR_THR_EMPTY))); 

    // Send the character
    OUTREG8(&g_pExtUART->General.RHR_THR, ch);

#endif
}


//------------------------------------------------------------------------------
//
//  Function: OEMReadDebugByte
//
//  Reads a byte from the debug serial port. Does not wait for a character. 
//  If a character is not available function returns "OEM_DEBUG_READ_NODATA".
//

int OEMReadDebugByte() 
{
    int retVal = OEM_DEBUG_READ_NODATA;

#if DEBUG_PORT == DBG_UART1

    if (INREG32(&g_pUART->USR2) & CSP_BITFMASK(UART_USR2_RDR))
    {
        retVal = INREG32(&g_pUART->URXD) & 0xFF ;
    }

#elif (DEBUG_PORT == DBG_SC16C652_PORTA) || (DEBUG_PORT == DBG_SC16C652_PORTB)

    if (INREG8(&g_pExtUART->General.LSR) & 0x01)
    {
        retVal = INREG8(&g_pExtUART->General.RHR_THR) & 0xFF ;
    }

#endif

    return retVal;
}


/*
    @func   void | OEMWriteDebugLED | Writes specified pattern to debug LEDs 1-4.
    @rdesc  None.
    @comm    
    @xref   
*/
void OEMWriteDebugLED(UINT16 Index, DWORD Pattern)
{
}