nandfmd.h

Freescale ARM11系列CPU MX31的WINCE 5.0下的BSP

//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
//------------------------------------------------------------------------------
//
//  Copyright (C) 2004-2006, Freescale Semiconductor, Inc. All Rights Reserved.
//  THIS SOURCE CODE, AND ITS USE AND DISTRIBUTION, IS SUBJECT TO THE TERMS
//  AND CONDITIONS OF THE APPLICABLE LICENSE AGREEMENT
//
//------------------------------------------------------------------------------
//
//  File:  nandfmd.h
//
//  Contains definitions for FMD impletation of the SoC NAND flash controller 
//  and NAND memory device.
//
//------------------------------------------------------------------------------
#ifndef __NANDFMD_H__
#define __NANDFMD_H__

#define CMD_READID              0x90        // Read ID
#define CMD_READ                0x00        // Read data field
#define CMD_READ_2CYCLE         0x30        // Read data 2nd cycle
#define CMD_READ2               0x50        // Read spare field
#define CMD_RESET               0xFF        // Reset
#define CMD_ERASE               0x60        // Erase setup
#define CMD_ERASE2              0xD0        // Erase 
#define CMD_WRITE               0x80        // Sequential data input
#define CMD_WRITE2              0x10        // Program
#define CMD_STATUS              0x70        // Read status

#define NF_CMD(cmd)             { OUTREG16(&g_pNFC->NAND_FLASH_CMD, (cmd)); \
                                  OUTREG16(&g_pNFC->NAND_FLASH_CONFIG2, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG2_FCMD)); \
                                  NFCWait(TRUE); }

#define NF_ADDR(addr)           { OUTREG16(&g_pNFC->NAND_FLASH_ADD, (addr)); \
                                  OUTREG16(&g_pNFC->NAND_FLASH_CONFIG2, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG2_FADD)); \
                                  NFCWait(TRUE); }

#define NF_RD_PAGE()            { CLRREG16(&g_pNFC->NAND_FLASH_CONFIG1, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG1_SP_EN));  \
                                  OUTREG16(&g_pNFC->NAND_FLASH_CONFIG2, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG2_FDO_PAGE)); \
                                  NFCWait(FALSE); }

#define NF_RD_SPARE()           { SETREG16(&g_pNFC->NAND_FLASH_CONFIG1, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG1_SP_EN));  \
                                  OUTREG16(&g_pNFC->NAND_FLASH_CONFIG2, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG2_FDO_PAGE)); \
                                  NFCWait(TRUE); }

#define NF_WR_PAGE()            { CLRREG16(&g_pNFC->NAND_FLASH_CONFIG1, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG1_SP_EN));  \
                                  OUTREG16(&g_pNFC->NAND_FLASH_CONFIG2, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG2_FDI)); \
                                  NFCWait(FALSE); }

#define NF_WR_SPARE()           { SETREG16(&g_pNFC->NAND_FLASH_CONFIG1, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG1_SP_EN));  \
                                  OUTREG16(&g_pNFC->NAND_FLASH_CONFIG2, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG2_FDI)); \
                                  NFCWait(TRUE); }

#define NF_RD_ID()              { CLRREG16(&g_pNFC->NAND_FLASH_CONFIG1, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG1_SP_EN));  \
                                  OUTREG16(&g_pNFC->NAND_FLASH_CONFIG2, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG2_FDO_ID)); \
                                  NFCWait(TRUE); }

#define NF_RD_STATUS()          { CLRREG16(&g_pNFC->NAND_FLASH_CONFIG1, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG1_SP_EN));  \
                                  OUTREG16(&g_pNFC->NAND_FLASH_CONFIG2, CSP_BITFMASK(NANDFC_NAND_FLASH_CONFIG2_FDO_STATUS)); \
                                  NFCWait(TRUE); }

// Include NAND memory device definitions
#ifdef BSP_NAND_K9K1G08U0B
#include "K9K1G08U0B.h"
#endif

#ifdef BSP_NAND_K9F1G08U0A
#include "K9F1G08U0A.h" 
#endif


#endif    // __NANDFMD_H__