mb90350.asm

富士通单片机的iic源码 原创！ 精华

 .org 0x791C
__prle   .res.b 2             ;00791C
PRLE    .equ 0x791C
 .org 0x791C
__prlle   .res.b 1             ;00791C
PRLLE    .equ 0x791C
__prlhe   .res.b 1             ;00791D
PRLHE    .equ 0x791D
__prlf   .res.b 2             ;00791E
PRLF    .equ 0x791E
 .org 0x791E
__prllf   .res.b 1             ;00791E
PRLLF    .equ 0x791E
__prlhf   .res.b 1             ;00791F
PRLHF    .equ 0x791F
__ipcp0   .res.b 2             ;007920  /*  Input Capture */
IPCP0    .equ 0x7920
__ipcp1   .res.b 2             ;007922
IPCP1    .equ 0x7922
 .org 0x7928
__ipcp4   .res.b 2             ;007928
IPCP4    .equ 0x7928
__ipcp5   .res.b 2             ;00792A
IPCP5    .equ 0x792A
__ipcp6   .res.b 2             ;00792C
IPCP6    .equ 0x792C
__ipcp7   .res.b 2             ;00792E
IPCP7    .equ 0x792E
 .org 0x7938
__occp4   .res.b 2             ;007938  /*  Output Compare */
OCCP4    .equ 0x7938
__occp5   .res.b 2             ;00793A
OCCP5    .equ 0x793A
__occp6   .res.b 2             ;00793C
OCCP6    .equ 0x793C
__occp7   .res.b 2             ;00793E
OCCP7    .equ 0x793E
__tcdt0   .res.b 2             ;007940  /*  IO Timer  */
TCDT0    .equ 0x7940
__tccs0   .res.b 2             ;007942
TCCS0    .equ 0x7942
 .org 0x7942
__tccsl0   .res.b 1             ;007942
TCCSL0    .equ 0x7942
__tccsh0   .res.b 1             ;007943
TCCSH0    .equ 0x7943
__tcdt1   .res.b 2             ;007944
TCDT1    .equ 0x7944
__tccs1   .res.b 2             ;007946
TCCS1    .equ 0x7946
 .org 0x7946
__tccsl1   .res.b 1             ;007946
TCCSL1    .equ 0x7946
__tccsh1   .res.b 1             ;007947
TCCSH1    .equ 0x7947
__tmr0   .res.b 2             ;007948  /* Timer Reload Register */
TMR0    .equ 0x7948
 .org 0x7948
__tmrlr0   .res.b 2             ;007948
TMRLR0    .equ 0x7948
__tmr1   .res.b 2             ;00794A
TMR1    .equ 0x794A
 .org 0x794A
__tmrlr1   .res.b 2             ;00794A
TMRLR1    .equ 0x794A
__tmr2   .res.b 2             ;00794C
TMR2    .equ 0x794C
 .org 0x794C
__tmrlr2   .res.b 2             ;00794C
TMRLR2    .equ 0x794C
__tmr3   .res.b 2             ;00794E
TMR3    .equ 0x794E
 .org 0x794E
__tmrlr3   .res.b 2             ;00794E
TMRLR3    .equ 0x794E
__smr3   .res.b 1             ;007950  /*  UART3 */
SMR3    .equ 0x7950
__scr3   .res.b 1             ;007951
SCR3    .equ 0x7951
__rdr3   .res.b 1             ;007952
RDR3    .equ 0x7952
 .org 0x7952
__tdr3   .res.b 1             ;007952
TDR3    .equ 0x7952
__ssr3   .res.b 1             ;007953
SSR3    .equ 0x7953
__eccr3   .res.b 1             ;007954
ECCR3    .equ 0x7954
__escr3   .res.b 1             ;007955
ESCR3    .equ 0x7955
__bgr3   .res.b 2             ;007956
BGR3    .equ 0x7956
 .org 0x7956
__bgr30   .res.b 1             ;007956
BGR30    .equ 0x7956
__bgr31   .res.b 1             ;007957
BGR31    .equ 0x7957
 .org 0x7960
__csvcr   .res.b 1             ;007960  /*  Clock Monitor */
CSVCR    .equ 0x7960
 .org 0x796C
__clkr   .res.b 1             ;00796C
CLKR    .equ 0x796C
 .org 0x796E
__cdmr   .res.b 1             ;00796E  /*  CAN Direct Mode */
CDMR    .equ 0x796E
__canswr   .res.b 1             ;00796F
CANSWR    .equ 0x796F
__ibsr0   .res.b 1             ;007970  /*  IIC Interface 0 */
IBSR0    .equ 0x7970
__ibcr0   .res.b 1             ;007971
IBCR0    .equ 0x7971
__itba0   .res.b 2             ;007972
ITBA0    .equ 0x7972
 .org 0x7972
__itbal0   .res.b 1             ;007972
ITBAL0    .equ 0x7972
__itbah0   .res.b 1             ;007973
ITBAH0    .equ 0x7973
__itmk0   .res.b 2             ;007974
ITMK0    .equ 0x7974
 .org 0x7974
__itmkl0   .res.b 1             ;007974
ITMKL0    .equ 0x7974
__itmkh0   .res.b 1             ;007975
ITMKH0    .equ 0x7975
__isba0   .res.b 1             ;007976
ISBA0    .equ 0x7976
__ismk0   .res.b 1             ;007977
ISMK0    .equ 0x7977
__idar0   .res.b 1             ;007978
IDAR0    .equ 0x7978
 .org 0x797B
__iccr0   .res.b 1             ;00797B
ICCR0    .equ 0x797B
 .org 0x79C2
__cmcr   .res.b 1             ;0079C2  /* Clock Modulator Control Register */
CMCR    .equ 0x79C2
 .org 0x79A2
__fwr   .res.b 2             ;0079A2  /* Flash Write  */
FWR    .equ 0x79A2
 .org 0x79A2
__fwr0   .res.b 1             ;0079A2
FWR0    .equ 0x79A2
__fwr1   .res.b 1             ;0079A3
FWR1    .equ 0x79A3
__ssr0   .res.b 1             ;0079A4
SSR0    .equ 0x79A4
 .org 0x79E0
__padr0_l   .res.b 1             ;0079E0  /* ROM CORRECTION */
PADR0_L    .equ 0x79E0
__padr0_m   .res.b 1             ;0079E1
PADR0_M    .equ 0x79E1
__padr0_h   .res.b 1             ;0079E2
PADR0_H    .equ 0x79E2
__padr1_l   .res.b 1             ;0079E3
PADR1_L    .equ 0x79E3
__padr1_m   .res.b 1             ;0079E4
PADR1_M    .equ 0x79E4
__padr1_h   .res.b 1             ;0079E5
PADR1_H    .equ 0x79E5
__padr2_l   .res.b 1             ;0079E6
PADR2_L    .equ 0x79E6
__padr2_m   .res.b 1             ;0079E7
PADR2_M    .equ 0x79E7
__padr2_h   .res.b 1             ;0079E8
PADR2_H    .equ 0x79E8
 .org 0x79F0
__padr3_l   .res.b 1             ;0079F0
PADR3_L    .equ 0x79F0
__padr3_m   .res.b 1             ;0079F1
PADR3_M    .equ 0x79F1
__padr3_h   .res.b 1             ;0079F2
PADR3_H    .equ 0x79F2
__padr4_l   .res.b 1             ;0079F3
PADR4_L    .equ 0x79F3
__padr4_m   .res.b 1             ;0079F4
PADR4_M    .equ 0x79F4
__padr4_h   .res.b 1             ;0079F5
PADR4_H    .equ 0x79F5
__padr5_l   .res.b 1             ;0079F6
PADR5_L    .equ 0x79F6
__padr5_m   .res.b 1             ;0079F7
PADR5_M    .equ 0x79F7
__padr5_h   .res.b 1             ;0079F8
PADR5_H    .equ 0x79F8
 .org 0x7C00
__canm1   .res.b 0x40          ;007C00  /*  CAN message buffer 1 */
CANM1    .equ 0x7C00
___dmyc3   .res.b 0x40          ;007C40
_DMYC3    .equ 0x7C40
___dmyc4   .res.b 0x40          ;007C80
_DMYC4    .equ 0x7C80
___dmyc5   .res.b 0x40          ;007CC0
_DMYC5    .equ 0x7CC0
__canh1   .res.b 0x1C          ;007D00  /* Status and control register, higher part */
CANH1    .equ 0x7D00
 .org 0x7FFF
___endio   .res.b 1             ;007FFF
_ENDIO    .equ 0x7FFF
; /* include : security.asm */

#ifdef SECURITY_FEATURE
  #if SECURITY_FEATURE == 1
    ; if Security feature is available,
    ; check for possible security address (64KB, 128KB, 256KB, 384KB or 512 KB device)
    
    #if SECURITY_ADDRESS == 0xFF0000  \
     || SECURITY_ADDRESS == 0xFE0000  \
     || SECURITY_ADDRESS == 0xFC0000  \
     || SECURITY_ADDRESS == 0xF90000  \
     || SECURITY_ADDRESS == 0xF80000  
	
      #ifdef SECURITY_ENABLE
        #if SECURITY_ENABLE == 0
          .section SECURITY, locate = SECURITY_ADDRESS
	      .DATA.W 0xFF55 ; Security DISABLED
        #elif SECURITY_ENABLE == 1
	      .section SECURITY, locate = SECURITY_ADDRESS
	      .DATA.W 0x01FF ; Security ENABLED
        #else     ; see description below
           #error "Invalid value of SECURITY_ENABLE" ; see description below
        #endif
      #else       ; see description below
           #error "SECURITY_ENABLE not defined"
      #endif

    #else    ; see description below
      #error "Invalid value of SECURITY_ADDRESS" 
    #endif

  #elif SECURITY_FEATURE != 0 ; see description below
    #error "Invalid value of SECURITY_FEATURE"
  #endif 

#else    ; see description below
  #error "SECURITY_FEATURE not defined"
#endif  

; HOW TO HANDLE THE SECURITY-FEAUTURE ?
;
; Security-Feature means that the contents of the (Flash-)ROM
; can be prevent from (unauthorized) read-out.
; Devices of microcontroller-families with Security-Feature
; require three manual definitions within SWB-menu "SetProject->Assembler->DefineMacro" : 
;
; SECURITY_FEATURE 0 => NO  1 => YES  <<< Does the device support the Security-Feature ? 
;
; SECURITY_ADDRESS 0x??0000           <<< Define Security Address
;                                         0xFF0000 for  64KB device 
;                                         0xFE0000 for 128KB device 
;                                         0xFC0000 for 256KB device 
;                                         0xF90000 for 384KB device 
;                                         0xF80000 for 512KB device 
;
; SECURITY_ENABLE  0 => NO  1 => YES  <<< Enable / Disable Security Feature
;
; The Security-Feature is ENABLED 
; if 
;     the device supports the Security-Feature generally
; and the define SECURITY_FEATURE is set to 1
; and the correct SECURITY_ADDRESS is defined
; and the Security-mechanism is enabled by SECURITY_ENABLE set to 1
;
;
; HOW DOES THE SECURITY-FEATURE WORK ? 
;
; In case that a device supports the Security-Feature
; the lower two bytes of the (Flash-)ROM are reserved 
; for controlling the security mechanism.
; If the first two bytes are set 0x01FF, the Security-Feature is enabled. 
; If the first two bytes are set 0xFF55, the Security-Feature is disabled
; If the Security-Feauture is enabled the (Flash-)ROM can not be read-out anymore. 
;
; NOTE:
; If a device does not support the Security-Feature
; then set SECURITY_FEATURE 0
; The setting for SECURITY_ADDRESS and SECURITY_ENABLE becomes invalid.
;


 .end