📄 mb90350.lst
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*/
123 /* - "extern" declaration changed to predef
ined macros of */
124 /* IO-Wizard, requires IO-Wizard 1.7 or l
ater */
125 /* - DRT1_LWPTR changed to DTR1_DWPTR macro
*/
126 /* Version: 2.0 28.05.01 HLO
*/
127 /* - LX-version adopted to FR
*/
128 /* - __IO_EXTENDED changed to __IO_EXTERN,
CAN is on external bus */
129 /* Version: 2.1 08.06.01 HLO
*/
130 /* - macro for short type in DTR added
*/
131 /* Version: 2.2 11.06.01 MEN
*/
132 /* - DLC changed to IO_WORD
*/
133 /* Version: 3.0 05.08.02 DF
*/
134 /* - removed CAN1
*/
135 /* Version: 3.1 23.08.02 DF
*/
136 /* - DTR_LWPTR and DTR_DWPTR for compatibil
ity */
137 /* Version: 4.0 23.08.02 HLO
*/
_____________________________________________________________________________
F2MC-16 Family SOFTUNE Assembler V30L11 2008-01-06 16:22:08 Page: 7
MB90350
SN LOC OBJ LLINE SOURCE
138 /* - changed to batch generation
*/
139 /* Id: canmac1.h,v 1.1 2004/04/01 07:32:55 dfisc
h Exp */
140 /* - CVS and make controlled
*/
141 /* ---------------------------------------------
------------------------- */
142 /* Id: security.asm,v 1.1 2003/08/19 10:25:24 df
isch Exp */
143 /* ---------------------------------------------
------------------------- */
144 /* Id: security.asm,v 1.1 2003/08/19 10:25:24 df
isch Exp */
145 /* - initial
*/
MODULE NAME = MB90350 146 .PROGRAM MB90350
147 .TITLE MB90350
148
149 ;------------------------
150 ; IO-AREA DEFINITIONS :
151 ;------------------------
152
153
154
IO 000000 ----------<IOBASE>----------- 155 .section IOBASE, IO, locate=0x0000 ; /* PORT
DATA */
156 .GLOBAL __pdr0, __pdr1, __pdr2, __p
dr3, __pdr4, __pdr5
157 .GLOBAL __pdr6, __ader5, __ader6, __i
lsr, __ilsr0, __ilsr1
158 .GLOBAL __ddr0, __ddr1, __ddr2, __d
dr3, __ddr4, __ddr5
159 .GLOBAL __ddr6, __ddra, __pucr0, __p
ucr1, __pucr2, __pucr3
160 .GLOBAL __ppgc45, __ppgc4, __ppgc5, __p
pgcs45, __pacsr1, __ppgc67
161 .GLOBAL __ppgc6, __ppgc7, __ppgcs67, __p
pgc89, __ppgc8, __ppgc9
162 .GLOBAL __ppgcs89, __ppgcab, __ppgca, __p
pgcb, __ppgcsab, __ppgccd
163 .GLOBAL __ppgcc, __ppgcd, __ppgcscd, __p
pgcef, __ppgce, __ppgcf
164 .GLOBAL __ppgcsef, __ics01, __ice01, __i
cs45, __ice45, __ics67
165 .GLOBAL __ice67, __ocs45, __ocs4, __o
cs5, __ocs67, __ocs6
166 .GLOBAL __ocs7, __tmcsr0, __tmcsr1, __t
mcsr2, __tmcsr3, __adcs
167 .GLOBAL __adcs0, __adcs1, __adcr, __a
dcr0, __adcr1, __adsr
168 .GLOBAL __romm, __canl1, __dcsr, __d
sr, __dsrl, __dsrh
169 .GLOBAL __pacsr0, __dirr, __lpmcr, __c
_____________________________________________________________________________
F2MC-16 Family SOFTUNE Assembler V30L11 2008-01-06 16:22:08 Page: 8
MB90350
SN LOC OBJ LLINE SOURCE
kscr, __dssr, __dssr1
170 .GLOBAL __dssr0, __arsr, __hacr, __e
csr, __wdtc, __tbtc
171 .GLOBAL __wtc, __der, __derl, __d
erh, __fmcs, __icr
172 .GLOBAL __enir1, __eirr1, __elvr1, __e
issr, __psccr, __bapl
173 .GLOBAL __bapm, __baph, __dmacs, __i
oa, __ioal, __ioah
174 .GLOBAL __dct, __dctl, __dcth, __s
mr2, __scr2, __rdr2
175 .GLOBAL __tdr2, __ssr2, __eccr2, __e
scr2, __bgr2, __bgr20
176 .GLOBAL __bgr21
177
IO 000000 [1]B 178 __pdr0 .res.b 1 ;000000 /* PORT
DATA */
= 00000000 179 PDR0 .equ 0x0000
IO 000001 [1]B 180 __pdr1 .res.b 1 ;000001
= 00000001 181 PDR1 .equ 0x0001
IO 000002 [1]B 182 __pdr2 .res.b 1 ;000002
= 00000002 183 PDR2 .equ 0x0002
IO 000003 [1]B 184 __pdr3 .res.b 1 ;000003
= 00000003 185 PDR3 .equ 0x0003
IO 000004 [1]B 186 __pdr4 .res.b 1 ;000004
= 00000004 187 PDR4 .equ 0x0004
IO 000005 [1]B 188 __pdr5 .res.b 1 ;000005
= 00000005 189 PDR5 .equ 0x0005
IO 000006 [1]B 190 __pdr6 .res.b 1 ;000006
= 00000006 191 PDR6 .equ 0x0006
IO 00000B 192 .org 0x000B
IO 00000B [1]B 193 __ader5 .res.b 1 ;00000B
= 0000000B 194 ADER5 .equ 0x000B
IO 00000C [1]B 195 __ader6 .res.b 1 ;00000C
= 0000000C 196 ADER6 .equ 0x000C
IO 00000E 197 .org 0x000E
IO 00000E [2]B 198 __ilsr .res.b 2 ;00000E
= 0000000E 199 ILSR .equ 0x000E
IO 00000E 200 .org 0x000E
IO 00000E [1]B 201 __ilsr0 .res.b 1 ;00000E
= 0000000E 202 ILSR0 .equ 0x000E
IO 00000F [1]B 203 __ilsr1 .res.b 1 ;00000F
= 0000000F 204 ILSR1 .equ 0x000F
IO 000010 [1]B 205 __ddr0 .res.b 1 ;000010 /* PORT
DIRECTION */
= 00000010 206 DDR0 .equ 0x0010
IO 000011 [1]B 207 __ddr1 .res.b 1 ;000011
= 00000011 208 DDR1 .equ 0x0011
IO 000012 [1]B 209 __ddr2 .res.b 1 ;000012
= 00000012 210 DDR2 .equ 0x0012
IO 000013 [1]B 211 __ddr3 .res.b 1 ;000013
= 00000013 212 DDR3 .equ 0x0013
IO 000014 [1]B 213 __ddr4 .res.b 1 ;000014
= 00000014 214 DDR4 .equ 0x0014
_____________________________________________________________________________
F2MC-16 Family SOFTUNE Assembler V30L11 2008-01-06 16:22:08 Page: 9
MB90350
SN LOC OBJ LLINE SOURCE
IO 000015 [1]B 215 __ddr5 .res.b 1 ;000015
= 00000015 216 DDR5 .equ 0x0015
IO 000016 [1]B 217 __ddr6 .res.b 1 ;000016
= 00000016 218 DDR6 .equ 0x0016
IO 00001A 219 .org 0x001A
IO 00001A [1]B 220 __ddra .res.b 1 ;00001A
= 0000001A 221 DDRA .equ 0x001A
IO 00001C 222 .org 0x001C
IO 00001C [1]B 223 __pucr0 .res.b 1 ;00001C /* PULL
-UP CONTROL */
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