syslib.c

Embedded Planet公司的ep8260单板计算机的BSP包（VxWorks）

*
* This function returns a pointer to a bsp version with the revision.
* for eg. 1.0/<x>. BSP_REV defined in config.h is concatanated to
* BSP_VERSION and returned.
*
* RETURNS: A pointer to the BSP version/revision string.
*/

char * sysBspRev (void)
    {
    return (BSP_VERSION BSP_REV);
    }

/******************************************************************************
*
* sysHwInit - initialize the system hardware
*
* This routine initializes various feature of the Embedded Planet boards. It sets up
* the control registers, initializes various devices if they are present.
*
* NOTE: This routine should not be called directly by the user.
*
* RETURNS: N/A
*/

void sysHwInit (void)
    {
    int ix;
    unsigned long *pDPRAM1;
    unsigned int	tmp,ptr;

    /* Get the physical location of the IMMR register */
    int	immrVal = vxImmrGet();

#if 0
	memcpy(rpxBootParams,(void*)pCoreParams,sizeof(pCoreParams));
#else
        /*
         * First we need to retrieve the absolute address of the PlanetCore boot
         * parameter structure, that was saved upon entry either by romInit() or
         * sysInit() (depending on ROM or RAM boot).
        */
	ptr = *(unsigned int *)(0x00003000);
	memcpy(rpxBootParams,(void*)ptr,sizeof(rpxBootParams));
#endif

    /* Issue a Software Reset Command to the CPM core */
    sysCpmReset();

    /* Initialize DPRAM1 to zero.  */
    pDPRAM1 = (unsigned long *)immrVal;

    for (ix = 0; ix < 0x1000; ix++)
      *pDPRAM1++ = 0;

    /*  reset port A, B, C, and D */
    *M8260_IOP_PAPAR( immrVal ) = 0x00000000;
    *M8260_IOP_PADIR( immrVal ) = 0x00000000;
    *M8260_IOP_PAODR( immrVal ) = 0x00000000;

    *M8260_IOP_PBPAR( immrVal ) = 0x00000000;
    *M8260_IOP_PBDIR( immrVal ) = 0x00000000;
    *M8260_IOP_PBODR( immrVal ) = 0x00000000;

    *M8260_IOP_PCPAR( immrVal ) = 0x00000000;
    *M8260_IOP_PCDIR( immrVal ) = 0x00000000;
    *M8260_IOP_PCSO ( immrVal ) = 0x00000000;

    *M8260_IOP_PDPAR( immrVal ) = 0x00000000;
    *M8260_IOP_PDDIR( immrVal ) = 0x00000000;
    *M8260_IOP_PDSO ( immrVal ) = 0x00000000;

    /*
     * Initialize SICR.
     */
    *M8260_SICR( immrVal ) = 0x00000000;

    /*
     * Init the DPRAM allocation lib
     */
    sys82xxDpramLibInit();

    rpxToVxBootParams(rpxBootParams);

    
    sysI2CInit();

    /*
     * Dynamically update the mmu table based on the Planet Core parameter
     * for NV Ram size. Also if this is the first boot, set up a default boot
     * line for use by vxWorks. This allows the user to update the host IP/name
     * which is currently not passed via the DPRAM after Planet Core boots the
     * kernel image.
     * If NVRAM exists, copy the contents of NVRAM to sysBootLine (0x4200).
     */
    /*BootlineConfig();*/
    sysNvRamSetup();

    /*
      * If mmu tables are used, this is where we dynamically
      * update the entry describing main memory, using sysPhysMemTop().
      * We must call sysPhysMemTop () at sysHwInit() time to do
      * the memory autosizing based on the information from PlanetCore.
      * We also adjust the DBAT descriptor which maps local bus mem.
      */

    sysPhysMemTop();

	switch(sysLocalBusMemSize){
		case 128*1024:
			tmp = _MMU_UBAT_BL_128K;
			break;
		case 256*1024:
			tmp = _MMU_UBAT_BL_256K;
			break;
		case 512*1024:
			tmp = _MMU_UBAT_BL_512K;
			break;
		case 1*1024*1024:
			tmp = _MMU_UBAT_BL_1M;
			break;
		case 2*1024*1024:
			tmp = _MMU_UBAT_BL_2M;
			break;
		case 4*1024*1024:
			tmp = _MMU_UBAT_BL_4M;
			break;
		case 8*1024*1024:
			tmp = _MMU_UBAT_BL_8M;
			break;
		case 32*1024*1024:
			tmp = _MMU_UBAT_BL_32M;
			break;
		case 64*1024*1024:
			tmp = _MMU_UBAT_BL_64M;
			break;
		case 128*1024*1024:
			tmp = _MMU_UBAT_BL_128M;
			break;
		case 256*1024*1024:
			tmp = _MMU_UBAT_BL_256M;
			break;
		case 16*1024*1024:
		default:
			tmp = _MMU_UBAT_BL_16M;
			break;
	}
	sysBatDesc[LOCAL_BUS_DBAT_DESC_NUM] &= ~ _MMU_UBAT_BL_MASK;
	sysBatDesc[LOCAL_BUS_DBAT_DESC_NUM] |= tmp;

    /*
     * Initialize interrupts - default interrupt level.
     */
    m8260IntrInit() ;

#ifdef SILICON_REV_PREA1
    if (sysChipRev() == SILICON_REV_PREA1)
       {
	UINT32 temp;

         temp = *M8260_SIUMCR( immrVal );
         temp &= 0xf3ffffff;    /* First clear DPPC ...   */
         temp |= 0x08000000;    /* ... then enable TBEN. */
         *M8260_SIUMCR( immrVal ) = temp;
       }
#endif /* SILICON_REV_PREA1 */



    /*
     * Setup port D for SMC1.
     */
    *M8260_IOP_PDPAR( immrVal ) |= (PD8 | PD9);
    *M8260_IOP_PDDIR( immrVal ) |=  PD9;

#if 0
    /*
     * Setup port A for SMC2.
     */
    *M8260_IOP_PAPAR( immrVal ) |= (PA8 | PA9);
    *M8260_IOP_PADIR( immrVal ) |=  PA9;
#endif

    /*
     * Reset serial channels.
     */
    *BCSR1 |= BCSR1_SMC_SEL1;	/* enable SMC1 */
    sysSerialHwInit();

    /*
     * Chuck (PTR Group) Added:
     */

    /*
     * Setup port A 27 and 28 as general purpose outputs on SBC1 to
     * control the PHY.
     */
    if (ptrGetBoardID() == 0) /* SBC1 */
    {
      *M8260_IOP_PAPAR( immrVal ) &= ~(PA27 | PA28);
      *M8260_IOP_PADIR( immrVal ) |=  (PA27 | PA28);
      *M8260_IOP_PAODR( immrVal ) &= ~(PA27 | PA28);

      /* PHY MDC signal for SBC1, 2nd PHY on Axcelis board. */
      *M8260_IOP_PCPAR( immrVal ) &= ~(PC10);
      *M8260_IOP_PCDIR( immrVal ) |=  (PC10);
      *M8260_IOP_PCODR( immrVal ) &= ~(PC10);

      /* PHY MDIO signal for SBC1, 2nd PHY on Axcelis board. */
      *M8260_IOP_PCPAR( immrVal ) &= ~(PC9);
      /* ...not setting PCDIR register here since pin is bidirectional.     */
      /* ...will set PCDIR register before each read and write of this pin. */
      *M8260_IOP_PCODR( immrVal ) &= ~(PC9);
    }

    ptrEnable66MHzClkOut();  /* Enable clock out of high-density connector. */
    ptrPA28Clear();          /* SBC3/SBC4: take octarts out of reset state. */
                             /* SBC1: take 2nd PHY out of powerdown state.  */
    ptrOR3Set(0xFFF00054);   /* Enable Chip Select 3 to control octart0.    */
    ptrBR3Set(0xE0000801);
    ptrOR5Set(0xFFF00054);   /* Enable Chip Select 5 to control octart1.    */
    ptrBR5Set(0xE0100801);

    /*
     * Chuck (PTR Group) configure PC12 and PC13 interrupts from the two
     * SC28L198 octarts.
     *
     * NOTE that pins PC12 and PC13 are already programmed above to be
     * general purpose inputs.
     */
    *M8260_SIEXR( immrVal ) |= 0x000c0000;  /* Falling edge on PC12 and PC13 */
                                            /*  generate interrupts */
    *M8260_SIPNR_H( immrVal ) = 0x000c0000; /* Clear any pending interrupts */
    *M8260_SIMR_H( immrVal ) |= 0x000c0000; /* Unmask interrupts from PC12 */
                                            /*  and PC13 */

    /*
     * Chuck (PTR Group) Added block ends here.
     */

#ifdef INCLUDE_NETWORK
    sysNetHwInit ();
#endif /* INCLUDE_NETWORK */

    }


/*******************************************************************************
* PTR Group utility routines.
*/
int ptrPA28Set(void)
{
  /* Get the physical location of the IMMR register */
  int	immrVal = vxImmrGet();

  *M8260_IOP_PAPAR( immrVal ) &= ~(PA28);
  *M8260_IOP_PADIR( immrVal ) |= (PA28);
  *M8260_IOP_PAODR( immrVal ) &= ~(PA28);
  *M8260_IOP_PADAT( immrVal ) |= (PA28);
  return 0;
}

int ptrPA28Clear(void)
{
  /* Get the physical location of the IMMR register */
  int	immrVal = vxImmrGet();

  *M8260_IOP_PAPAR( immrVal ) &= ~(PA28);
  *M8260_IOP_PADIR( immrVal ) |= (PA28);
  *M8260_IOP_PAODR( immrVal ) &= ~(PA28);
  *M8260_IOP_PADAT( immrVal ) &= ~(PA28);
  return 0;
}

int ptrDisableSMCXcvrs(void)
{
  *BCSR1 &= ~(BCSR1_SMC_SEL0 | BCSR1_SMC_SEL1);
  return 0;
}

int ptrEnable66MHzClkOut(void)
{
  *BCSR3 |= (0x10); /* ENCLKHDR */
  return 0;
}

int ptrDisable66MHzClkOut(void)
{
  *BCSR3 &= ~(0x10); /* ENCLKHDR */
  return 0;
}

int ptrGetBoardID(void)
{
  /* Get the physical location of the IMMR register */
  int	immrVal = vxImmrGet();
  int   temp;
  int   boardId;

  *M8260_IOP_PAPAR( immrVal ) &= ~(PA29 | PA30);
  *M8260_IOP_PAODR( immrVal ) &= ~(PA29 | PA30);
  *M8260_IOP_PADIR( immrVal ) &= ~(PA29 | PA30);

  temp = *M8260_IOP_PADAT( immrVal );

  temp = (temp & (PA29 | PA30)) >> 1;

  /* Switch bits */
  boardId  = (temp >> 1) | ((temp & 1) << 1);

  return boardId;
}

#define	M8260_MEMC_BR3(base)	((VINT32 *) ((base) + 0x010118))
#define	M8260_MEMC_OR3(base)	((VINT32 *) ((base) + 0x01011C))
#define	M8260_MEMC_BR5(base)	((VINT32 *) ((base) + 0x010128))
#define	M8260_MEMC_OR5(base)	((VINT32 *) ((base) + 0x01012C))

int ptrBR3Set(unsigned int x)
{
  /* Get the physical location of the IMMR register */
  int	immrVal = vxImmrGet();
  *M8260_MEMC_BR3( immrVal ) = x;
  return 0;
}

int ptrOR3Set(unsigned int x)
{
  /* Get the physical location of the IMMR register */
  int	immrVal = vxImmrGet();
  *M8260_MEMC_OR3( immrVal ) = x;
  return 0;
}

int ptrBR5Set(unsigned int x)
{
  /* Get the physical location of the IMMR register */
  int	immrVal = vxImmrGet();
  *M8260_MEMC_BR5( immrVal ) = x;
  return 0;
}

int ptrOR5Set(unsigned int x)
{
  /* Get the physical location of the IMMR register */
  int	immrVal = vxImmrGet();
  *M8260_MEMC_OR5( immrVal ) = x;
  return 0;
}


/*******************************************************************************
*
* sysPhysMemTop - get the address of the top of physical memory
*
* This routine returns the address of the first missing byte of memory,
* which indicates the top of memory. Upon initial call, the MMU table is also
* updated based on the information provided by PlanetCore.
*
* RETURNS: The address of the top of physical memory.
*
* SEE ALSO: sysMemTop()
*/

char * sysPhysMemTop (void)
{
static char *physTop = NULL;

    if(physTop == NULL){
	/* Adjust initial SDRAM size to actual physical memory.
	   Account for the RAM used by the zeroth descriptor.
	*/
	sysPhysMemDesc[1].len = (sysMemSize - RAM_LOW_ADRS);
	physTop = (char *)sysMemSize;
    }
    return physTop;
}

/*******************************************************************************
*
* sysMemTop - get the address of the top of VxWorks memory
*
* This routine returns a pointer to the first byte of memory not
* controlled or used by VxWorks.
*
* The user can reserve memory space by defining the macro USER_RESERVED_MEM
* in config.h.  This routine returns the address of the reserved memory
* area.  The value of USER_RESERVED_MEM is in bytes.
*
* RETURNS: The address of the top of VxWorks memory.
*/

char * sysMemTop (void)
    {
    static char * memTop = NULL;

    if (memTop == NULL)
	{
	memTop = sysPhysMemTop () - USER_RESERVED_MEM;
	}

    return memTop;
    }