sysalib.s

Embedded Planet公司的ep8260单板计算机的BSP包（VxWorks）

/* sysALib.s - Embedded Planet RPX Board system-dependent assembly routines */

/* Copyright 1984-2000 Wind River Systems, Inc. */
        .data
	.globl	copyright_wind_river
	.long	copyright_wind_river

/*
modification history
--------------------
01h,21dec00,lmk  added save of Planet Core boot params pointer
01g,23jun00,cmh  modified from ADS860 BSP for RPX Boards
01f,26jan99,cn   added support for SDRAM (SPR# 24337). 
01e,09nov98,cn   added support for FADS860T boards.
01d,12jan98,dat  SPR 20104, correct use of HI and HIADJ macros
01c,04nov96,tpr  clean up + fix SPR # 7173.
01b,24may96,tpr  added MMU initialization.
01a,19apr96,tpr  written.
*/

/*
DESCRIPTION
This module contains system-dependent routines written in assembly
language.

This module must be the first specified in the \f3ld\f1 command used to
build the system.  The sysInit() routine is the system start-up code.
*/

#define _ASMLANGUAGE
/* includes */
#include "vxWorks.h"
#include "asm.h"
#include "cacheLib.h"
#include "arch/ppc/cachePpcLib.h"
#include "config.h"
#include "regs.h"	
#include "sysLib.h"

	/* globals */

	.globl	_sysInit		/* start of system code */
	.globl  sysMsrGet       /* get the value of the MSR register */
	.globl  sysPCGet        /* get the value of the PC register */
	.globl  sysClearBATs
	.globl  sysClearSegs
	.globl  sysClearFPRegs
	.globl  sysInvalidateTLBs
	.globl  sysInByte
	.globl  sysOutByte
   	.globl  sysInWord
	.globl  sysInWordRev
   	.globl  sysOutWord
   	.globl  sysInLong
   	.globl  sysOutLong
	.globl  sysDecGet
	.globl  sysDelay
        .globl  immrGet

	/* externals */

	.extern rpxBootParams	/* defined in sysLib.c */
	.extern usrInit
	
	.text

/*******************************************************************************
*
* sysInit - start after boot
*
* This is the system start-up entry point for VxWorks in RAM, the
* first code executed after booting.  The location of the Planet Core boot
* parameters is saved so a vxWorks compatible boot line may be constructed
* using these stored parameters. It then disables interrupts, sets up
* the stack, and jumps to the C routine usrInit() in usrConfig.c.
*
* The initial stack is set to grow down from the address of sysInit().  This
* stack is used only by usrInit() and is never used again.  Memory for the
* stack must be accounted for when determining the system load address.
*
* NOTE: This routine should not be called by the user.
*
* RETURNS: N/A

* sysInit (void)              /@ THIS IS NOT A CALLABLE ROUTINE @/

*/
_sysInit:

	/*
	 * After exiting the Planet Core boot loader, r3 contains the location in DPRAM where
	 * the boot loader has saved the boot parameters for use in building the vxWorks boot
	 * line.  We store this just below at the address 0x3000 very briefly until it can be picked
	 * up by sysHwInit().
	 */

	lis     	r6, HIADJ(0x00003000)
	addi    	r6, r6, LO(0x00003000)
	stw		r3, 0(r6)

    /* disable external interrupts (by zeroing out msr) */
	xor	r5,r5,r5
	isync  
	mtmsr	r5
	isync  

    /* invalidate and disable the MPU's data/instruction caches */
	mfspr	r6,HID0
	ori	r5,r5,0xC000
	andc	r6,r6,r5	/* clear cache enable bits in r6 */
	mr	r5,r6
	ori	r5,r5,0xCC00	/* r5 has DCE,ICE,ICFI,DCFI set */
	sync
	mtspr	HID0,r5		/* invalidate both caches with 2 stores */
	mtspr	HID0,r6		/* leaving them both disabled */
	isync

	mtspr   SPRG0,r3	/* save r3 and r4 -- might be vware pointers */
	mtspr   SPRG1,r4
	bl	sysClearBATs
	bl	sysInvalidateTLBs
	bl	sysClearSegs
	bl	sysClearFPRegs
	mfspr   r3,SPRG0
	mfspr   r4,SPRG1

        xor	r0,r0,r0	/* Zero-out registers: r0 & SPRGs */
	mtspr	SPRG0,r0
	mtspr	SPRG1,r0
	mtspr	SPRG2,r0
	mtspr	SPRG3,r0

	/* MSR: clear DCE,ICE,EE,DR,IR -- set ME,RI	*/
	ori	r4,r0,0x3002
	mtmsr   r4
	sync 

	/* fake a Decrementer Exception Handler (i.e. rfi @ 0x900) */
	lis 	r3,HI(0x4C000064)
	ori	r3,r3,LO(0x4C000064)	/* load rfi (0x4c000064) to */
	stw 	r3,0x900(r0)		/* store rfi at 0x00000900 */

	/* TODO -- (maybe) reset/clear/init some of the BCSRs */
	/* disable all devices (serial, ethernet, ...) why ? */
#if 0
	lis	r4, HIADJ(BCSR_RESET_VAL)
	lis	r5, HIADJ (BCSR)
	stw	r4, LO(BCSR)(r5)	/* reset the BCSR register */
#endif

	/* initialize the stack pointer */
	lis	sp, HIADJ( RAM_LOW_ADRS)
	addi	sp, sp, LO(RAM_LOW_ADRS)

	/* set the default boot code */
	lis	r3, HIADJ( BOOT_WARM_AUTOBOOT)
	addi	r3, r3, LO(BOOT_WARM_AUTOBOOT)

	/* jump to usrInit */
	addi	sp, sp, -FRAMEBASESZ	/* get frame stack */
	b	usrInit			/* never returns - starts up kernel */

#ifdef INCLUDE_CACHE_SUPPORT
#include "sysCacheLockALib.s"
#endif /* INCLUDE_CACHE_SUPPORT */

/******************************************************************************
*
* sysMsrGet - Get the value of the MSR (Machine State Register)
*
* This routine returns the value of the MSR.
*
* RETURNS: the Machine State Register (MSR) value.

* UINT32 sysMsrGet
*     (
*     )

*/

sysMsrGet:
        mfmsr   p0
        blr

/******************************************************************************
*
* sysPCGet - Get the value of the PC (Program Counter)
*
* This routine returns the value of the PC.
*
* RETURNS: the Program Counter Register (PC) value.

* UINT32 sysPCGet
*     (
*     )

*/

sysPCGet:
        mflr	r4 /* Save LR value */

        bl Next    /* Set PC */
Next:
        mflr    r3 /* Get PC */
		mtlr    r4 /* Restor LR value */
        blr

/*******************************************************************************
*
* sysClearBATs - 
*
* This routine will zero the BAT registers.
*
* RETURNS: None
*
*/

sysClearBATs:			/* zero out the BAT registers */
	xor	r3,r3,r3
	isync
	mtspr	IBAT0U,r3	/* clear all upper BATS first */
	mtspr	IBAT1U,r3
	mtspr	IBAT2U,r3
	mtspr	IBAT3U,r3
	mtspr	DBAT0U,r3
	mtspr	DBAT1U,r3
	mtspr	DBAT2U,r3
	mtspr	DBAT3U,r3

	mtspr	IBAT0L,r3	/* then clear lower BATS */
	mtspr	IBAT1L,r3
	mtspr	IBAT2L,r3
	mtspr	IBAT3L,r3
	mtspr	DBAT0L,r3
	mtspr	DBAT1L,r3
	mtspr	DBAT2L,r3
	mtspr	DBAT3L,r3
	isync
	blr

/*******************************************************************************
*
* sysClearSegs - 
*
* This routine will zero the MMU's segment registers.
*
* RETURNS: None
*
*/

sysClearSegs:		/* Init the Segment registers */
	xor	    r3, r3, r3
    isync
    mtsr    0,r3
    mtsr    1,r3
    mtsr    2,r3
    mtsr    3,r3
    mtsr    4,r3
    mtsr    5,r3
    mtsr    6,r3
    mtsr    7,r3
    mtsr    8,r3
    mtsr    9,r3
    mtsr    10,r3
    mtsr    11,r3
    mtsr    12,r3
    mtsr    13,r3
    mtsr    14,r3
    mtsr    15,r3
    isync
	blr

/*******************************************************************************
*
* sysInvalidateTLBs - 
*
* This routine will invalidate the BAT's register.
*
* RETURNS: None
*
*/

sysInvalidateTLBs:
	isync
	/* invalidate entries within both TLBs */
	li	    r3,128
	mtctr	r3		/* CTR = 32  */
	xor	    r3,r3,r3	/* r3 = 0    */
	isync			/* context sync req'd before tlbie */
tlbloop:
	tlbie	r3
	sync			/* sync instr req'd after tlbie      */
	addi	r3,r3,0x1000	/* increment bits 15-19 */
	bdnz	tlbloop		/* decrement CTR, branch if CTR != 0 */
	isync
	blr


/*******************************************************************************
*
* sysClearFPRegs
*
* This routine will initialize the FPU's registers.
*
* RETURNS: None
*
*/

sysClearFPRegs:
	mflr	r30

	/* Turn on FP */
    li	    r3,0x2000
    mtmsr   r3
    sync

    /* Init the floating point control/status register */
    mtfsfi  7,0x0
    mtfsfi  6,0x0
    mtfsfi  5,0x0
    mtfsfi  4,0x0
    mtfsfi  3,0x0
    mtfsfi  2,0x0
    mtfsfi  1,0x0
    mtfsfi  0,0x0
    isync

    /* Initialize the floating point data registers to a known state */

    bl      ifpdrValue
    .long   0x3f800000      /* 1.0 */
ifpdrValue:
    mflr    r3
    lfs     f0,0(r3)
    lfs     f1,0(r3)
    lfs     f2,0(r3)
    lfs     f3,0(r3)
    lfs     f4,0(r3)
    lfs     f5,0(r3)
    lfs     f6,0(r3)
    lfs     f7,0(r3)
    lfs     f8,0(r3)
    lfs     f9,0(r3)
    lfs     f10,0(r3)
    lfs     f11,0(r3)
    lfs     f12,0(r3)
    lfs     f13,0(r3)
    lfs     f14,0(r3)
    lfs     f15,0(r3)
    lfs     f16,0(r3)
    lfs     f17,0(r3)
    lfs     f18,0(r3)
    lfs     f19,0(r3)
    lfs     f20,0(r3)
    lfs     f21,0(r3)
    lfs     f22,0(r3)
    lfs     f23,0(r3)
    lfs     f24,0(r3)
    lfs     f25,0(r3)
    lfs     f26,0(r3)
    lfs     f27,0(r3)
    lfs     f28,0(r3)
    lfs     f29,0(r3)
    lfs     f30,0(r3)
    lfs     f31,0(r3)
    sync
	mtlr	r30
	bclr	20,0		/* Return to caller */


/*****************************************************************************
*
* sysInByte - reads a byte from an io address.
*
* This function reads a byte from a specified io address.
*
* RETURNS: byte from address.
*
* UINT8 sysInByte (UINT8 * dataPtr)
*/

sysInByte:
	lbzx	r3,r0,r3	/* Read byte from address */
	sync			/* Sync I/O operation */
	bclr	20,0		/* Return to caller */

/******************************************************************************
*
* sysOutByte - writes a byte to an io address.
*
* This function writes a byte to a specified io address.
*
* RETURNS: N/A
*
* void sysOutByte (UINT8 * dataPtr, UINT8 data)
*/

sysOutByte:
	stbx	r4,r0,r3	/* Write a byte to address */
	sync			/* Sync I/O operation */
	bclr	20,0		/* Return to caller */


/*****************************************************************************
*
* sysInWord - reads a word (16-bit big-endian) from an io address.
*
* This function reads a word from a specified io address.
*
* Note: 
* PCI on MBX appears as big-endian also (no byte swapping is needed).
*
* RETURNS: 16 bit word from read from address
*
* UINT16 sysInWord (UINT16 * dataPtr)
*/

sysInWord:

	/* Read word from address */

	lhzx	r3,r0,r3

	/* Sync I/O operation */

	eieio

	/* Return to caller */

	bclr	20,0

/*****************************************************************************
*
* sysInWordRev - reads a word (16-bit byte reversed) from an io address.
*
* This function reads a word from a specified io address and reverses the
* bytes.
*
* RETURNS: 16 bit word (byte swapped) read from address
*
* UINT16 sysInWordRev (UINT16 * dataPtr)
*/

sysInWordRev:

        /* Read word from address */

        lhbrx    r3,r0,r3

        /* Sync I/O operation */

        eieio

        /* Return to caller */

        bclr    20,0

/******************************************************************************
*
* sysOutWord - writes a word (16-bit big-endian) to an io address.
*
* This function writes a word to a specified io address.
*
* Note: 
* PCI on MBX appears as big-endian also (no byte swapping is needed).
*
* RETURNS: N/A
*
* void sysOutWord (UINT16 * dataPtr, UINT16 data)
*/

sysOutWord:

	/* Write a word to address */

	sthx	r4,r0,r3

	/* Sync I/O operation */

	eieio

	/* Return to caller */

	bclr	20,0

/*****************************************************************************
*
* sysInLong - reads a long (32-bit big-endian) from an io address.
*
* This function reads a long from a specified io address.
*
* Note: 
* PCI on MBX appears as big-endian also (no byte swapping is needed).
*
* RETURNS: long (32-bit big-endian) from address
*
* UINT32 sysInLong ( UINT32 * dataPtr)
*/

sysInLong:

	/* Read long from address */

	lwzx	r3,r0,r3

	/* Sync I/O operation */

	eieio

	/* Return to caller */

	bclr	20,0

/******************************************************************************
*
* sysOutLong - writes a long (32-bit big-endian) to an io address.
*
* This function writes a long to a specified io address.
*
* Note: 
* PCI on MBX appears as big-endian also (no byte swapping is needed).
*
* RETURNS: N/A
*
* void sysOutLong (UINT32 * dataPtr, UINT32 data)
*/

sysOutLong:

	/* Write a long to address */

	stwx	r4,r0,r3

	/* Sync I/O operation */

	eieio

	/* Return to caller */

	bclr	20,0

/*******************************************************************************
*
* sysDecGet - return the decrementer contents
*
* This routine will return the current contents of the
* decrementer register (MPU.SPR22)
#
* RETURNS: decrementer contents
*
* NOMANUAL
*/

sysDecGet:
	mfspr	r3,22		/* load decrementer contents */

	/* Return to caller */

	bclr	20,0

/*******************************************************************************
*
* sysDelay - Placeholder
*
* CALL:
*       sysUioWrite(deviceAddress, registerIndex, registerValue)
*       r3 = deviceAddress
*       r4 = registerIndex
*       r5 = registerValue
*
* RETURNS: N/A
*/
        .text
        .align  2
sysDelay:
        bclr    20,0            /* return to caller */

/****************************************************************************
 * Function : immrGet 
 * Description: return IMMR register value (entire register)
 */
        .text
immrGet:
	lis	r3,0xf000
	blr