📄 syslib.c
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/* sysLib.c - Motorola 860ads board system-dependent library *//* Copyright 1984-1997 Wind River Systems, Inc. */#include "copyright_wrs.h"/*modification history--------------------01m,18mar99,cn added support for motCpmEnd driver (SPR# 25839).01l,03dec98,mas added GUARDED attributes to non-local memory areas mapped in sysPhysMemDesc[]. (SPR 23674)01k,12nov98,cn changed sysFecEnetEnable(), sysFecEnetDisable() to enable/disable the PHY device.01j,09nov98,cn added support for FADS860T boards and FEC.01i,08may98,gls added clear of all cpm interrups in sysToMonitor01h,08mar98,gls added checks to allow BSP to work with the PPC850FADS01g,18feb98,gls added code to allow the BSP to work with the PPC823FADS01f,12nov97,map updated to use ppc860Timer.c [SPR# 9366]01e,21feb97,mas removed NOMANUAL, made sysHwInit2() visible to 'man' (SPR 7879)01d,11nov96,tam added power management mode initialization.01c,06nov96,tpr reworked sysHwInit().01b,28may96,dzb added Ethernet driver support routines. added port initialization, and increased system to 24Mhz.01a,19apr96,tpr written.*//*DESCRIPTIONThis library provides board-specific routines. The chip drivers included are: ppc860Timer.c - PowerPC/860 Timer library sysMotCpmEnd.c - configuration module for the motCpmEnd driverINCLUDE FILES: sysLib.hSEE ALSO:.pG "Configuration"*//* includes */#include "vxWorks.h"#include "vme.h"#include "memLib.h"#include "cacheLib.h"#include "sysLib.h"#include "config.h"#include "string.h"#include "intLib.h"#include "logLib.h"#include "stdio.h"#include "taskLib.h"#include "vxLib.h"#include "tyLib.h"#include "arch/ppc/vxPpcLib.h"#include "private/vmLibP.h"#include "ctype.h"#include "drv/multi/ppc860Siu.h"#include "ads860.h"#include "typedef.h"#include "bsp.h"#include "Drv_852SMC.h"#ifdef INCLUDE_CPM#include "drv/netif/if_cpm.h"#endif#define PA0 0x8000#define PA1 0x4000#define PA2 0x2000#define PA3 0x1000#define PA4 0x0800#define PA5 0x0400#define PA6 0x0200#define PA7 0x0100#define PA8 0x0080#define PA9 0x0040#define PA10 0x0020#define PA11 0x0010#define PA12 0x0008#define PA13 0x0004#define PA14 0x0002#define PA15 0x0001#define PB14 0x00020000#define PB15 0x00010000#define PB16 0x00008000#define PB17 0x00004000#define PB18 0x00002000#define PB19 0x00001000#define PB20 0x00000800#define PB21 0x00000400#define PB22 0x00000200#define PB23 0x00000100#define PB24 0x00000080#define PB25 0x00000040#define PB26 0x00000020#define PB27 0x00000010#define PB28 0x00000008#define PB29 0x00000004#define PB30 0x00000002#define PB31 0x00000001#define PC4 0x0800#define PC5 0x0400#define PC6 0x0200#define PC7 0x0100#define PC8 0x0080#define PC9 0x0040#define PC10 0x0020#define PC11 0x0010#define PC12 0x0008#define PC13 0x0004#define PC14 0x0002#define PC15 0x0001#define PD3 0x1000#define PD4 0x0800#define PD5 0x0400#define PD6 0x0200#define PD7 0x0100#define PD8 0x0080#define PD9 0x0040#define PD10 0x0020#define PD11 0x0010#define PD12 0x0008#define PD13 0x0004#define PD14 0x0002#define PD15 0x0001void BSP_HwInit (void);void BSP_LedPortInit(void);PHYS_MEM_DESC sysPhysMemDesc [] = { { (void *) LOCAL_MEM_LOCAL_ADRS, (void *) LOCAL_MEM_LOCAL_ADRS, LOCAL_MEM_SIZE , VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE, VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE }, { (void *) INTERNAL_MEM_MAP_ADDR, (void *) INTERNAL_MEM_MAP_ADDR, INTERNAL_MEM_MAP_SIZE, /* 64 k - Internal Memory Map */ VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE | VM_STATE_MASK_GUARDED, VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE_NOT | VM_STATE_GUARDED }, { (void *) ROM_BASE_ADRS, (void *) ROM_BASE_ADRS, ROM_SIZE, /* Flach memory */ VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE, VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE_NOT }, { (void *) FLASH_A_BASE_ADDR, (void *) FLASH_A_BASE_ADDR, FLASH_A_SIZE, VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE, VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE_NOT },#if 0 { (void *) FLASH_B_BASE_ADDR, (void *) FLASH_B_BASE_ADDR, FLASH_B_SIZE, VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE, VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE_NOT }, { (void *) NV_RAM_BASE_ADDR, (void *) NV_RAM_BASE_ADDR, NV_RAM_SIZE, VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE, VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE_NOT }, { (void *) EPLD_BASE_ADDR, (void *) EPLD_BASE_ADDR, EPLD_RAM_SIZE, VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE, VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE_NOT }, { (void *) NEID_BASE_ADDR, (void *) NEID_BASE_ADDR, NEID_RAM_SIZE, VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE, VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE_NOT } #endif };int sysPhysMemDescNumEnt = NELEMENTS (sysPhysMemDesc);int sysBus = BUS; /* system bus type (VME_BUS, etc) */int sysCpu = CPU; /* system CPU type (PPC860) */char *sysBootLine = BOOT_LINE_ADRS; /* address of boot line */char *sysExcMsg = EXC_MSG_ADRS; /* catastrophic message area */int sysProcNum; /* processor number of this CPU */int sysFlags; /* boot flags */char sysBootHost [BOOT_FIELD_LEN]; /* name of host from which we booted */char sysBootFile [BOOT_FIELD_LEN]; /* name of file from which we booted */BOOL sysVmeEnable = FALSE; /* by default no VME */_U32 TickCount = 0;volatile unsigned long g_DecTimer = 0;_U32 ulgDrvFlashStartAddrs = FLASH_BASE_ADDR;_U32 ulgDrvFlashLength = 0x00200000;_U32 ulgDrvSdramLength = 0x01000000;#ifdef INCLUDE_CPM/* XXX set the following array to a unique Ethernet hardware address XXX *//* last 5 nibbles are board specific, initialized in sysHwInit */unsigned char sysCpmEnetAddr [6] = {0x00, 0x0a, 0x3e, 0x03, 0x02, 0x01};extern STATUS cpmattach();#endif /* INCLUDE_CPM *//* locals */void sysCpmEnetDisable (int unit);void sysCpmEnetIntDisable (int unit);#ifdef INCLUDE_MOT_FEC/* set the following array to a unique Ethernet hardware address */unsigned char sysFecEnetAddr [6] = {0x00, 0x0a, 0x3e, 0x03, 0x02, 0x00};IMPORT STATUS sysFecEnetDisable (UINT32 motCpmaddr);#endif /* INCLUDE_MOT_FEC */#include "sysSerial.c"/*2005/09/19 add serial*//*在libppc860gnuvx.a库里面已经存在ppc860sio.o*/#include "typedef.h"#define BSP_VER_STR_SIZE 100_U32 gSMC1StartFlag = 0;int gScc4RcvTid;_S8 gBSPVerStr[BSP_VER_STR_SIZE];/**/#include "intrCtl/ppc860Intr.c"#include "mem/nullNvRam.c"#include "timer/ppc860Timer.c" /* PPC860 & 821 have on chip timers */#ifdef INCLUDE_CPM#include "sysMotCpmEnd.c" /* configuration module for motCpmEnd */#endif /* INCLUDE_CPM *//******************************************************************************** sysModel - return the model name of the CPU board** This routine returns the model name of the CPU board.** RETURNS: A pointer to the string.*/char * sysModel (void) { return ("Motorola ADS - PowerPC 860"); }/******************************************************************************** sysBspRev - return the bsp version with the revision eg 1.0/<x>** This function returns a pointer to a bsp version with the revision.* for eg. 1.0/<x>. BSP_REV defined in config.h is concatanated to* BSP_VERSION and returned.** RETURNS: A pointer to the BSP version/revision string.*/char * sysBspRev (void) { return (BSP_VERSION BSP_REV); }/******************************************************************************** sysHwInit - initialize the system hardware** This routine initializes various feature of the MPC860ADS boards. It sets up* the control registers, initializes various devices if they are present.** NOTE: This routine should not be called directly by the user.** RETURNS: N/A*/void sysHwInit (void) { int immrVal = (int)vxImmrGet(); /* set the SPLL to the value requested */ #if 0 * PLPRCR(immrVal) = (*PLPRCR(immrVal) & ~PLPRCR_MF_MSK) | (SPLL_MUL_FACTOR << PLPRCR_MF_SHIFT); #endif /* set the BRGCLK division factor */ * SCCR(immrVal) = (* SCCR(immrVal) & (~SCCR_DFBRG_MSK) ) | (BRGCLK_DIV_FACTOR << SCCR_DFBRG_SHIFT); /* set the Periodic Timer A value */ * MAMR(immrVal) = (* MAMR(immrVal) & ~MAMR_PTA_MSK) | (PTA_VALUE << MAMR_PTA_SHIFT); /*lint !e778*//*lint !e506*/ /* set the Periodic Timer PreScale */ * MPTPR(immrVal) = PTP_VALUE; BSP_HwInit(); BSP_LedPortInit(); *SICR(immrVal) = 0x0; /* initialize SI/NMSI connections */ /* reset CPM */ *CPCR(immrVal) = 0x8001; /* Initialize interrupts */ (void)ppc860IntrInit(IV_LEVEL4); /* default vector level */ /* Reset serial channels */ #if 0 sysSerialHwInit(); #endif /* make sure Ethernet is disabled */ /*sysCpmEnetDisable (0); sysCpmEnetIntDisable (0); */ #ifdef INCLUDE_MOT_FEC /* make sure the FEC is disabled */ sysFecEnetDisable (immrVal);#endif /* INCLUDE_MOT_FEC */ /* * The power management mode is initialized here. Reduced power mode * is activated only when the kernel is iddle (cf vxPowerDown). * Power management mode is selected via vxPowerModeSet(). * DEFAULT_POWER_MGT_MODE is defined in config.h. */ (void)vxPowerModeSet (DEFAULT_POWER_MGT_MODE); }/********************************************************************************* sysPhysMemTop - get the address of the top of physical memory** This routine returns the address of the first missing byte of memory,* which indicates the top of memory.** RETURNS: The address of the top of physical memory.** SEE ALSO: sysMemTop()*/char * sysPhysMemTop (void) { static char * physTop = NULL; if (physTop == NULL) { physTop = (char *)(LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE); } return (physTop) ; }/********************************************************************************* sysMemTop - get the address of the top of VxWorks memory** This routine returns a pointer to the first byte of memory not* controlled or used by VxWorks.** The user can reserve memory space by defining the macro USER_RESERVED_MEM* in config.h. This routine returns the address of the reserved memory* area. The value of USER_RESERVED_MEM is in bytes.** RETURNS: The address of the top of VxWorks memory.*/char * sysMemTop (void) { static char * memTop = NULL; if( memTop == NULL ) { memTop = sysPhysMemTop () - USER_RESERVED_MEM; } return memTop; }/******************************************************************************** sysToMonitor - transfer control to the ROM monitor** This routine transfers control to the ROM monitor. Normally, it is called* only by reboot()--which services ^X--and bus errors at interrupt level.* However, in some circumstances, the user may wish to introduce a* <startType> to enable special boot ROM facilities.** RETURNS: Does not return.*/STATUS sysToMonitor ( int startType /* parameter passed to ROM to tell it how to boot */ ) { FUNCPTR pRom = (FUNCPTR) (ROM_TEXT_ADRS + 4); /* Warm reboot */ *CIMR(vxImmrGet()) = 0; /* disable all cpm interupts */ /*sysCpmEnetDisable (0);*/ /* disable the ethernet device */ #ifdef INCLUDE_MOT_FEC /* disable the FEC */ sysFecEnetDisable (vxImmrGet ());#endif /* INCLUDE_MOT_FEC */ #if 0 sysSerialReset(); /* reset the serail device */ #endif (*pRom) (startType); /* jump to bootrom entry point */ return (OK); /* in case we ever continue from ROM monitor */ }/******************************************************************************** sysHwInit2 - additional system configuration and initialization** This routine connects system interrupts and does any additional* configuration necessary.** RETURNS: N/A*/void sysHwInit2 (void)
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