dpramdisp.h

motorola mpc系列 mpc852cpu bsp

/************************************************************************
Copyright 2003 - 2004 UPTI, Inc.

filename     : DPRAMDisp.h

description  : Motorola System Interface Unit header file

author       : young

modification :young   create            2003-09-09
************************************************************************/
/*
This file  tells how to distribute BDS(also its buffers)in DPRAM
*/


#ifndef _DPRAMDISP_H_
#define _DPRAMDISP_H_
#include "config.h"

#define M852_DPRAM_OFFSET_ADDR    0x00002000                /* DRAM starting address    */
#define M852_DPRAM_BASE_ADDR      DEFAULT_IMMR_ADRS + M852_DPRAM_OFFSET_ADDR

/*每个BD表占8个BYTE，接收buffer放在接收BD之后，0x100的BD表空间最大分配30个BD表。*/
#define SMC1_RX_BD_CNT          32
#define SMC1_TX_BD_CNT          32

#define SMC2_RX_BD_CNT          32
#define SMC2_TX_BD_CNT          32

#if 1
/*每个BD表占8个BYTE，0x100的BD表空间最大分配32个BD表。*/
#define M852_SMC1_RX_BD_BUFF	(M852_DPRAM_BASE_ADDR + 0x1000)
#define M852_SMC1_RX_BD_SIZE    (8*SMC1_RX_BD_CNT)              /* 256Byte*/
#define M852_SMC1_TX_BD_BUFF	(M852_DPRAM_BASE_ADDR + 0x1100)
#define M852_SMC1_TX_BD_SIZE    (8*SMC1_TX_BD_CNT)              /* 256Byte*/
/* SMC1接收缓冲区*/
#define M852_SMC1_RX_BUFF       (M852_DPRAM_BASE_ADDR + 0x1200) /* SMC1_RX_BD_CNT Byte*/
/* SMC1发送缓冲区*/
#define M852_SMC1_TX_BUFF       (M852_DPRAM_BASE_ADDR + 0x1280) /* SMC1_TX_BD_CNT Byte*/
#endif


/* 空闲:(M852_DPRAM_BASE_ADDR + 0x1300)*/



/*分配SCC4资源*/
#define DRV_ENET_NUM_RXBDS      128
#define DRV_ENET_NUM_TXBDS      32

#define M852_SCC4_RX_BD_DPRAM   (M852_DPRAM_BASE_ADDR + 0x0800)     /* 2K起始位置*/
#define M852_SCC4_RX_BD_SIZE    (8*DRV_ENET_NUM_RXBDS)
#define M852_SCC4_TX_BD_DPRAM   (M852_SCC4_RX_BD_DPRAM + M852_SCC4_RX_BD_SIZE)  /* 3K起始位置*/
#define M852_SCC4_TX_BD_SIZE    (8*DRV_ENET_NUM_TXBDS)

#endif