📄 wm8753registerdefs.h
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#define WM8753_PWR2_MICAMPEN (WM8753_PWR2_MICAMP2EN | \
WM8753_PWR2_MICAMP1EN)
/* Power managment 3 (register 16h) */
#define WM8753_PWR3_MONO2 ((WM_REGVAL)(1U<<1))
#define WM8753_PWR3_MONO1 ((WM_REGVAL)(1U<<2))
#define WM8753_PWR3_OUT4 ((WM_REGVAL)(1U<<3))
#define WM8753_PWR3_OUT3 ((WM_REGVAL)(1U<<4))
#define WM8753_PWR3_ROUT2 ((WM_REGVAL)(1U<<5))
#define WM8753_PWR3_LOUT2 ((WM_REGVAL)(1U<<6))
#define WM8753_PWR3_ROUT1 ((WM_REGVAL)(1U<<7))
#define WM8753_PWR3_LOUT1 ((WM_REGVAL)(1U<<8))
#define WM8753_PWR3_OUTPUT (WM8753_PWR3_MONO2 | \
WM8753_PWR3_MONO1 | \
WM8753_PWR3_OUT4 | \
WM8753_PWR3_OUT3 | \
WM8753_PWR3_ROUT2 | \
WM8753_PWR3_LOUT2 | \
WM8753_PWR3_ROUT1 | \
WM8753_PWR3_LOUT1)
/* Power managment 4 (register 17h) */
#define WM8753_PWR4_LEFTMIX ((WM_REGVAL)(1U<<0))
#define WM8753_PWR4_RIGHTMIX ((WM_REGVAL)(1U<<1))
#define WM8753_PWR4_MONOMIX ((WM_REGVAL)(1U<<2))
#define WM8753_PWR4_RECMIX ((WM_REGVAL)(1U<<3))
#define WM8753_PWR4_MIX (WM8753_PWR4_LEFTMIX | \
WM8753_PWR4_RIGHTMIX | \
WM8753_PWR4_MONOMIX | \
WM8753_PWR4_RECMIX)
/*
* 0x18-0x21
#define WM8753_ID_REGISTER 0x18
#define WM8753_INTERUPT_POLARITY 0x19
#define WM8753_INTERUPT_ENABLE 0x1A
#define WM8753_GPIO_CONTROL_1 0x1B
#define WM8753_GPIO_CONTROL_2 0x1C
#define WM8753_RESET 0x1F
#define WM8753_RECORD_MIX_1 0x20
#define WM8753_RECORD_MIX_2 0x21
*/
/*
* Interrupt Polarity (register 19h)
*/
#define WM8753_INT_POL_TSD ((WM_REGVAL)(1U<<7))
#define WM8753_INT_POL_HPSW ((WM_REGVAL)(1U<<6))
#define WM8753_INT_POL_GPIO5 ((WM_REGVAL)(1U<<5))
#define WM8753_INT_POL_GPIO4 ((WM_REGVAL)(1U<<4))
#define WM8753_INT_POL_GPIO3 ((WM_REGVAL)(1U<<3))
#define WM8753_INT_POL_MICDET ((WM_REGVAL)(1U<<1))
#define WM8753_INT_POL_MICSSDET ((WM_REGVAL)(1U<<0))
/*
* Interrupt Masks (register 1Ah)
*/
#define WM8753_INT_EN_TSD ((WM_REGVAL)(1U<<7))
#define WM8753_INT_EN_HPSW ((WM_REGVAL)(1U<<6))
#define WM8753_INT_EN_GPIO5 ((WM_REGVAL)(1U<<5))
#define WM8753_INT_EN_GPIO4 ((WM_REGVAL)(1U<<4))
#define WM8753_INT_EN_GPIO3 ((WM_REGVAL)(1U<<3))
#define WM8753_INT_EN_MICDET ((WM_REGVAL)(1U<<1))
#define WM8753_INT_EN_MICSSDET ((WM_REGVAL)(1U<<0))
/*
* Interrupt Control [1] (register 1Bh)
*/
#define WM8753_INT_CON_DIS ((WM_REGVAL)(0x00U<<7))
#define WM8753_INT_CON_OPEN_DRAIN_ACT_LOW ((WM_REGVAL)(0x01U<<7))
#define WM8753_INT_CON_ACT_HIGH ((WM_REGVAL)(0x02U<<7))
#define WM8753_INT_CON_ACT_LOW ((WM_REGVAL)(0x03U<<7))
#define WM8753_INT_CON_MASK ((WM_REGVAL)(0x03U<<7))
/*
* GPIO Control 1 [GPIOs 4 & 5]
*/
#define WM8753_GPIO_CON_5_INPUT ((WM_REGVAL)(0x00U<<3))
#define WM8753_GPIO_CON_5_INT ((WM_REGVAL)(0x01U<<3))
#define WM8753_GPIO_CON_5_DRIVE_LOW ((WM_REGVAL)(0x02U<<3))
#define WM8753_GPIO_CON_5_DRIVE_HIGH ((WM_REGVAL)(0x03U<<3))
#define WM8753_GPIO_CON_5_MASK ((WM_REGVAL)(0x03U<<3))
#define WM8753_GPIO_CON_4_INPUT ((WM_REGVAL)(0x00U<<0))
#define WM8753_GPIO_CON_4_PULL_DOWN_INPUT ((WM_REGVAL)(0x02U<<0))
#define WM8753_GPIO_CON_4_PULL_UP_INPUT ((WM_REGVAL)(0x03U<<0))
#define WM8753_GPIO_CON_4_DRIVE_LOW ((WM_REGVAL)(0x04U<<0))
#define WM8753_GPIO_CON_4_DRIVE_HIGH ((WM_REGVAL)(0x05U<<0))
#define WM8753_GPIO_CON_4_SDOUT ((WM_REGVAL)(0x06U<<0))
#define WM8753_GPIO_CON_4_INT ((WM_REGVAL)(0x07U<<0))
#define WM8753_GPIO_CON_4_MASK ((WM_REGVAL)(0x07U<<0))
/*
* GPIO Control 2 [GPIOs 1, 2 & 3]
*/
#define WM8753_GPIO_CON_3_INPUT ((WM_REGVAL)(0x00U<<6))
#define WM8753_GPIO_CON_3_DRIVE_LOW ((WM_REGVAL)(0x04U<<6))
#define WM8753_GPIO_CON_3_DRIVE_HIGH ((WM_REGVAL)(0x05U<<6))
#define WM8753_GPIO_CON_3_SDOUT ((WM_REGVAL)(0x06U<<6))
#define WM8753_GPIO_CON_3_INT ((WM_REGVAL)(0x07U<<6))
#define WM8753_GPIO_CON_3_MASK ((WM_REGVAL)(0x07U<<6))
#define WM8753_GPIO_CON_2_DRIVE_LOW ((WM_REGVAL)(0x00U<<3))
#define WM8753_GPIO_CON_2_DRIVE_HIGH ((WM_REGVAL)(0x01U<<3))
#define WM8753_GPIO_CON_2_SDOUT ((WM_REGVAL)(0x02U<<3))
#define WM8753_GPIO_CON_2_INT ((WM_REGVAL)(0x03U<<3))
#define WM8753_GPIO_CON_2_ADC_CLK ((WM_REGVAL)(0x04U<<3))
#define WM8753_GPIO_CON_2_HIFI_DAC_CLK ((WM_REGVAL)(0x05U<<3))
#define WM8753_GPIO_CON_2_ADC_CLK_DIV_2 ((WM_REGVAL)(0x06U<<3))
#define WM8753_GPIO_CON_2_DAC_CLK_DIV_2 ((WM_REGVAL)(0x07U<<3))
#define WM8753_GPIO_CON_2_MASK ((WM_REGVAL)(0x07U<<3))
#define WM8753_GPIO_CON_1_DRIVE_LOW ((WM_REGVAL)(0x00U<<0))
#define WM8753_GPIO_CON_1_DRIVE_HIGH ((WM_REGVAL)(0x01U<<0))
#define WM8753_GPIO_CON_1_SDOUT ((WM_REGVAL)(0x02U<<0))
#define WM8753_GPIO_CON_1_INT ((WM_REGVAL)(0x03U<<0))
#define WM8753_GPIO_CON_1_MASK ((WM_REGVAL)(0x07U<<0))
/*
* Mixer volumes (0x20/0x21/0x22/0x23/0x24/0x25/0x26/0x27)
*/
#define WM8753_BASE_MIXVOL_MASK 0x07
#define WM8753_BASE_MIXVOL_6DB 0x00 /* +6db: 000 */
#define WM8753_BASE_MIXVOL_3DB 0x01 /* +3dB: 001 */
#define WM8753_BASE_MIXVOL_0DB 0x02 /* 0dB: 010 */
#define WM8753_BASE_MIXVOL_M3DB 0x03 /* -3dB: 011 */
#define WM8753_BASE_MIXVOL_M6DB 0x04 /* -6dB: 100 */
#define WM8753_BASE_MIXVOL_M9DB 0x05 /* -9dB: 101 */
#define WM8753_BASE_MIXVOL_M12DB 0x06 /* -12dB: 110 */
#define WM8753_BASE_MIXVOL_M15DB 0x07 /* -15dB: 111 */
#define WM8753_MIXVOL_SHIFT 4 /* LM2LOVOL/RM2ROVOL/MM2MOVOL [6:4] */
#define WM8753_MIXVOL_MASK ((WM_REGVAL)(WM8753_BASE_MIXVOL_MASK << WM8753_MIXVOL_SHIFT))
#define WM8753_MIXVOL_6DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_6DB << WM8753_MIXVOL_SHIFT))
#define WM8753_MIXVOL_3DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_3DB << WM8753_MIXVOL_SHIFT))
#define WM8753_MIXVOL_0DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_0DB << WM8753_MIXVOL_SHIFT))
#define WM8753_MIXVOL_M3DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M3DB << WM8753_MIXVOL_SHIFT))
#define WM8753_MIXVOL_M6DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M6DB << WM8753_MIXVOL_SHIFT))
#define WM8753_MIXVOL_M9DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M9DB << WM8753_MIXVOL_SHIFT))
#define WM8753_MIXVOL_M12DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M12DB << WM8753_MIXVOL_SHIFT))
#define WM8753_MIXVOL_M15DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M15DB << WM8753_MIXVOL_SHIFT))
#define WM8753_ST_MIXVOL_SHIFT 4 /* ST2LOVOL/ST2ROVOL/ST2MOVOL [6:4] */
#define WM8753_ST_MIXVOL_MASK ((WM_REGVAL)(WM8753_BASE_MIXVOL_MASK << WM8753_ST_MIXVOL_SHIFT))
#define WM8753_ST_MIXVOL_6DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_6DB << WM8753_ST_MIXVOL_SHIFT))
#define WM8753_ST_MIXVOL_3DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_3DB << WM8753_ST_MIXVOL_SHIFT))
#define WM8753_ST_MIXVOL_0DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_0DB << WM8753_ST_MIXVOL_SHIFT))
#define WM8753_ST_MIXVOL_M3DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M3DB << WM8753_ST_MIXVOL_SHIFT))
#define WM8753_ST_MIXVOL_M6DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M6DB << WM8753_ST_MIXVOL_SHIFT))
#define WM8753_ST_MIXVOL_M9DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M9DB << WM8753_ST_MIXVOL_SHIFT))
#define WM8753_ST_MIXVOL_M12DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M12DB << WM8753_ST_MIXVOL_SHIFT))
#define WM8753_ST_MIXVOL_M15DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M15DB << WM8753_ST_MIXVOL_SHIFT))
#define WM8753_VX_MIXVOL_SHIFT 0 /* VXD2LOVOL/VXD2ROVOL/VXD2MOVOL [2:0 */
#define WM8753_VX_MIXVOL_MASK ((WM_REGVAL)(WM8753_BASE_MIXVOL_MASK << WM8753_VX_MIXVOL_SHIFT))
#define WM8753_VX_MIXVOL_6DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_6DB << WM8753_VX_MIXVOL_SHIFT))
#define WM8753_VX_MIXVOL_3DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_3DB << WM8753_VX_MIXVOL_SHIFT))
#define WM8753_VX_MIXVOL_0DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_0DB << WM8753_VX_MIXVOL_SHIFT))
#define WM8753_VX_MIXVOL_M3DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M3DB << WM8753_VX_MIXVOL_SHIFT))
#define WM8753_VX_MIXVOL_M6DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M6DB << WM8753_VX_MIXVOL_SHIFT))
#define WM8753_VX_MIXVOL_M9DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M9DB << WM8753_VX_MIXVOL_SHIFT))
#define WM8753_VX_MIXVOL_M12DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M12DB << WM8753_VX_MIXVOL_SHIFT))
#define WM8753_VX_MIXVOL_M15DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M15DB << WM8753_VX_MIXVOL_SHIFT))
#define WM8753_LREC_MIXVOL_SHIFT 0 /* LRECVOL[2:0] */
#define WM8753_LREC_MIXVOL_MASK ((WM_REGVAL)(WM8753_BASE_MIXVOL_MASK << WM8753_LREC_MIXVOL_SHIFT))
#define WM8753_LREC_MIXVOL_6DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_6DB << WM8753_LREC_MIXVOL_SHIFT))
#define WM8753_LREC_MIXVOL_3DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_3DB << WM8753_LREC_MIXVOL_SHIFT))
#define WM8753_LREC_MIXVOL_0DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_0DB << WM8753_LREC_MIXVOL_SHIFT))
#define WM8753_LREC_MIXVOL_M3DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M3DB << WM8753_LREC_MIXVOL_SHIFT))
#define WM8753_LREC_MIXVOL_M6DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M6DB << WM8753_LREC_MIXVOL_SHIFT))
#define WM8753_LREC_MIXVOL_M9DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M9DB << WM8753_LREC_MIXVOL_SHIFT))
#define WM8753_LREC_MIXVOL_M12DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M12DB << WM8753_LREC_MIXVOL_SHIFT))
#define WM8753_LREC_MIXVOL_M15DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M15DB << WM8753_LREC_MIXVOL_SHIFT))
#define WM8753_RREC_MIXVOL_SHIFT 4 /* RRECVOL[2:0] */
#define WM8753_RREC_MIXVOL_MASK ((WM_REGVAL)(WM8753_BASE_MIXVOL_MASK << WM8753_RREC_MIXVOL_SHIFT))
#define WM8753_RREC_MIXVOL_6DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_6DB << WM8753_RREC_MIXVOL_SHIFT))
#define WM8753_RREC_MIXVOL_3DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_3DB << WM8753_RREC_MIXVOL_SHIFT))
#define WM8753_RREC_MIXVOL_0DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_0DB << WM8753_RREC_MIXVOL_SHIFT))
#define WM8753_RREC_MIXVOL_M3DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M3DB << WM8753_RREC_MIXVOL_SHIFT))
#define WM8753_RREC_MIXVOL_M6DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M6DB << WM8753_RREC_MIXVOL_SHIFT))
#define WM8753_RREC_MIXVOL_M9DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M9DB << WM8753_RREC_MIXVOL_SHIFT))
#define WM8753_RREC_MIXVOL_M12DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M12DB << WM8753_RREC_MIXVOL_SHIFT))
#define WM8753_RREC_MIXVOL_M15DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M15DB << WM8753_RREC_MIXVOL_SHIFT))
#define WM8753_MREC_MIXVOL_SHIFT 0 /* MRECVOL[2:0] */
#define WM8753_MREC_MIXVOL_MASK ((WM_REGVAL)(WM8753_BASE_MIXVOL_MASK << WM8753_MREC_MIXVOL_SHIFT))
#define WM8753_MREC_MIXVOL_6DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_6DB << WM8753_MREC_MIXVOL_SHIFT))
#define WM8753_MREC_MIXVOL_3DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_3DB << WM8753_MREC_MIXVOL_SHIFT))
#define WM8753_MREC_MIXVOL_0DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_0DB << WM8753_MREC_MIXVOL_SHIFT))
#define WM8753_MREC_MIXVOL_M3DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M3DB << WM8753_MREC_MIXVOL_SHIFT))
#define WM8753_MREC_MIXVOL_M6DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M6DB << WM8753_MREC_MIXVOL_SHIFT))
#define WM8753_MREC_MIXVOL_M9DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M9DB << WM8753_MREC_MIXVOL_SHIFT))
#define WM8753_MREC_MIXVOL_M12DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M12DB << WM8753_MREC_MIXVOL_SHIFT))
#define WM8753_MREC_MIXVOL_M15DB ((WM_REGVAL)(WM8753_BASE_MIXVOL_M15DB << WM8753_MREC_MIXVOL_SHIFT))
/*
* Record mixer routing (0x20/0x21)
*/
#define WM8753_REC_RMIX ((WM_REGVAL)(1U << 7)) /* RSEL */
#define WM8753_REC_LMIX ((WM_REGVAL)(1U << 3)) /* LSEL */
#define WM8753_REC_MMIX ((WM_REGVAL)(1U << 3)) /* MSEL */
/*
* Output mixer routing (0x22/0x23/0x24/0x25/0x26/0x27)
*/
#define WM8753_DAC2OUT ((WM_REGVAL)(1U << 8)) /* LD2LO/RD2RO/LD2MO/RD2MO */
#define WM8753_VXDAC2OUT WM8753_DAC2OUT /* VXD2LO/VXD2RO */
#define WM8753_MIX2OUT ((WM_REGVAL)(1U << 7)) /* LM2LO/RM2RO/MM2MO */
#define WM8753_ST2OUT ((WM_REGVAL)(1U << 7)) /* ST2LO/ST2RO/ST2MO */
#define WM8753_VXD2MO ((WM_REGVAL)(1U << 3)) /* R39 (0x27) */
/*
* OUT volumes (0x28/0x29/0x2A/0x2B/0x2C)
*
* 111_1111 = +6dB
* ... (1.0dB steps)
* 011_0000 = -73dB
* 010_1111 to 000_0000 = Analogue MUTE
*
* For WM8753_OUTVOL - _db should be between 6 and -73, < -73 is mute
*/
#define WM8753_OUTVOL_ZEROCROSS ((WM_REGVAL)(1U << 7)) /* ZC */
#define WM8753_OUTVOL_MASK 0x07F /* LOUT1VOL/ROUT1VOL/LOUT2VOL/ROUT2VOL/MONO2VOL */
#define WM8753_OUTVOL_MAX 0x7F
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