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📄 wmplatformconfig.h

📁 WM9713 audio codec driver for WinCE 5.0
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/*-----------------------------------------------------------------------------
 * Copyright (c) Wolfson Microelectronics plc.  All rights reserved.
 *
 * This software as well as any related documentation is furnished under 
 * license and may only be used or copied in accordance with the terms of the 
 * license. The information in this file is furnished for informational use 
 * only, is subject to change without notice, and should not be construed as 
 * a commitment by Wolfson Microelectronics plc. Wolfson Microelectronics plc
 * assumes no responsibility or liability for any errors or inaccuracies that
 * may appear in this document or any software that may be provided in
 * association with this document. 
 *
 * Except as permitted by such license, no part of this document may be 
 * reproduced, stored in a retrieval system, or transmitted in any form or by 
 * any means without the express written consent of Wolfson Microelectronics plc. 
 *
 * $Id: WMPlatformConfig.h 2924 2006-04-12 12:50:25Z fb $
 *
 * Platform-specific configuration file.
 *
 * This file contains the parameters which are likely to change between
 * different devices based on the XScale platform.
 *
 *
 * Warning:
 *  This driver is specifically written for Wolfson Codecs. It is not a 
 *  general CODEC device driver.
 *
 *---------------------------------------------------------------------------*/
#ifndef __WMPLATFORMCONFIG_H__
#define __WMPLATFORMCONFIG_H__

/*
 * Include files
 */

/*
 * This file controls how the Wolfson drivers behave.  You should review
 * all of these settings and make sure they are appropriate for your system.
 * 
 * It is worth spending some time on this.  Getting the right set of options
 * and disabling features you do not need will improve performance and reduce
 * memory overhead.  If the options are wrong, your system may not work.
 * 
 * You also need to review and update the settings in the file
 * inc\WMConfig.h
 */
#ifndef WM_INTERNAL_BUILD
    /*
     * Remove the next line when satisfied with your configuration
     *  - see comment above.
     */
#   error Please review and update WMPlatformConfig.h.
#endif

/*
 * Definitions
 */

/*
 * The Wolfson Drivers need to know the original board support package (BSP) that was 
 * used to generate the platform. The WM_BSP environment variable needs to hold this 
 * information.
 *
 * For Windows CE the easiest way to ensure this is always set is to update the main
 * BSP batch file (%_TARGETPLATROOT%\%_TGTPLAT%.bat) as follows:
 *
 *      REM
 *      REM To let the Wolfson drivers know what our BSP is based upon.
 *      REM
 *      set WM_BSP=<BSP>
 * 
 * Currently supported BSPs are:
 *      XSC1BD         - Lubbock platform and derivatives
 *      BVDMAIN        - MainstoneII platform and derivatives, supplied by Intel
 *      MAINSTONEII    - MainstoneII platform and derivatives, supplied by Microsoft
 *      INTEL_DBPXA27X - MainstoneII platform and derivatives, supplied by Intel
 *      MAINSTONEIII   - MainstoneIII platform and derivatives, supplied by Microsoft
 *  
 * Every driver also needs to add the board support package to the CDEFINES.
 * For Windows CE this would be a line in each sources file like the following:
 *  
 *      CDEFINES=$(CDEFINES) -DWM_BSP_$(WM_BSP)
 *  
 * This gives us a symbol like WM_BSP_XSC1BD, WM_BSP_BVDMAIN or WM_BSP_MAINSTONEII.
 * Note: The drivers supplied by Wolfson already define this symbol.
 *
 * We work out the rest based on this information.  So:
 *  - use WM_CPU_XXX to work out which CPU is being built
 *  - use WM_BOARD_XXX to work out what the target hardware board is
 *  - use WM_BSP_XXX to work out which BSP is being used to build for that platform
 * 
 * There is one exception to this.  We cannot work out if you have a PXA26x
 * CPU instead of a PXA25x, so if you have a PXA26x you will need to define
 * WM_CPU_PXA26X to TRUE.  Leave WM_CPU_PXA25X defined to TRUE as well.
 * 
 * NB: All OS-specific code should be encapsulated within the OS subdirectory
 * - header file WMPlatform_OS.h.  Nothing else should use or care about
 * which operating system or version is being built.
 */

#if defined (WM_BSP_XSC1BD) || defined( PALM_DBPXA250 )

#   undef WM_BOARD_LUBBOCK                                /* Support the Lubbock platform */
#   define WM_BOARD_LUBBOCK                         TRUE
#   undef WM_CPU_PXA25X                                   /* Support the PXA25X series */
#   define WM_CPU_PXA25X                            TRUE  /* Need this with PXA26X as well */

    /* 
     * If you have a PXA26x CPU, define WM_CPU_PXA26X to TRUE.
     * Leave WM_CPU_PXA25X as TRUE also.
     */
#   ifndef WM_CPU_PXA26X                                  /* Do not support the PXA260 series */
#       define WM_CPU_PXA26X                        FALSE /* Change this if you have a PXA26x */
#   endif /* !WM_CPU_PXA26X */

#   undef XLLP_AVAILABLE                                  /* Do not support the XLLP */
#   define XLLP_AVAILABLE                           FALSE
#   undef WM_BOARD_MAINSTONEII                            /* Do not support the Mainstone II platform */
#   define WM_BOARD_MAINSTONEII                     FALSE
#   undef WM_CPU_PXA27X                                   /* Do not support the PXA27X series */
#   define WM_CPU_PXA27X                            FALSE

#elif defined (WM_BSP_BVDMAIN) || defined (WM_BSP_MAINSTONEII) || defined (WM_BSP_INTEL_DBPXA27X) || defined (WM_BSP_MAINSTONEIII)

#   undef WM_BOARD_MAINSTONEII                            /* Support the Mainstone II/III platform */
#   define WM_BOARD_MAINSTONEII                     TRUE
#   undef WM_CPU_PXA27X                                   /* Support the PXA27X series */
#   define WM_CPU_PXA27X                            TRUE
#   undef XLLP_AVAILABLE                                  
#   define XLLP_AVAILABLE                           TRUE  /* XLLP is available */
#   ifdef WM_BSP_BVDMAIN
#       define XLLP_GPIO_AVAILABLE                  TRUE  /* XllpAc97ACodecClearGPIO is available */
#   else
#       define XLLP_GPIO_AVAILABLE                  FALSE /* XLLP doesn't support everything we need */
#   endif

#   undef WM_BOARD_LUBBOCK                                /* Do not support the Lubbock platform */
#   define WM_BOARD_LUBBOCK                         FALSE
#   undef WM_CPU_PXA25X                                   /*  Do not support the PXA25X series */
#   define WM_CPU_PXA25X                            FALSE
#   undef WM_CPU_PXA26X                                   /*  Do not support the PXA26X series */
#   define WM_CPU_PXA26X                            FALSE 

#else
    /*
     * Not a supported platform, or the CDEFINES line is missing.
     * 
     * Make sure that there is a line adding the BSP to the CDEFINES, as
     * described above.
     */
#   error Please define WM_BSP_$(WM_BSP) to a supported platform as described in WMPlatformConfig.h
#endif

/*
 * AC'97 Reset GPIO configuration.
 */

/*
 * There is a bug with the warm reset on some Intel platforms which also takes
 * the cold reset line low.  To workaround this, many platforms use a different
 * GPIO as a cold reset line, and leave the XScale AC'97 cold reset line
 * unconnected.  This allows both cold and warm resets to work properly.
 * 
 * Our code assumes this workaround has been implemented, since without it
 * you cannot do warm resets, and hence have to leave the AC link running
 * at all times.
 * 
 * Note: It is not always possible to preserve the RESET GPIO high during sleep.
 * We get around this by configuring it as an input and hence tristating the
 * RESETB line.  This requires a pull-up resistor on the RESETB line to hold
 * it high during sleep - otherwise the codec will perform a cold reset and
 * lose its settings.
 * 
 * Define RESET_GPIO_MASK to the bitmask of the GPIO you are using.
 * Define RESET_GPIO_NUM to the GPIO number you are using.
 * Define RESET_GPIO_REG(_REG) one of the following:
 *      GPIO_REG_0_31(_REG)     for GPIOs 0  - 31
 *      GPIO_REG_32_63(_REG)    for GPIOs 32 - 63
 *      GPIO_REG_64_95(_REG)    for GPIOs 64 - 95
 *      GPIO_REG_96_127(_REG)   for GPIOs 96 - 127
 * Define RESET_GPIO_ALTFN to the alternate function to use for the reset GPIO
 *      (probably 0 - i.e. an ordinary GPIO).
 * Define RESET_GPIO_ALTFN_MASK to the bitmask for the alternate function bits.
 *      If there is not another definition on this platform, you can use
 *      GPIO_AF3(RESET_GPIO_NUM) to define this.
 * Define RESET_GPIO_ALTFN_REG to one of the following:
 *      GPIO_ALTFN_REG_0_15     for GPIOs 0   - 15
 *      GPIO_ALTFN_REG_16_31    for GPIOs 16  - 31
 *      GPIO_ALTFN_REG_32_47    for GPIOs 32  - 47
 *      GPIO_ALTFN_REG_48_63    for GPIOs 48  - 63
 *      GPIO_ALTFN_REG_64_79    for GPIOs 64  - 79
 *      GPIO_ALTFN_REG_80_95    for GPIOs 80  - 95
 *      GPIO_ALTFN_REG_96_111   for GPIOs 96  - 111
 *      GPIO_ALTFN_REG_112_127  for GPIOs 112 - 127
 */
#if WM_BOARD_MAINSTONEII
#   define RESET_GPIO_NUM               113
#   define RESET_GPIO_MASK              XLLP_GPIO_BIT_AC97_RESET_n
#   define RESET_GPIO_REG(_REG)         GPIO_REG_96_127(_REG)
#   define RESET_GPIO_ALTFN             0
#   define RESET_GPIO_ALTFN_MASK        XLLP_GPIO_AF_BIT_AC97_nRESET_MASK
#   define RESET_GPIO_ALTFN_REG         GPIO_ALTFN_REG_112_127
#elif WM_CPU_PXA26X
#   define RESET_GPIO_NUM               89
#   define RESET_GPIO_MASK              GPIO_89
#   define RESET_GPIO_REG(_REG)         GPIO_REG_64_95(_REG)
#   define RESET_GPIO_ALTFN             0
#   define RESET_GPIO_ALTFN_MASK        GPIO_AF3(RESET_GPIO_NUM)
#   define RESET_GPIO_ALTFN_REG         GPIO_ALTFN_REG_80_95
#elif defined( PALM_DBPXA250 )
#   define RESET_GPIO_NUM               32
#   define RESET_GPIO_MASK              GPIO_32
#   define RESET_GPIO_REG(_REG)         GPIO_REG_32_63(_REG)
#   define RESET_GPIO_ALTFN             0
#   define RESET_GPIO_ALTFN_MASK        GPIO_AF3(RESET_GPIO_NUM)
#   define RESET_GPIO_ALTFN_REG         GPIO_ALTFN_REG_32_47
#else
    /*
     * This is the configuration that we use on our Lubbock platforms
     * Change this to use the GPIO that you have connected to reset.
     */
#   define RESET_GPIO_NUM               5

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