📄 wmplatform_raw.h
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/*-----------------------------------------------------------------------------
* Copyright (c) Wolfson Microelectronics plc. All rights reserved.
*
* This software as well as any related documentation is furnished under
* license and may only be used or copied in accordance with the terms of the
* license. The information in this file is furnished for informational use
* only, is subject to change without notice, and should not be construed as
* a commitment by Wolfson Microelectronics plc. Wolfson Microelectronics plc
* assumes no responsibility or liability for any errors or inaccuracies that
* may appear in this document or any software that may be provided in
* association with this document.
*
* Except as permitted by such license, no part of this document may be
* reproduced, stored in a retrieval system, or transmitted in any form or by
* any means without the express written consent of Wolfson Microelectronics plc.
*
* $Id: WMPlatform_Raw.h 2924 2006-04-12 12:50:25Z fb $
*
* This file contains platform-specific definitions used within the platform
* layer only.
*
* Warning:
* This driver is specifically written for Wolfson Codecs. It is not a
* general CODEC device driver.
*
*---------------------------------------------------------------------------*/
#ifndef __WMPLATFORM_RAW_H__
#define __WMPLATFORM_RAW_H__
/*
* Include files
*/
#if XLLP_AVAILABLE
# include <xllp_gpio.h>
# include <xllp_ac97.h>
# include <xllp_ost.h>
# include <xllp_dmac.h>
# include <xllp_bcr.h>
# include <xllp_ssp.h>
# include <xllp_intc.h>
# include <xllp_i2c.h>
# include <xllp_i2s.h>
#endif
/*
* OS-Specific board-support-package header files.
*/
#ifdef UNDER_CE
# ifdef WM_BSP_XSC1BD
# include "memdefs.h"
# include "xsc1.h"
# include "xsc1bd.h"
# include "..\..\..\kernel\hal\arm\timerxsc1.h" /* For OEM_CLOCK_FREQ */
# endif
# ifdef WM_BSP_BVDMAIN
# include "memdefs.h"
# include "bvd1.h"
# include "bvd1bd.h"
# include "timerbvd.h" /* For OEM_CLOCK_FREQ */
# endif
# if defined ( WM_BSP_MAINSTONEII ) || defined ( WM_BSP_INTEL_DBPXA27X ) || defined ( WM_BSP_MAINSTONEIII )
# include "bsp.h"
# include "bulverde.h"
# include "mainstoneii.h"
# endif
#elif defined (PALM_DBPXA250)
# define NON_PORTABLE
# include "PXA250.h"
# include "PXADMA.h"
# include "PXAClkMgr.h"
#endif
#include "WMConfig.h"
/*
* Definitions
*/
#define CODEC_TIMEOUT 1000 /* milliseconds */
/*
* Clock frequency definitions.
* For WinCE OEM_CLOCK_FREQ is defined in a header file.
* We define it here for PALM as it is not available via
* a header file.
*/
#ifdef PALM_DBPXA250
# define OEM_CLOCK_FREQ 3686400
#endif
#ifdef PALM_DBPXA270
/*
* NOTE: We have just taken a guess that
* PALM_DBPXA270 is the correct define.
* This must be checked.
*/
# define OEM_CLOCK_FREQ 3250000
#endif
/*
* Sample rate for the touch timer.
*/
#define WM_TOUCH_POLL_TIMEOUT OEM_CLOCK_FREQ / WM_TOUCH_SAMPLE_RATE
/*
* The GPIOs we're using.
*/
#define GPIO_BIT(_gpio) (1U << (_gpio) % 32)
#define GPIO_AF_FIELD(_gpio)((_gpio) % 16)
#define GPIO_AF_MASK(_gpio) (3U << (2*GPIO_AF_FIELD(_gpio)))
#define GPIO_AF0(_gpio) (0U << (2*GPIO_AF_FIELD(_gpio)))
#define GPIO_AF1(_gpio) (1U << (2*GPIO_AF_FIELD(_gpio)))
#define GPIO_AF2(_gpio) (2U << (2*GPIO_AF_FIELD(_gpio)))
#define GPIO_AF3(_gpio) (3U << (2*GPIO_AF_FIELD(_gpio)))
#if XLLP_AVAILABLE
# define GPIO_REG_0_31(_REG) _REG ## 0
# define GPIO_REG_32_63(_REG) _REG ## 1
# define GPIO_REG_64_95(_REG) _REG ## 2
# define GPIO_REG_96_127(_REG) _REG ## 3
# define GPIO_ALTFN_REG_0_15 GAFR0_L
# define GPIO_ALTFN_REG_16_31 GAFR0_U
# define GPIO_ALTFN_REG_32_47 GAFR1_L
# define GPIO_ALTFN_REG_48_63 GAFR1_U
# define GPIO_ALTFN_REG_64_79 GAFR2_L
# define GPIO_ALTFN_REG_80_95 GAFR2_U
# define GPIO_ALTFN_REG_96_111 GAFR3_L
# define GPIO_ALTFN_REG_112_127 GAFR3_U
#else /* XLLP_AVAILABLE */
# ifdef PALM_DBPXA250
# define GPIO_REG_0_31(_REG) _REG[0]
# define GPIO_REG_32_63(_REG) _REG[1]
# define GPIO_REG_64_95(_REG) _REG[2]
# define GPIO_ALTFN_REG_0_15 gafr[0]
# define GPIO_ALTFN_REG_16_31 gafr[1]
# define GPIO_ALTFN_REG_32_47 gafr[2]
# define GPIO_ALTFN_REG_48_63 gafr[3]
# define GPIO_ALTFN_REG_64_79 gafr[4]
# define GPIO_ALTFN_REG_80_95 gafr[5]
# else
# define GPIO_REG_0_31(_REG) _REG ## _x
# define GPIO_REG_32_63(_REG) _REG ## _y
# define GPIO_REG_64_95(_REG) _REG ## _z
# define GPIO_ALTFN_REG_0_15 GAFR0_x
# define GPIO_ALTFN_REG_16_31 GAFR1_x
# define GPIO_ALTFN_REG_32_47 GAFR0_y
# define GPIO_ALTFN_REG_48_63 GAFR1_y
# define GPIO_ALTFN_REG_64_79 GAFR0_z
# define GPIO_ALTFN_REG_80_95 GAFR1_z
# endif
#endif /* XLLP_AVAILABLE */
/* AC Link & I2S Interface */
#define GPIO_BITCLK 28
#define GPIO_SDATA_IN 29
#define GPIO_SDATA_IN_0 GPIO_SDATA_IN
#define GPIO_SDATA_OUT 30
#define GPIO_SYNC 31
#if WM_CPU_PXA25X | WM_CPU_PXA26X
#define GPIO_SDATA_IN_1 32
#endif
#if WM_CPU_PXA27X
# define GPIO_SDATA_IN_1 99
# define GPIO_AC97_SYSCLK 45
#endif
#define GPIO_BIT_BITCLK GPIO_BIT(GPIO_BITCLK)
#define GPIO_BIT_SDATA_IN GPIO_BIT(GPIO_SDATA_IN)
#define GPIO_BIT_SDATA_IN_0 GPIO_BIT_SDATA_IN
#define GPIO_BIT_SDATA_OUT GPIO_BIT(GPIO_SDATA_OUT)
#define GPIO_BIT_SYNC GPIO_BIT(GPIO_SYNC)
#define GPIO_BIT_SDATA_IN_1 GPIO_BIT(GPIO_SDATA_IN_1)
#if WM_CPU_PXA27X
# define GPIO_BIT_AC97_SYSCLK GPIO_BIT(GPIO_AC97_SYSCLK)
#endif
#define GPIO_ALTFN_AC97_BITCLK GPIO_AF1(GPIO_BITCLK)
#define GPIO_ALTFN_AC97_SDATA_IN_0 GPIO_AF1(GPIO_SDATA_IN_0)
#define GPIO_ALTFN_AC97_SDATA_OUT GPIO_AF2(GPIO_SDATA_OUT)
#define GPIO_ALTFN_AC97_SYNC GPIO_AF2(GPIO_SYNC)
#if WM_CPU_PXA25X | WM_CPU_PXA26X
# define GPIO_ALTFN_AC97_SDATA_IN_1 GPIO_AF1(GPIO_SDATA_IN_1)
#endif
#if WM_CPU_PXA27X
# define GPIO_ALTFN_AC97_SDATA_IN_1 GPIO_AF2(GPIO_SDATA_IN_1)
#endif
#define GPIO_ALTFN_I2S_BITCLK GPIO_AF1(GPIO_BITCLK)
#define GPIO_ALTFN_I2S_SDATA_IN GPIO_AF2(GPIO_SDATA_IN)
#define GPIO_ALTFN_I2S_SDATA_OUT GPIO_AF1(GPIO_SDATA_OUT)
#define GPIO_ALTFN_I2S_SYNC GPIO_AF1(GPIO_SYNC)
#if WM_CPU_PXA27X
# define GPIO_ALTFN_AC97_SYSCLK GPIO_AF1(GPIO_AC97_SYSCLK)
#endif
#define GPIO_ALTFN_MASK ( GPIO_AF_MASK(GPIO_BITCLK)|\
GPIO_AF_MASK(GPIO_SDATA_IN)|\
GPIO_AF_MASK(GPIO_SDATA_OUT)|\
GPIO_AF_MASK(GPIO_SYNC))
#define GPIO_ALTFN_MASK_SDATA_IN_1 GPIO_AF_MASK(GPIO_SDATA_IN_1)
#if WM_CPU_PXA27X
# define GPIO_ALTFN_MASK_AC97_SYSCLK GPIO_AF_MASK(GPIO_AC97_SYSCLK)
#endif
#if WM_BOARD_MAINSTONEII
# ifndef XLLP_BCR_MISCWR3_PEN_ACTIVE_HIGH
# define XLLP_BCR_MISCWR3_PEN_ACTIVE_HIGH (XLLP_BIT_4)
# endif
#endif
#define GPIO_REG(_REG) GPIO_REG_0_31(_REG)
#define GPIO_ALTFN_REG GPIO_ALTFN_REG_16_31
#if WM_CPU_PXA25X | WM_CPU_PXA26X
# define GPIO_REG_SDATA_IN_1(_REG) GPIO_REG_32_63(_REG)
# define GPIO_ALTFN_REG_SDATA_IN_1 GPIO_ALTFN_REG_32_47
#endif
#if WM_CPU_PXA27X
# define GPIO_REG_SDATA_IN_1(_REG) GPIO_REG_96_127(_REG)
# define GPIO_ALTFN_REG_SDATA_IN_1 GPIO_ALTFN_REG_96_111
# define GPIO_REG_AC97_SYSCLK(_REG) GPIO_REG_32_63(_REG)
# define GPIO_ALTFN_REG_AC97_SYSCLK GPIO_ALTFN_REG_32_47
#endif
#if WM_CPU_PXA27X
/* SSP2/Voice DAC Interface */
# define GPIO_SSP2_SSPTXD2 13
# define GPIO_SSP2_SSPSCLK2 22
# define GPIO_SSP2_SSPRXD2 11
# define GPIO_SSP2_SSPFRM2 88
# define GPIO_BIT_SSP_TX GPIO_BIT(GPIO_SSP2_SSPTXD2)
# define GPIO_BIT_SSP_SCLK GPIO_BIT(GPIO_SSP2_SSPSCLK2)
# define GPIO_BIT_SSP_RX GPIO_BIT(GPIO_SSP2_SSPRXD2)
# define GPIO_BIT_SSP_FRM GPIO_BIT(GPIO_SSP2_SSPFRM2)
# define GPIO_ALTFN_SSP_TX GPIO_AF1(GPIO_SSP2_SSPTXD2)
# define GPIO_ALTFN_SSP_SCLK GPIO_AF3(GPIO_SSP2_SSPSCLK2)
# define GPIO_ALTFN_SSP_RX GPIO_AF2(GPIO_SSP2_SSPRXD2)
# define GPIO_ALTFN_SSP_FRM GPIO_AF3(GPIO_SSP2_SSPFRM2)
# define SSP2_TX_GPIO_REG(_REG) GPIO_REG_0_31(_REG)
# define SSP2_TX_ALTFN_REG GPIO_ALTFN_REG_0_15
# define SSP2_TX_ALTFN_MASK GPIO_AF_MASK(GPIO_SSP2_SSPTXD2)
# define SSP2_SCLK_GPIO_REG(_REG) GPIO_REG_0_31(_REG)
# define SSP2_SCLK_ALTFN_REG GPIO_ALTFN_REG_16_31
# define SSP2_SCLK_ALTFN_MASK GPIO_AF_MASK(GPIO_SSP2_SSPSCLK2)
# define SSP2_RX_GPIO_REG(_REG) GPIO_REG_0_31(_REG)
# define SSP2_RX_ALTFN_REG GPIO_ALTFN_REG_0_15
# define SSP2_RX_ALTFN_MASK GPIO_AF_MASK(GPIO_SSP2_SSPRXD2)
# define SSP2_FRM_GPIO_REG(_REG) GPIO_REG_64_95(_REG)
# define SSP2_FRM_ALTFN_REG GPIO_ALTFN_REG_80_95
# define SSP2_FRM_ALTFN_MASK GPIO_AF_MASK(GPIO_SSP2_SSPFRM2)
#endif /* WM_CPU_PXA27X */
/*
* Touch panel definitions.
* Note: The definitions of which GPIO to use are configured in WMPlatformConfig.h.
*/
#if WM_BOARD_LUBBOCK
/*
* Touch definitions for Lubbock (and derivatives).
*/
# define WM_CLEAR_PEN_DETECT_INTERRUPT(_ctx)\
_ctx->v_pGPIORegs->PEN_DETECT_GPIO_REG(GEDR) |= GPIO_BIT(PEN_DETECT_GPIO_NUM)
# define WM_CONFIGURE_PEN_DETECT_INTERRUPT(_ctx)\
_ctx->v_pGPIORegs->PEN_DETECT_GPIO_REG(GPDR) &= ~GPIO_BIT(PEN_DETECT_GPIO_NUM)
# define WM_SET_PEN_DETECT_INTERRUPT_ACTIVE_HIGH(_ctx)\
_ctx->v_pGPIORegs->PEN_DETECT_GPIO_REG(GRER) |= GPIO_BIT(PEN_DETECT_GPIO_NUM)
# define WM_SET_PEN_DETECT_INTERRUPT_ACTIVE_LOW(_ctx)\
_ctx->v_pGPIORegs->PEN_DETECT_GPIO_REG(GFER) |= GPIO_BIT(PEN_DETECT_GPIO_NUM)
# define WM_CLEAR_PEN_DETECT_INTERRUPT_ACTIVE_HIGH(_ctx)\
_ctx->v_pGPIORegs->PEN_DETECT_GPIO_REG(GRER) &= ~GPIO_BIT(PEN_DETECT_GPIO_NUM)
# define WM_CLEAR_PEN_DETECT_INTERRUPT_ACTIVE_LOW(_ctx)\
_ctx->v_pGPIORegs->PEN_DETECT_GPIO_REG(GFER) &= ~GPIO_BIT(PEN_DETECT_GPIO_NUM)
# define WM_CLEAR_VIRTUAL_PEN_DETECT_INTERRUPT(_ctx)\
(void)0)
/*
* Amplifier definitions.
*/
# define WM97_TURN_OFF_AMPLIFER_1(_ctx)\
((void)0)
# define WM97_TURN_OFF_AMPLIFER_2(_ctx)\
((void)0)
# define WM97_TURN_ON_AMPLIFER_1(_ctx)\
((void)0)
# define WM97_TURN_ON_AMPLIFER_2(_ctx)\
((void)0)
/*
* USB On The Go (OTG) definitions.
*/
# define USB_OTG_ENABLE(_ctx)\
((void)0)
# define USB_OTG_DISABLE(_ctx)\
((void)0)
# define USB_OTG_ENABLE_EXTERNAL_TRANSCEIVER(_ctx)\
((void)0)
# define USB_OTG_DISABLE_EXTERNAL_TRANSCEIVER(_ctx)\
((void)0)
/*
* SSP Mux definitions for Mainstone II.
*/
# define SSP_MUX_USE_USB(_ctx)\
((void)0)
# define SSP_MUX_USE_FFUART(_ctx)\
((void)0)
/*
* HEX LED defines
*/
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