📄 adc_sram.lst
字号:
1019 054c 3885 ldd r19,Y+8
1020 054e 4985 ldd r20,Y+9
1021 0550 5A85 ldd r21,Y+10
1022 0552 5523 tst r21
1023 0554 5CF4 brge .L22
1024 0556 8F81 ldd r24,Y+7
1025 0558 9885 ldd r25,Y+8
1026 055a A985 ldd r26,Y+9
1027 055c BA85 ldd r27,Y+10
1028 055e 0F96 adiw r24,15
1029 0560 A11D adc r26,__zero_reg__
1030 0562 B11D adc r27,__zero_reg__
1031 0564 8F83 std Y+7,r24
1032 0566 9887 std Y+8,r25
1033 0568 A987 std Y+9,r26
1034 056a BA87 std Y+10,r27
1035 .L22:
1036 056c EF80 ldd r14,Y+7
1037 056e F884 ldd r15,Y+8
1038 0570 0985 ldd r16,Y+9
1039 0572 1A85 ldd r17,Y+10
1040 0574 6894 set
1041 0576 13F8 bld __zero_reg__,4-1
1042 0578 1595 1: asr r17
1043 057a 0795 ror r16
1044 057c F794 ror r15
1045 057e E794 ror r14
1046 0580 1694 lsr __zero_reg__
1047 0582 D1F7 brne 1b
1048 0584 8981 ldd r24,Y+1
1049 0586 9A81 ldd r25,Y+2
1050 0588 0196 adiw r24,1
1051 058a 9C01 movw r18,r24
1052 058c 4427 clr r20
1053 058e 37FD sbrc r19,7
1054 0590 4095 com r20
1055 0592 542F mov r21,r20
1056 0594 C801 movw r24,r16
1057 0596 B701 movw r22,r14
1058 0598 0E94 0000 call __divmodsi4
1059 059c 2B87 std Y+11,r18
1060 059e 3C87 std Y+12,r19
1061 05a0 4D87 std Y+13,r20
1062 05a2 5E87 std Y+14,r21
1063 05a4 2B85 ldd r18,Y+11
1064 05a6 3C85 ldd r19,Y+12
1065 05a8 4D85 ldd r20,Y+13
1066 05aa 5E85 ldd r21,Y+14
1067 05ac 2F87 std Y+15,r18
1068 05ae 388B std Y+16,r19
1069 05b0 498B std Y+17,r20
1070 05b2 5A8B std Y+18,r21
1071 05b4 8F85 ldd r24,Y+15
1072 05b6 9889 ldd r25,Y+16
1073 05b8 A989 ldd r26,Y+17
1074 05ba BA89 ldd r27,Y+18
1075 05bc BB23 tst r27
1076 05be 64F4 brge .L23
1077 05c0 2F85 ldd r18,Y+15
1078 05c2 3889 ldd r19,Y+16
1079 05c4 4989 ldd r20,Y+17
1080 05c6 5A89 ldd r21,Y+18
1081 05c8 2150 subi r18,lo8(-(255))
1082 05ca 3F4F sbci r19,hi8(-(255))
1083 05cc 4F4F sbci r20,hlo8(-(255))
1084 05ce 5F4F sbci r21,hhi8(-(255))
1085 05d0 2F87 std Y+15,r18
1086 05d2 388B std Y+16,r19
1087 05d4 498B std Y+17,r20
1088 05d6 5A8B std Y+18,r21
1089 .L23:
1090 05d8 2F85 ldd r18,Y+15
1091 05da 3889 ldd r19,Y+16
1092 05dc 4989 ldd r20,Y+17
1093 05de 5A89 ldd r21,Y+18
1094 05e0 BB27 clr r27
1095 05e2 57FD sbrc r21,7
1096 05e4 BA95 dec r27
1097 05e6 A52F mov r26,r21
1098 05e8 942F mov r25,r20
1099 05ea 832F mov r24,r19
1100 05ec 20E0 ldi r18,lo8(256)
1101 05ee 31E0 ldi r19,hi8(256)
1102 05f0 40E0 ldi r20,hlo8(256)
1103 05f2 50E0 ldi r21,hhi8(256)
1104 05f4 BC01 movw r22,r24
1105 05f6 CD01 movw r24,r26
1106 05f8 0E94 0000 call __mulsi3
1107 05fc DC01 movw r26,r24
1108 05fe CB01 movw r24,r22
1109 0600 2B85 ldd r18,Y+11
1110 0602 3C85 ldd r19,Y+12
1111 0604 4D85 ldd r20,Y+13
1112 0606 5E85 ldd r21,Y+14
1113 0608 281B sub r18,r24
1114 060a 390B sbc r19,r25
1115 060c 4A0B sbc r20,r26
1116 060e 5B0B sbc r21,r27
1117 0610 DA01 movw r26,r20
1118 0612 C901 movw r24,r18
1119 0614 8093 2900 sts 41,r24
191:G:/HVCBASOFT/AD/adc_sram.c **** UBRR0H=(fosc/16/(baud_rate+1))/256;
1121 .LM117:
1122 0618 8B81 ldd r24,Y+3
1123 061a 9C81 ldd r25,Y+4
1124 061c AD81 ldd r26,Y+5
1125 061e BE81 ldd r27,Y+6
1126 0620 8B8B std Y+19,r24
1127 0622 9C8B std Y+20,r25
1128 0624 AD8B std Y+21,r26
1129 0626 BE8B std Y+22,r27
1130 0628 8B89 ldd r24,Y+19
1131 062a 9C89 ldd r25,Y+20
1132 062c AD89 ldd r26,Y+21
1133 062e BE89 ldd r27,Y+22
1134 0630 BB23 tst r27
1135 0632 64F4 brge .L24
1136 0634 2B89 ldd r18,Y+19
1137 0636 3C89 ldd r19,Y+20
1138 0638 4D89 ldd r20,Y+21
1139 063a 5E89 ldd r21,Y+22
1140 063c 2150 subi r18,lo8(-(4095))
1141 063e 304F sbci r19,hi8(-(4095))
1142 0640 4F4F sbci r20,hlo8(-(4095))
1143 0642 5F4F sbci r21,hhi8(-(4095))
1144 0644 2B8B std Y+19,r18
1145 0646 3C8B std Y+20,r19
1146 0648 4D8B std Y+21,r20
1147 064a 5E8B std Y+22,r21
1148 .L24:
1149 064c EB88 ldd r14,Y+19
1150 064e FC88 ldd r15,Y+20
1151 0650 0D89 ldd r16,Y+21
1152 0652 1E89 ldd r17,Y+22
1153 0654 0D2E mov r0,r29
1154 0656 DCE0 ldi r29,12
1155 0658 1595 1: asr r17
1156 065a 0795 ror r16
1157 065c F794 ror r15
1158 065e E794 ror r14
1159 0660 DA95 dec r29
1160 0662 D1F7 brne 1b
1161 0664 D02D mov r29,r0
1162 0666 8981 ldd r24,Y+1
1163 0668 9A81 ldd r25,Y+2
1164 066a 0196 adiw r24,1
1165 066c 9C01 movw r18,r24
1166 066e 4427 clr r20
1167 0670 37FD sbrc r19,7
1168 0672 4095 com r20
1169 0674 542F mov r21,r20
1170 0676 C801 movw r24,r16
1171 0678 B701 movw r22,r14
1172 067a 0E94 0000 call __divmodsi4
1173 067e DA01 movw r26,r20
1174 0680 C901 movw r24,r18
1175 0682 8093 9000 sts 144,r24
192:G:/HVCBASOFT/AD/adc_sram.c **** UCSR0A|=(1<<MPCM0);//多机通讯模式
1177 .LM118:
1178 0686 8091 2B00 lds r24,43
1179 068a 8160 ori r24,lo8(1)
1180 068c 8093 2B00 sts 43,r24
193:G:/HVCBASOFT/AD/adc_sram.c **** // UCSR0B|=(1<<RXEN0)|(1<<TXEN0)|(1<<RXCIE0);//允许发送和接收,并允许接收中断
194:G:/HVCBASOFT/AD/adc_sram.c **** UCSR0C|=(1<<UCSZ01)|(1<<UCSZ00);//9位数据+1位STOP位,从机
1182 .LM119:
1183 0690 8091 9500 lds r24,149
1184 0694 8660 ori r24,lo8(6)
1185 0696 8093 9500 sts 149,r24
195:G:/HVCBASOFT/AD/adc_sram.c **** UCSR0B|=(1<<UCSZ02);
1187 .LM120:
1188 069a 8091 2A00 lds r24,42
1189 069e 8460 ori r24,lo8(4)
1190 06a0 8093 2A00 sts 42,r24
196:G:/HVCBASOFT/AD/adc_sram.c **** }
1192 .LM121:
1193 /* epilogue: frame size=22 */
1194 06a4 6696 adiw r28,22
1195 06a6 0FB6 in __tmp_reg__,__SREG__
1196 06a8 F894 cli
1197 06aa DEBF out __SP_H__,r29
1198 06ac 0FBE out __SREG__,__tmp_reg__
1199 06ae CDBF out __SP_L__,r28
1200 06b0 DF91 pop r29
1201 06b2 CF91 pop r28
1202 06b4 1F91 pop r17
1203 06b6 0F91 pop r16
1204 06b8 FF90 pop r15
1205 06ba EF90 pop r14
1206 06bc 0895 ret
1207 /* epilogue end (size=13) */
1208 /* function UART_SETTING size 214 (187) */
1210 .Lscope10:
1213 .global UART_RXCINT_OPEN
1215 UART_RXCINT_OPEN:
197:G:/HVCBASOFT/AD/adc_sram.c ****
198:G:/HVCBASOFT/AD/adc_sram.c **** //开串口接收中断
199:G:/HVCBASOFT/AD/adc_sram.c **** void UART_RXCINT_OPEN(void)
200:G:/HVCBASOFT/AD/adc_sram.c **** {
1217 .LM122:
1218 /* prologue: frame size=0 */
1219 06be CF93 push r28
1220 06c0 DF93 push r29
1221 06c2 CDB7 in r28,__SP_L__
1222 06c4 DEB7 in r29,__SP_H__
1223 /* prologue end (size=4) */
201:G:/HVCBASOFT/AD/adc_sram.c **** UCSR0B|=(1<<RXEN0)|(1<<TXEN0)|(1<<RXCIE0);//允许发送和接收,并允许接收中断
1225 .LM123:
1226 06c6 8091 2A00 lds r24,42
1227 06ca 8869 ori r24,lo8(-104)
1228 06cc 8093 2A00 sts 42,r24
202:G:/HVCBASOFT/AD/adc_sram.c **** }
1230 .LM124:
1231 /* epilogue: frame size=0 */
1232 06d0 DF91 pop r29
1233 06d2 CF91 pop r28
1234 06d4 0895 ret
1235 /* epilogue end (size=3) */
1236 /* function UART_RXCINT_OPEN size 12 (5) */
1238 .Lscope11:
1241 .global UART_RXCINT_CLOSE
1243 UART_RXCINT_CLOSE:
203:G:/HVCBASOFT/AD/adc_sram.c ****
204:G:/HVCBASOFT/AD/adc_sram.c **** //关串口接收中断
205:G:/HVCBASOFT/AD/adc_sram.c **** void UART_RXCINT_CLOSE(void)
206:G:/HVCBASOFT/AD/adc_sram.c **** {
1245 .LM125:
1246 /* prologue: frame size=0 */
1247 06d6 CF93 push r28
1248 06d8 DF93 push r29
1249 06da CDB7 in r28,__SP_L__
1250 06dc DEB7 in r29,__SP_H__
1251 /* prologue end (size=4) */
207:G:/HVCBASOFT/AD/adc_sram.c **** UCSR0B&=~(1<<RXCIE0);
1253 .LM126:
1254 06de 8FE7 ldi r24,lo8(127)
1255 06e0 9091 2A00 lds r25,42
1256 06e4 8923 and r24,r25
1257 06e6 8093 2A00 sts 42,r24
208:G:/HVCBASOFT/AD/adc_sram.c **** }
1259 .LM127:
1260 /* epilogue: frame size=0 */
1261 06ea DF91 pop r29
1262 06ec CF91 pop r28
1263 06ee 0895 ret
1264 /* epilogue end (size=3) */
1265 /* function UART_RXCINT_CLOSE size 13 (6) */
1267 .Lscope12:
1271 .global UART_DATA_BYTE_SEND
1273 UART_DATA_BYTE_SEND:
209:G:/HVCBASOFT/AD/adc_sram.c ****
210:G:/HVCBASOFT/AD/adc_sram.c **** //发送单字节
211:G:/HVCBASOFT/AD/adc_sram.c **** void UART_DATA_BYTE_SEND(uint8_t data)
212:G:/HVCBASOFT/AD/adc_sram.c **** {
1275 .LM128:
1276 /* prologue: frame size=2 */
1277 06f0 CF93 push r28
1278 06f2 DF93 push r29
1279 06f4 CDB7 in r28,__SP_L__
1280 06f6 DEB7 in r29,__SP_H__
1281 06f8 2297 sbiw r28,2
1282 06fa 0FB6 in __tmp_reg__,__SREG__
1283 06fc F894 cli
1284 06fe DEBF out __SP_H__,r29
1285 0700 0FBE out __SREG__,__tmp_reg__
1286 0702 CDBF out __SP_L__,r28
1287 /* prologue end (size=10) */
1288 0704 8983 std Y+1,r24
213:G:/HVCBASOFT/AD/adc_sram.c **** uint8_t i;
214:G:/HVCBASOFT/AD/adc_sram.c **** sbi(PORTE,2);//改为发送状态
1290 .LM129:
1291 .LBB6:
1292 0706 8091 2300 lds r24,35
1293 070a 8460 ori r24,lo8(4)
1294 070c 8093 2300 sts 35,r24
215:G:/HVCBASOFT/AD/adc_sram.c **** //延时等待
216:G:/HVCBASOFT/AD/adc_sram.c **** for(i=0;i<0xff;i++){;}
1296 .LM130:
1297 0710 1A82 std Y+2,__zero_reg__
1298 .L28:
1299 0712 8A81 ldd r24,Y+2
1300 0714 8F3F cpi r24,lo8(-1)
1301 0716 09F4 brne .L30
1302 0718 04C0 rjmp .L29
1303 .L30:
1304 071a 8A81 ldd r24,Y+2
1305 071c 8F5F subi r24,lo8(-(1))
1306 071e 8A83 std Y+2,r24
1307 0720 F8CF rjmp .L28
1308 .L29:
217:G:/HVCBASOFT/AD/adc_sram.c **** //等待UDRE被置位，否则对数据寄存器UDR的写操作将被忽略
218:G:/HVCBASOFT/AD/adc_sram.c **** if(!(UCSR0A&(1<<UDRE0)))
1310 .LM131:
1311 0722 8091 2B00 lds r24,43
1312 0726 9927 clr r25
1313 0728 8072 andi r24,lo8(32)
1314 072a 9070 andi r25,hi8(32)
1315 072c 0097 sbiw r24,0
1316 072e 29F4 brne .L33
219:G:/HVCBASOFT/AD/adc_sram.c **** {
220:G:/HVCBASOFT/AD/adc_sram.c **** UCSR0A|=(1<<UDRE0);
1318 .LM132:
1319 0730 8091 2B00 lds r24,43
1320 0734 8062 ori r24,lo8(32)
1321 0736 8093 2B00 sts 43,r24
221:G:/HVCBASOFT/AD/adc_sram.c **** }
222:G:/HVCBASOFT/AD/adc_sram.c **** //等待发送缓冲器空
223:G:/HVCBASOFT/AD/adc_sram.c **** while(!(UCSR0A&(1<<UDRE0))){;}
1323 .LM133:
1324 .L33:
1325 073a 8091 2B00 lds r24,43
1326 073e 9927 clr r25
1327 0740 8072 andi r24,lo8(32)
1328 0742 9070 andi r25,hi8(32)
1329 0744 0097 sbiw r24,0
1330 0746 C9F3 breq .L33
224:G:/HVCBASOFT/AD/adc_sram.c **** UDR0=data;//发送数据
1332 .LM134:
1333 0748 8981 ldd r24,Y+1
1334 074a 8093 2C00 sts 44,r24
225:G:/HVCBASOFT/AD/adc_sram.c **** loop_until_bit_is_set(UCSR0A,TXC0);//查询发送是否结束
1336 .LM135:
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