📄 ndis.h
字号:
PULONG readBuffer = y; \
ULONG readCount; \
for (readCount = 0; readCount < z; readCount++, readBuffer++) { \
*readBuffer = *(volatile ULONG * const)(x); \
} \
}
#define WRITE_PORT_UCHAR(x, y) { \
*(volatile UCHAR * const)(x) = y; \
KeFlushWriteBuffer(); \
}
#define WRITE_PORT_USHORT(x, y) { \
*(volatile USHORT * const)(x) = y; \
KeFlushWriteBuffer(); \
}
#define WRITE_PORT_ULONG(x, y) { \
*(volatile ULONG * const)(x) = y; \
KeFlushWriteBuffer(); \
}
#define WRITE_PORT_BUFFER_UCHAR(x, y, z) { \
PUCHAR writeBuffer = y; \
ULONG writeCount; \
for (writeCount = 0; writeCount < z; writeCount++, writeBuffer++) { \
*(volatile UCHAR * const)(x) = *writeBuffer; \
KeFlushWriteBuffer(); \
} \
}
#define WRITE_PORT_BUFFER_USHORT(x, y, z) { \
PUSHORT writeBuffer = y; \
ULONG writeCount; \
for (writeCount = 0; writeCount < z; writeCount++, writeBuffer++) { \
*(volatile USHORT * const)(x) = *writeBuffer; \
KeFlushWriteBuffer(); \
} \
}
#define WRITE_PORT_BUFFER_ULONG(x, y, z) { \
PULONG writeBuffer = y; \
ULONG writeCount; \
for (writeCount = 0; writeCount < z; writeCount++, writeBuffer++) { \
*(volatile ULONG * const)(x) = *writeBuffer; \
KeFlushWriteBuffer(); \
} \
}
//
// PowerPC page size = 4 KB
//
#define PAGE_SIZE (ULONG)0x1000
//
// Define the number of trailing zeroes in a page aligned virtual address.
// This is used as the shift count when shifting virtual addresses to
// virtual page numbers.
//
#define PAGE_SHIFT 12L
#endif // defined(_PPC_)
//
// Defines the Type in the RESOURCE_DESCRIPTOR
//
typedef enum _CM_RESOURCE_TYPE {
CmResourceTypeNull = 0, // Reserved
CmResourceTypePort,
CmResourceTypeInterrupt,
CmResourceTypeMemory,
CmResourceTypeDma,
CmResourceTypeDeviceSpecific,
CmResourceTypeMaximum
} CM_RESOURCE_TYPE;
//
// Defines the ShareDisposition in the RESOURCE_DESCRIPTOR
//
typedef enum _CM_SHARE_DISPOSITION {
CmResourceShareUndetermined = 0, // Reserved
CmResourceShareDeviceExclusive,
CmResourceShareDriverExclusive,
CmResourceShareShared
} CM_SHARE_DISPOSITION;
//
// Define the bit masks for Flags when type is CmResourceTypeInterrupt
//
#define CM_RESOURCE_INTERRUPT_LEVEL_SENSITIVE 0
#define CM_RESOURCE_INTERRUPT_LATCHED 1
//
// Define the bit masks for Flags when type is CmResourceTypeMemory
//
#define CM_RESOURCE_MEMORY_READ_WRITE 0x0000
#define CM_RESOURCE_MEMORY_READ_ONLY 0x0001
#define CM_RESOURCE_MEMORY_WRITE_ONLY 0x0002
#define CM_RESOURCE_MEMORY_PREFETCHABLE 0x0004
#define CM_RESOURCE_MEMORY_COMBINEDWRITE 0x0008
#define CM_RESOURCE_MEMORY_24 0x0010
//
// Define the bit masks for Flags when type is CmResourceTypePort
//
#define CM_RESOURCE_PORT_MEMORY 0
#define CM_RESOURCE_PORT_IO 1
//
// Define the bit masks for Flags when type is CmResourceTypeDma
//
#define CM_RESOURCE_DMA_8 0x0000
#define CM_RESOURCE_DMA_16 0x0001
#define CM_RESOURCE_DMA_32 0x0002
#include "pshpack4.h"
typedef struct _CM_PARTIAL_RESOURCE_DESCRIPTOR {
UCHAR Type;
UCHAR ShareDisposition;
USHORT Flags;
union {
//
// Range of port numbers, inclusive. These are physical, bus
// relative. The value should be the same as the one passed to
// HalTranslateBusAddress().
//
struct {
PHYSICAL_ADDRESS Start;
ULONG Length;
} Port;
//
// IRQL and vector. Should be same values as were passed to
// HalGetInterruptVector().
//
struct {
ULONG Level;
ULONG Vector;
ULONG Affinity;
} Interrupt;
//
// Range of memory addresses, inclusive. These are physical, bus
// relative. The value should be the same as the one passed to
// HalTranslateBusAddress().
//
struct {
PHYSICAL_ADDRESS Start; // 64 bit physical addresses.
ULONG Length;
} Memory;
//
// Physical DMA channel.
//
struct {
ULONG Channel;
ULONG Port;
ULONG Reserved1;
} Dma;
//
// Device Specific information defined by the driver.
// The DataSize field indicates the size of the data in bytes. The
// data is located immediately after the DeviceSpecificData field in
// the structure.
//
struct {
ULONG DataSize;
ULONG Reserved1;
ULONG Reserved2;
} DeviceSpecificData;
} u;
} CM_PARTIAL_RESOURCE_DESCRIPTOR, *PCM_PARTIAL_RESOURCE_DESCRIPTOR;
#include "poppack.h"
//
// A Partial Resource List is what can be found in the ARC firmware
// or will be generated by ntdetect.com.
// The configuration manager will transform this structure into a Full
// resource descriptor when it is about to store it in the regsitry.
//
// Note: There must a be a convention to the order of fields of same type,
// (defined on a device by device basis) so that the fields can make sense
// to a driver (i.e. when multiple memory ranges are necessary).
//
typedef struct _CM_PARTIAL_RESOURCE_LIST {
USHORT Version;
USHORT Revision;
ULONG Count;
CM_PARTIAL_RESOURCE_DESCRIPTOR PartialDescriptors[1];
} CM_PARTIAL_RESOURCE_LIST, *PCM_PARTIAL_RESOURCE_LIST;
//
// A Full Resource Descriptor is what can be found in the registry.
// This is what will be returned to a driver when it queries the registry
// to get device information; it will be stored under a key in the hardware
// description tree.
//
// Note: The BusNumber and Type are redundant information, but we will keep
// it since it allows the driver _not_ to append it when it is creating
// a resource list which could possibly span multiple buses.
//
// Note2: There must a be a convention to the order of fields of same type,
// (defined on a device by device basis) so that the fields can make sense
// to a driver (i.e. when multiple memory ranges are necessary).
//
typedef struct _CM_FULL_RESOURCE_DESCRIPTOR {
INTERFACE_TYPE InterfaceType;
ULONG BusNumber;
CM_PARTIAL_RESOURCE_LIST PartialResourceList;
} CM_FULL_RESOURCE_DESCRIPTOR, *PCM_FULL_RESOURCE_DESCRIPTOR;
//
// The Resource list is what will be stored by the drivers into the
// resource map via the IO API.
//
typedef struct _CM_RESOURCE_LIST {
ULONG Count;
CM_FULL_RESOURCE_DESCRIPTOR List[1];
} CM_RESOURCE_LIST, *PCM_RESOURCE_LIST;
#include "pshpack1.h"
//
// Define Mca POS data block for slot
//
typedef struct _CM_MCA_POS_DATA {
USHORT AdapterId;
UCHAR PosData1;
UCHAR PosData2;
UCHAR PosData3;
UCHAR PosData4;
} CM_MCA_POS_DATA, *PCM_MCA_POS_DATA;
//
// Memory configuration of eisa data block structure
//
typedef struct _EISA_MEMORY_TYPE {
UCHAR ReadWrite: 1;
UCHAR Cached : 1;
UCHAR Reserved0 :1;
UCHAR Type:2;
UCHAR Shared:1;
UCHAR Reserved1 :1;
UCHAR MoreEntries : 1;
} EISA_MEMORY_TYPE, *PEISA_MEMORY_TYPE;
typedef struct _EISA_MEMORY_CONFIGURATION {
EISA_MEMORY_TYPE ConfigurationByte;
UCHAR DataSize;
USHORT AddressLowWord;
UCHAR AddressHighByte;
USHORT MemorySize;
} EISA_MEMORY_CONFIGURATION, *PEISA_MEMORY_CONFIGURATION;
//
// Interrupt configurationn of eisa data block structure
//
typedef struct _EISA_IRQ_DESCRIPTOR {
UCHAR Interrupt : 4;
UCHAR Reserved :1;
UCHAR LevelTriggered :1;
UCHAR Shared : 1;
UCHAR MoreEntries : 1;
} EISA_IRQ_DESCRIPTOR, *PEISA_IRQ_DESCRIPTOR;
typedef struct _EISA_IRQ_CONFIGURATION {
EISA_IRQ_DESCRIPTOR ConfigurationByte;
UCHAR Reserved;
} EISA_IRQ_CONFIGURATION, *PEISA_IRQ_CONFIGURATION;
//
// DMA description of eisa data block structure
//
typedef struct _DMA_CONFIGURATION_BYTE0 {
UCHAR Channel : 3;
UCHAR Reserved : 3;
UCHAR Shared :1;
UCHAR MoreEntries :1;
} DMA_CONFIGURATION_BYTE0;
typedef struct _DMA_CONFIGURATION_BYTE1 {
UCHAR Reserved0 : 2;
UCHAR TransferSize : 2;
UCHAR Timing : 2;
UCHAR Reserved1 : 2;
} DMA_CONFIGURATION_BYTE1;
typedef struct _EISA_DMA_CONFIGURATION {
DMA_CONFIGURATION_BYTE0 ConfigurationByte0;
DMA_CONFIGURATION_BYTE1 ConfigurationByte1;
} EISA_DMA_CONFIGURATION, *PEISA_DMA_CONFIGURATION;
//
// Port description of eisa data block structure
//
typedef struct _EISA_PORT_DESCRIPTOR {
UCHAR NumberPorts : 5;
UCHAR Reserved :1;
UCHAR Shared :1;
UCHAR MoreEntries : 1;
} EISA_PORT_DESCRIPTOR, *PEISA_PORT_DESCRIPTOR;
typedef struct _EISA_PORT_CONFIGURATION {
EISA_PORT_DESCRIPTOR Configuration;
USHORT PortAddress;
} EISA_PORT_CONFIGURATION, *PEISA_PORT_CONFIGURATION;
//
// Eisa slot information definition
// N.B. This structure is different from the one defined
// in ARC eisa addendum.
//
typedef struct _CM_EISA_SLOT_INFORMATION {
UCHAR ReturnCode;
UCHAR ReturnFlags;
UCHAR MajorRevision;
UCHAR MinorRevision;
USHORT Checksum;
UCHAR NumberFunctions;
UCHAR FunctionInformation;
ULONG CompressedId;
} CM_EISA_SLOT_INFORMATION, *PCM_EISA_SLOT_INFORMATION;
//
// Eisa function information definition
//
typedef struct _CM_EISA_FUNCTION_INFORMATION {
ULONG CompressedId;
UCHAR IdSlotFlags1;
UCHAR IdSlotFlags2;
UCHAR MinorRevision;
UCHAR MajorRevision;
UCHAR Selections[26];
UCHAR FunctionFlags;
UCHAR TypeString[80];
EISA_MEMORY_CONFIGURATION EisaMemory[9];
EISA_IRQ_CONFIGURATION EisaIrq[7];
EISA_DMA_CONFIGURATION EisaDma[4];
EISA_PORT_CONFIGURATION EisaPort[20];
UCHAR InitializationData[60];
} CM_EISA_FUNCTION_INFORMATION, *PCM_EISA_FUNCTION_INFORMATION;
//
// The followings define the way pnp bios information is stored in
// the registry \\HKEY_LOCAL_MACHINE\HARDWARE\Description\System\
// MultifunctionAdapter\x key, where x is an integer number indicating
// adapter instance. The "Identifier" of the key must equal to "PNP BIOS"
// and the "ConfigurationData" is organized as follow:
//
// CM_PNP_BIOS_INSTALLATION_CHECK +
// CM_PNP_BIOS_DEVICE_NODE for device 1 +
// CM_PNP_BIOS_DEVICE_NODE for device 2 +
// ...
// CM_PNP_BIOS_DEVICE_NODE for device n
//
//
// Pnp BIOS device node structure
//
typedef struct _CM_PNP_BIOS_DEVICE_NODE {
USHORT Size;
UCHAR Node;
ULONG ProductId;
UCHAR DeviceType[3];
USHORT DeviceAttributes;
// followed by AllocatedResourceBlock, PossibleResourceBlock
// and CompatibleDeviceId
} CM_PNP_BIOS_DEVICE_NODE,*PCM_PNP_BIOS_DEVICE_NODE;
//
// Pnp BIOS Installation check
//
typedef struct _CM_PNP_BIOS_INSTALLATION_CHECK {
UCHAR Signature[4]; // $PnP (ascii)
UCHAR Revision;
UCHAR Length;
USHORT ControlField;
UCHAR Checksum;
ULONG EventFlagAddress; // Physical address
USHORT RealModeEntryOffset;
USHORT RealModeEntrySegment;
USHORT ProtectedModeEntryOffset;
ULONG ProtectedModeCodeBaseAddress;
ULONG OemDeviceId;
USHORT RealModeDataBaseAddress;
ULONG ProtectedModeDataBaseAddress;
} CM_PNP_BIOS_INSTALLATION_CHECK, *PCM_PNP_BIOS_INSTALLATION_CHECK;
#include "poppack.h"
//
// Masks for EISA function information
//
#define EISA_FUNCTION_ENABLED 0x80
#define EISA_FREE_FORM_DATA 0x40
#define EISA_HAS_PORT_INIT_ENTRY 0x20
#define EISA_HAS_PORT_RANGE 0x10
#define EISA_HAS_DMA_ENTRY 0x08
#define EISA_HAS_IRQ_ENTRY 0x04
#define EISA_HAS_MEMORY_ENTRY 0x02
#define EISA_HAS_TYPE_ENTRY 0x01
#define EISA_HAS_INFORMATION EISA_HAS_PORT_RANGE + \
EISA_HAS_DMA_ENTRY + \
EISA_HAS_IRQ_ENTRY + \
EISA_HAS_MEMORY_ENTRY + \
EISA_HAS_TYPE_ENTRY
//
// Masks for EISA memory configuration
//
#define EISA_MORE_ENTRIES 0x80
#define EISA_SYSTEM_MEMORY 0x00
#define EISA_MEMORY_TYPE_RAM 0x01
//
// Returned error code for EISA bios call
//
#define EISA_INVALID_SLOT 0x80
#define EISA_INVALID_FUNCTION 0x81
#define EISA_INVALID_CONFIGURATION 0x82
#define EISA_EMPTY_SLOT 0x83
#define EISA_INVALID_BIOS_CALL 0x86
//
// Interrupt modes.
//
typedef enum _KINTERRUPT_MODE {
LevelSensitive,
Latched
} KINTERRUPT_MODE;
//
// Common dispatcher object header
//
// N.B. The size field contains the number of dwords in the structure.
//
typedef struct _DISPATCHER_HEADER {
UCHAR Type;
UCHAR Absolute;
UCHAR Size;
UCHAR Inserted;
LONG SignalState;
LIST_ENTRY WaitListHead;
} DISPATCHER_HEADER;
//
// Event object
//
typedef struct _KEVENT {
DISPATCHER_HEADER Header;
} KEVENT, *PKEVENT, *RESTRICTED_POINTER PRKEVENT;
typedef struct _KINTERRUPT *PKINTERRUPT, *RESTRICTED_POINTER PRKINTERRUPT;
//
// Timer object
//
typedef struct _KTIMER {
DISPATCHER_HEADER Header;
ULARGE_INTEGER DueTime;
LIST_ENTRY TimerListEntry;
struct _KDPC *Dpc;
LONG Period;
} KTIMER, *PKTIMER, *RESTRICTED_POINTER PRKTIMER;
typedef struct _ADAPTER_OBJECT *PADAPTER_OBJECT;
typedef struct _DEVICE_OBJECT *PDEVICE_OBJECT;
typedef struct _DRIVER_OBJECT *PDRIVER_OBJECT;
typedef struct _FILE_OBJECT *PFILE_OBJECT;
#if defined(_MIPS_) || defined(_ALPHA_) || defined(_PPC_)
NTHALAPI
ULONG
HalGetDmaAlignmentRequirement (
VOID
);
#endif
#if defined(_M_IX86)
#define HalGetDmaAlignmentRequirement() 1L
#endif
NTHALAPI
VOID
KeFlushWriteBuffer (
VOID
);
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -